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gpu: nvgpu: vgpu: add io coherency support

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Modify command message parameter to support io
coherency.

Jira EVLR-2025

Change-Id: I38b21c72d85f559555c4d97dab73d0f715ecc655
Signed-off-by: Aparna Das <aparnad@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1614388
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Aparna Das
2017-11-30 01:08:52 -08:00
committed by mobile promotions
parent b983c67d84
commit 4f67a794dd
3 changed files with 9 additions and 2 deletions
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5
drivers/gpu/nvgpu/common/linux/vgpu/gp10b/vgpu_mm_gp10b.c
View File

@@ -165,7 +165,10 @@ u64 vgpu_gp10b_locked_gmmu_map(struct vm_gk20a *vm,
p->pgsz_idx = pgsz_idx;
p->iova = 0;
p->kind = kind_v;
p->cacheable = (flags & NVGPU_VM_MAP_CACHEABLE) ? 1 : 0;
if (flags & NVGPU_VM_MAP_CACHEABLE)
p->flags = TEGRA_VGPU_MAP_CACHEABLE;
if (flags & NVGPU_VM_MAP_IO_COHERENT)
p->flags |= TEGRA_VGPU_MAP_IO_COHERENT;
p->prot = prot;
p->ctag_offset = ctag_offset;
p->clear_ctags = clear_ctags;

1
drivers/gpu/nvgpu/common/linux/vgpu/gv11b/vgpu_gv11b.c
View File

@@ -35,6 +35,7 @@ int vgpu_gv11b_init_gpu_characteristics(struct gk20a *g)
}
__nvgpu_set_enabled(g, NVGPU_SUPPORT_TSG_SUBCONTEXTS, true);
__nvgpu_set_enabled(g, NVGPU_SUPPORT_IO_COHERENCE, true);
return 0;
}

5
include/linux/tegra_vgpu.h
View File

@@ -160,6 +160,9 @@ struct tegra_vgpu_as_map_params {
u32 ctag_offset;
};
#define TEGRA_VGPU_MAP_CACHEABLE (1 << 0)
#define TEGRA_VGPU_MAP_IO_COHERENT (1 << 1)
struct tegra_vgpu_as_map_ex_params {
u64 handle;
u64 gpu_va;
@@ -168,7 +171,7 @@ struct tegra_vgpu_as_map_ex_params {
u8 pgsz_idx;
u8 iova;
u8 kind;
u8 cacheable;
u32 flags;
u8 clear_ctags;
u8 prot;
u32 ctag_offset;