gpu: nvgpu: igpu and dgpu driver libs

Different build flags are used for iGPU and dGPU in
safety build. In order to support dGPU in unit tests,
a separate library is needed for the driver.

Added makefiles to build:
- libnvgpu-drv-igpu.so
- libnvgpu-drv-dpgu.so

Updated scripts and units makefiles to use libnvgpu-drv-igu
by default.

Jira NVGPU-5217

Change-Id: Ibcc56088723cec5cb2d0ac42725102ae0c886014
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2333499
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit

Makefile.umbrella.tmk

@@ -44,7 +44,8 @@ build_nvgpu_ut := 1
 endif
 
 ifeq ($(build_nvgpu_ut),1)
-NV_REPOSITORY_COMPONENTS := drivers/gpu/nvgpu
+NV_REPOSITORY_COMPONENTS := libs/igpu
+NV_REPOSITORY_COMPONENTS += libs/dgpu
 NV_REPOSITORY_COMPONENTS += userspace
 NV_REPOSITORY_COMPONENTS += userspace/units/posix/bitops
 NV_REPOSITORY_COMPONENTS += userspace/units/posix/env

libs/Makefile.common.tmk

@@ -1,6 +1,6 @@
 ################################### tell Emacs this is a -*- makefile-gmake -*-
 #
-# Copyright (c) 2018-2020 NVIDIA CORPORATION.  All Rights Reserved.
+# Copyright (c) 2020, NVIDIA CORPORATION.  All Rights Reserved.
 #
 # NVIDIA CORPORATION and its licensors retain all intellectual property
 # and proprietary rights in and to this software, related documentation
@@ -13,7 +13,7 @@
 ###############################################################################
 
 ifdef NV_COMPONENT_FLAG_SHARED_LIBRARY_SECTION
-include $(NV_BUILD_START_COMPONENT)
+NVGPU_SOURCE := $(NV_SOURCE)/kernel/nvgpu/drivers/gpu/nvgpu
 
 # Architecture script. This validates our YAML architecture against the
 # source code we have.
@@ -32,20 +32,18 @@ ARCH_PY				:= $(NV_SOURCE)/core-private/tools/arch/arch.py
 #
 # NVGPU_NEXT_SOURCE needs to be set for the Makefile.sources file to
 # properly handle include paths.
-NVGPU_NEXT_SOURCE := \
+NVGPU_NEXT_SOURCE := $(NV_SOURCE)/kernel/nvgpu-next/drivers/gpu/nvgpu
-		$(NV_COMPONENT_DIR)/../../../../nvgpu-next/drivers/gpu/nvgpu
 
 NVGPU_POSIX			:= 1
-NVGPU_ARCH			:= $(NV_COMPONENT_DIR)/../../../arch
+NVGPU_ARCH			:= $(NVGPU_SOURCE)/../../../arch
-NVGPU_NEXT_ARCH			:= $(NVGPU_NEXT_SOUCRE)/../../../arch
+NVGPU_NEXT_ARCH			:= $(NVGPU_NEXT_SOURCE)/../../../arch
 NVGPU_ARCH_YAML                 := $(NVGPU_ARCH)/*.yaml $(NVGPU_NEXT_ARCH)/*.yaml
 
-NV_COMPONENT_NAME		:= nvgpu-drv
 NV_COMPONENT_OWN_INTERFACE_DIR	:= .
 NV_COMPONENT_INCLUDES		:=				\
-		.						\
+		$(NVGPU_SOURCE)					\
-		include						\
+		$(NVGPU_SOURCE)/include				\
-		../../../include				\
+		$(NVGPU_SOURCE)/../../../include		\
 		$(NVGPU_NEXT_SOURCE)				\
 		$(NVGPU_NEXT_SOURCE)/include			\
 		$(NVGPU_NEXT_SOURCE)/../../../include
@@ -59,7 +57,7 @@ NV_COMPONENT_CFLAGS		+=    \
 	-DCONFIG_NVGPU_SUPPORT_TURING \
 	-D__NVGPU_UNIT_TEST__
 
--include $(NV_COMPONENT_DIR)/Makefile.shared.configs
+-include $(NVGPU_SOURCE)/Makefile.shared.configs
 NV_COMPONENT_CFLAGS             += $(NVGPU_COMMON_CFLAGS)
 
 NVGPU_FAULT_INJECTION_ENABLEMENT := 1
@@ -67,11 +65,11 @@ NV_COMPONENT_CFLAGS              += -DNVGPU_UNITTEST_FAULT_INJECTION_ENABLEMENT
 
 _NV_TOOLCHAIN_CFLAGS            += -rdynamic -g
 
--include $(NV_COMPONENT_DIR)/Makefile.sources
+-include $(NVGPU_SOURCE)/Makefile.sources
 -include $(NVGPU_NEXT_SOURCE)/Makefile.sources
 
 NV_COMPONENT_SOURCES		:=				\
-		$(srcs)			   			\
+		$(addprefix $(NVGPU_SOURCE)/,$(srcs))	\
 		$(addprefix $(NVGPU_NEXT_SOURCE)/,$(srcs_next))
 
 # $(srcs_next) already has the NV_COMPONENT_DIR prefix so we already have the
@@ -79,7 +77,7 @@ NV_COMPONENT_SOURCES		:=				\
 # those with the absolute path.
 SRC_DEPS                        := srcs_next
 SRC_DEPS                        +=				\
-		$(addprefix $(NV_COMPONENT_DIR)/,$(srcs))
+		$(addprefix $(NVGPU_SOURCE)/,$(srcs))
 
 #
 # A little bit of magic to get tmake to execute the arch.py python script
@@ -97,7 +95,7 @@ $(NVGPU_ARCH_YAML): nvgpu-arch
 nvgpu-arch: $(ARCH_PY)
 	$(PYTHON2) $(ARCH_PY)				\
 		--arch-file $(NVGPU_ARCH)/nvgpu.yaml	\
-		--source    $(NV_COMPONENT_DIR)		\
+		--source    $(NVGPU_SOURCE)		\
 		sources --check
 
 .PHONY: nvgpu-arch
@@ -106,8 +104,7 @@ NV_COMPONENT_SYSTEMIMAGE_DIR    := $(NV_SYSTEMIMAGE_TEST_EXECUTABLE_DIR)/nvgpu_u
 systemimage:: $(NV_COMPONENT_SYSTEMIMAGE_DIR)
 $(NV_COMPONENT_SYSTEMIMAGE_DIR) : $(NV_SYSTEMIMAGE_TEST_EXECUTABLE_DIR)
 	$(MKDIR_P) $@
-NV_COMPONENT_SYSTEMIMAGE_NAME	:= libnvgpu-drv.so
+NV_COMPONENT_SYSTEMIMAGE_NAME	:= lib$(NV_COMPONENT_NAME).so
-include $(NV_BUILD_SHARED_LIBRARY)
 endif
 
 # Local Variables:

libs/dgpu/Makefile.interface.tmk

@@ -0,0 +1,23 @@
+################################### tell Emacs this is a -*- makefile-gmake -*-
+#
+# Copyright (c) 2020, NVIDIA CORPORATION.  All Rights Reserved.
+#
+# NVIDIA CORPORATION and its licensors retain all intellectual property
+# and proprietary rights in and to this software, related documentation
+# and any modifications thereto.  Any use, reproduction, disclosure or
+# distribution of this software and related documentation without an express
+# license agreement from NVIDIA CORPORATION is strictly prohibited.
+#
+###############################################################################
+
+ifdef NV_INTERFACE_FLAG_SHARED_LIBRARY_SECTION
+NV_INTERFACE_NAME             := nvgpu-drv-dgpu
+NV_INTERFACE_EXPORTS          := lib$(NV_INTERFACE_NAME)_safe
+NV_INTERFACE_PUBLIC_INCLUDES  := . include
+endif
+
+# Local Variables:
+# indent-tabs-mode: t
+# tab-width: 8
+# End:
+# vi: set tabstop=8 noexpandtab:

libs/dgpu/Makefile.tmk

@@ -0,0 +1,25 @@
+################################### tell Emacs this is a -*- makefile-gmake -*-
+#
+# Copyright (c) 2020, NVIDIA CORPORATION.  All Rights Reserved.
+#
+# NVIDIA CORPORATION and its licensors retain all intellectual property
+# and proprietary rights in and to this software, related documentation
+# and any modifications thereto.  Any use, reproduction, disclosure or
+# distribution of this software and related documentation without an express
+# license agreement from NVIDIA CORPORATION is strictly prohibited.
+#
+###############################################################################
+
+ifdef NV_COMPONENT_FLAG_SHARED_LIBRARY_SECTION
+include $(NV_BUILD_START_COMPONENT)
+NV_COMPONENT_NAME := nvgpu-drv-dgpu
+CONFIG_NVGPU_DGPU := 1
+include $(NV_COMPONENT_DIR)/../Makefile.common.tmk
+include $(NV_BUILD_SHARED_LIBRARY)
+endif
+
+# Local Variables:
+# indent-tabs-mode: t
+# tab-width: 8
+# End:
+# vi: set tabstop=8 noexpandtab:

libs/dgpu/libnvgpu-drv-dgpu_safe.export

@@ -0,0 +1,797 @@
+# Copyright (c) 2020, NVIDIA CORPORATION.  All rights reserved.
+
+bitmap_find_next_zero_area_off
+bitmap_find_next_zero_area
+fb_gv11b_write_mmu_fault_buffer_get
+find_first_bit
+find_first_zero_bit
+find_next_bit
+gk20a_as_alloc_share
+gk20a_as_release_share
+gk20a_channel_disable
+gk20a_channel_enable
+gk20a_channel_read_state
+gk20a_fifo_get_pb_timeslice
+gk20a_fifo_get_runlist_timeslice
+gk20a_fifo_init_pbdma_map
+gk20a_fifo_intr_1_enable
+gk20a_fifo_intr_1_isr
+gk20a_fifo_intr_handle_chsw_error
+gk20a_fifo_intr_handle_runlist_event
+gk20a_fifo_pbdma_isr
+gk20a_from_as
+gk20a_get_pde_pgsz
+gk20a_get_pte_pgsz
+gk20a_mm_fb_flush
+gk20a_mm_l2_flush
+gk20a_mm_l2_invalidate
+gk20a_ptimer_isr
+gk20a_ramin_alloc_size
+gk20a_ramin_base_shift
+gk20a_read_ptimer
+gk20a_runlist_length_max
+gk20a_runlist_hw_submit
+gk20a_runlist_wait_pending
+gk20a_runlist_write_state
+gk20a_userd_entry_size
+gk20a_vm_release_share
+gk20a_bus_init_hw
+gk20a_bus_isr
+gm20b_channel_bind
+gm20b_channel_force_ctx_reload
+gm20b_device_info_parse_enum
+gm20b_fb_dump_vpr_info
+gm20b_fb_dump_wpr_info
+gm20b_fb_mmu_ctrl
+gm20b_fb_mmu_debug_ctrl
+gm20b_fb_mmu_debug_rd
+gm20b_fb_mmu_debug_wr
+gm20b_fb_read_wpr_info
+gm20b_fb_tlb_invalidate
+gm20b_fb_vpr_info_fetch
+gm20b_gr_falcon_get_fecs_ctx_state_store_major_rev_id
+gm20b_is_engine_gr
+gm20b_mm_get_big_page_sizes
+gm20b_pbdma_acquire_val
+gm20b_pbdma_device_fatal_0_intr_descs
+gm20b_pbdma_format_gpfifo_entry
+gm20b_pbdma_get_ctrl_hce_priv_mode_yes
+gm20b_pbdma_get_fc_subdevice
+gm20b_pbdma_get_gp_base
+gm20b_pbdma_get_gp_base_hi
+gm20b_pbdma_get_userd_addr
+gm20b_pbdma_get_userd_aperture_mask
+gm20b_pbdma_get_userd_hi_addr
+gm20b_pbdma_handle_intr
+gm20b_pbdma_handle_intr_0
+gm20b_pbdma_read_data
+gm20b_pbdma_restartable_0_intr_descs
+gm20b_ramin_set_big_page_size
+gm20b_read_engine_status_info
+gm20b_read_pbdma_status_info
+gm20b_top_get_max_gpc_count
+gm20b_top_get_max_tpc_per_gpc_count
+gm20b_top_get_max_fbps_count
+gm20b_top_get_max_ltc_per_fbp
+gm20b_top_get_max_lts_per_ltc
+gm20b_top_get_num_ltcs
+gm20b_fuse_status_opt_fbp
+gm20b_priv_ring_enable
+gm20b_priv_set_timeout_settings
+gm20b_priv_ring_enum_ltc
+gm20b_priv_ring_get_gpc_count
+gm20b_priv_ring_get_fbp_count
+gm20b_gr_falcon_submit_fecs_method_op
+gm20b_gr_falcon_ctrl_ctxsw
+gm20b_bus_bar1_bind
+gp10b_bus_bar2_bind
+gp10b_ce_nonstall_isr
+gp10b_get_max_page_table_levels
+gp10b_mm_get_default_big_page_size
+gp10b_mm_get_iommu_bit
+gp10b_mm_get_mmu_levels
+gp10b_mm_init_bar2_vm
+gp10b_mm_remove_bar2_vm
+gp10b_pbdma_get_config_auth_level_privileged
+gp10b_pbdma_get_fc_runlist_timeslice
+gp10b_pbdma_get_signature
+gp10b_ramin_init_pdb
+gp10b_engine_init_ce_info
+gp10b_get_num_engine_type_entries
+gp10b_get_device_info
+gp10b_is_engine_ce
+gp10b_priv_ring_isr
+gp10b_priv_ring_decode_error_code
+gp10b_ramfc_commit_userd
+gv100_dump_engine_status
+gv100_read_engine_status_info
+gv11b_ce_get_num_pce
+gv11b_ce_init_prod_values
+gv11b_ce_mthd_buffer_fault_in_bar2_fault
+gv11b_ce_stall_isr
+gv11b_channel_count
+gv11b_channel_read_state
+gv11b_channel_reset_faulted
+gv11b_channel_unbind
+gv11b_device_info_parse_data
+gv11b_elcg_init_idle_filters
+gv11b_fb_ecc_free
+gv11b_fb_ecc_init
+gv11b_fb_fault_buf_configure_hw
+gv11b_fb_fault_buf_set_state_hw
+gv11b_fb_fault_buffer_get_ptr_update
+gv11b_fb_fault_buffer_size_val
+gv11b_fb_handle_bar2_fault
+gv11b_fb_handle_mmu_fault
+gv11b_fb_init_fs_state
+gv11b_fb_init_hw
+gv11b_fb_intr_disable
+gv11b_fb_intr_enable
+gv11b_fb_intr_is_mmu_fault_pending
+gv11b_fb_intr_isr
+gv11b_fb_is_fault_buf_enabled
+gv11b_fb_is_fault_buffer_empty
+gv11b_fb_mmu_fault_info_dump
+gv11b_fb_read_mmu_fault_addr_lo_hi
+gv11b_fb_read_mmu_fault_buffer_get
+gv11b_fb_read_mmu_fault_buffer_put
+gv11b_fb_read_mmu_fault_buffer_size
+gv11b_fb_read_mmu_fault_info
+gv11b_fb_read_mmu_fault_inst_lo_hi
+gv11b_fb_read_mmu_fault_status
+gv11b_fb_write_mmu_fault_buffer_lo_hi
+gv11b_fb_write_mmu_fault_buffer_size
+gv11b_fb_write_mmu_fault_status
+gv11b_fifo_ctxsw_timeout_enable
+gv11b_fifo_handle_ctxsw_timeout
+gv11b_fifo_handle_sched_error
+gv11b_fifo_intr_0_enable
+gv11b_fifo_intr_0_isr
+gv11b_fifo_intr_set_recover_mask
+gv11b_fifo_intr_unset_recover_mask
+gv11b_fifo_is_preempt_pending
+gv11b_fifo_mmu_fault_id_to_pbdma_id
+gv11b_fifo_preempt_channel
+gv11b_fifo_preempt_poll_pbdma
+gv11b_fifo_preempt_trigger
+gv11b_get_litter_value
+gv11b_gpu_phys_addr
+gv11b_init_fifo_reset_enable_hw
+gv11b_init_fifo_setup_hw
+gv11b_init_hal
+gv11b_init_therm_setup_hw
+gv11b_is_fault_engine_subid_gpc
+gv11b_mc_is_mmu_fault_pending
+gv11b_mm_copy_from_fault_snap_reg
+gv11b_mm_is_bar1_supported
+gv11b_mm_init_inst_block
+gv11b_mm_l2_flush
+gv11b_mm_mmu_fault_disable_hw
+gv11b_mm_mmu_fault_handle_mmu_fault_common
+gv11b_mm_mmu_fault_handle_nonreplay_replay_fault
+gv11b_mm_mmu_fault_handle_other_fault_notify
+gv11b_mm_mmu_fault_info_mem_destroy
+gv11b_mm_mmu_fault_parse_mmu_fault_info
+gv11b_mm_mmu_fault_setup_hw
+gv11b_mm_mmu_fault_setup_sw
+gv11b_pbdma_channel_fatal_0_intr_descs
+gv11b_pbdma_config_userd_writeback_enable
+gv11b_pbdma_get_fc_pb_header
+gv11b_pbdma_get_fc_target
+gv11b_pbdma_handle_intr_0
+gv11b_pbdma_handle_intr_1
+gv11b_pbdma_intr_enable
+gv11b_pbdma_set_channel_info_veid
+gv11b_pbdma_setup_hw
+gv11b_ramfc_capture_ram_dump
+gv11b_ramfc_setup
+gv11b_ramin_init_subctx_pdb
+gv11b_ramin_set_eng_method_buffer
+gv11b_ramin_set_gr_ptr
+gv11b_runlist_count_max
+gv11b_runlist_entry_size
+gv11b_runlist_get_tsg_entry
+gv11b_runlist_get_ch_entry
+gv11b_therm_init_elcg_mode
+gv11b_tsg_enable
+gv11b_usermode_base
+gv11b_usermode_bus_base
+gv11b_usermode_doorbell_token
+gv11b_usermode_ring_doorbell
+gv11b_class_is_valid_compute
+gv11b_class_is_valid
+gv11b_slcg_bus_gating_prod_size
+gv11b_slcg_bus_get_gating_prod
+gv11b_slcg_ce2_gating_prod_size
+gv11b_slcg_ce2_get_gating_prod
+gv11b_slcg_chiplet_gating_prod_size
+gv11b_slcg_chiplet_get_gating_prod
+gv11b_slcg_fb_gating_prod_size
+gv11b_slcg_fb_get_gating_prod
+gv11b_slcg_fifo_gating_prod_size
+gv11b_slcg_fifo_get_gating_prod
+gv11b_slcg_gr_gating_prod_size
+gv11b_slcg_gr_get_gating_prod
+gv11b_slcg_ltc_gating_prod_size
+gv11b_slcg_ltc_get_gating_prod
+gv11b_slcg_perf_gating_prod_size
+gv11b_slcg_perf_get_gating_prod
+gv11b_slcg_priring_gating_prod_size
+gv11b_slcg_priring_get_gating_prod
+gv11b_slcg_pmu_gating_prod_size
+gv11b_slcg_pmu_get_gating_prod
+gv11b_slcg_xbar_gating_prod_size
+gv11b_slcg_xbar_get_gating_prod
+gv11b_slcg_hshub_gating_prod_size
+gv11b_slcg_hshub_get_gating_prod
+gv11b_slcg_therm_get_gating_prod
+gv11b_slcg_therm_gating_prod_size
+gv11b_blcg_bus_gating_prod_size
+gv11b_blcg_bus_get_gating_prod
+gv11b_blcg_ce_gating_prod_size
+gv11b_blcg_ce_get_gating_prod
+gv11b_blcg_fb_gating_prod_size
+gv11b_blcg_fb_get_gating_prod
+gv11b_blcg_fifo_gating_prod_size
+gv11b_blcg_fifo_get_gating_prod
+gv11b_blcg_gr_gating_prod_size
+gv11b_blcg_gr_get_gating_prod
+gv11b_blcg_ltc_gating_prod_size
+gv11b_blcg_ltc_get_gating_prod
+gv11b_blcg_pmu_gating_prod_size
+gv11b_blcg_pmu_get_gating_prod
+gv11b_blcg_xbar_gating_prod_size
+gv11b_blcg_xbar_get_gating_prod
+gv11b_blcg_hshub_gating_prod_size
+gv11b_blcg_hshub_get_gating_prod
+gv11b_netlist_is_firmware_defined
+gv11b_top_get_num_lce
+gv11b_bus_configure_debug_bus
+mc_gp10b_intr_stall_unit_config
+mc_gp10b_intr_nonstall_unit_config
+nvgpu_acr_bootstrap_hs_acr
+nvgpu_acr_construct_execute
+nvgpu_acr_init
+nvgpu_acr_is_lsf_lazy_bootstrap
+nvgpu_alloc
+nvgpu_alloc_base
+nvgpu_alloc_common_init
+nvgpu_alloc_destroy
+nvgpu_alloc_end
+nvgpu_alloc_fixed
+nvgpu_alloc_gr_ctx_struct
+nvgpu_alloc_initialized
+nvgpu_alloc_inst_block
+nvgpu_alloc_length
+nvgpu_alloc_pte
+nvgpu_alloc_release_carveout
+nvgpu_alloc_reserve_carveout
+nvgpu_alloc_space
+nvgpu_allocator_init
+nvgpu_aperture_is_sysmem
+nvgpu_aperture_mask
+nvgpu_bar1_readl
+nvgpu_bar1_writel
+nvgpu_big_alloc_impl
+nvgpu_big_free
+nvgpu_big_pages_possible
+nvgpu_bitmap_clear
+nvgpu_bitmap_set
+nvgpu_bsearch
+nvgpu_bug_cb_longjmp
+nvgpu_bug_register_cb
+nvgpu_bug_unregister_cb
+nvgpu_can_busy
+nvgpu_ce_engine_interrupt_mask
+nvgpu_ce_init_support
+nvgpu_cg_blcg_fb_ltc_load_enable
+nvgpu_cg_blcg_fifo_load_enable
+nvgpu_cg_blcg_pmu_load_enable
+nvgpu_cg_blcg_ce_load_enable
+nvgpu_cg_blcg_gr_load_enable
+nvgpu_cg_slcg_fb_ltc_load_enable
+nvgpu_cg_slcg_priring_load_enable
+nvgpu_cg_slcg_fifo_load_enable
+nvgpu_cg_slcg_pmu_load_enable
+nvgpu_cg_slcg_therm_load_enable
+nvgpu_cg_slcg_ce2_load_enable
+nvgpu_cg_init_gr_load_gating_prod
+nvgpu_cg_elcg_enable_no_wait
+nvgpu_cg_elcg_disable_no_wait
+nvgpu_channel_abort
+nvgpu_channel_alloc_inst
+nvgpu_channel_cleanup_sw
+nvgpu_channel_close
+nvgpu_channel_commit_va
+nvgpu_channel_debug_dump_all
+nvgpu_channel_disable_tsg
+nvgpu_channel_enable_tsg
+nvgpu_channel_free_inst
+nvgpu_channel_from_id__func
+nvgpu_channel_kill
+nvgpu_channel_mark_error
+nvgpu_channel_open_new
+nvgpu_channel_put__func
+nvgpu_channel_setup_bind
+nvgpu_channel_refch_from_inst_ptr
+nvgpu_channel_resume_all_serviceable_ch
+nvgpu_channel_semaphore_wakeup
+nvgpu_channel_set_unserviceable
+nvgpu_channel_setup_sw
+nvgpu_channel_suspend_all_serviceable_ch
+nvgpu_channel_sw_quiesce
+nvgpu_check_gpu_state
+nvgpu_cond_broadcast
+nvgpu_cond_broadcast_interruptible
+nvgpu_cond_broadcast_locked
+nvgpu_cond_destroy
+nvgpu_cond_get_fault_injection
+nvgpu_cond_init
+nvgpu_cond_lock
+nvgpu_cond_signal
+nvgpu_cond_signal_interruptible
+nvgpu_cond_signal_locked
+nvgpu_cond_timedwait
+nvgpu_cond_unlock
+nvgpu_current_pid
+nvgpu_current_tid
+nvgpu_current_time_ms
+nvgpu_current_time_ns
+nvgpu_current_time_us
+nvgpu_detect_chip
+nvgpu_dma_alloc
+nvgpu_dma_alloc_get_fault_injection
+nvgpu_dma_alloc_flags_sys
+nvgpu_dma_alloc_map
+nvgpu_dma_alloc_map_sys
+nvgpu_dma_alloc_sys
+nvgpu_dma_free
+nvgpu_dma_free_sys
+nvgpu_dma_unmap_free
+nvgpu_ecc_counter_init_per_lts
+nvgpu_ecc_init_support
+nvgpu_engine_act_interrupt_mask
+nvgpu_engine_check_valid_id
+nvgpu_engine_cleanup_sw
+nvgpu_engine_enum_from_type
+nvgpu_engine_find_busy_doing_ctxsw
+nvgpu_engine_get_active_eng_info
+nvgpu_engine_get_all_ce_reset_mask
+nvgpu_engine_get_fast_ce_runlist_id
+nvgpu_engine_get_gr_id
+nvgpu_engine_get_gr_runlist_id
+nvgpu_engine_get_id_and_type
+nvgpu_engine_get_ids
+nvgpu_engine_get_mask_on_id
+nvgpu_engine_get_runlist_busy_engines
+nvgpu_engine_id_to_mmu_fault_id
+nvgpu_engine_is_valid_runlist_id
+nvgpu_engine_init_info
+nvgpu_engine_mmu_fault_id_to_engine_id
+nvgpu_engine_mmu_fault_id_to_eng_id_and_veid
+nvgpu_engine_mmu_fault_id_to_eng_ve_pbdma_id
+nvgpu_engine_mmu_fault_id_to_veid
+nvgpu_engine_setup_sw
+nvgpu_engine_status_get_ctx_id_type
+nvgpu_engine_status_get_next_ctx_id_type
+nvgpu_engine_status_is_ctx_type_tsg
+nvgpu_engine_status_is_next_ctx_type_tsg
+nvgpu_engine_status_is_ctxsw
+nvgpu_engine_status_is_ctxsw_invalid
+nvgpu_engine_status_is_ctxsw_load
+nvgpu_engine_status_is_ctxsw_save
+nvgpu_engine_status_is_ctxsw_switch
+nvgpu_engine_status_is_ctxsw_valid
+nvgpu_falcon_get_id
+nvgpu_falcon_hs_ucode_load_bootstrap
+nvgpu_falcon_copy_to_dmem
+nvgpu_falcon_copy_to_imem
+nvgpu_falcon_get_instance
+nvgpu_falcon_mailbox_read
+nvgpu_falcon_mailbox_write
+nvgpu_falcon_mem_scrub_wait
+nvgpu_falcon_reset
+nvgpu_falcon_set_irq
+nvgpu_falcon_sw_free
+nvgpu_falcon_sw_init
+nvgpu_falcon_wait_for_halt
+nvgpu_falcon_wait_idle
+nvgpu_fbp_init_support
+nvgpu_fbp_get_max_fbps_count
+nvgpu_fbp_get_fbp_en_mask
+nvgpu_fbp_remove_support
+nvgpu_fifo_cleanup_sw_common
+nvgpu_fifo_decode_pbdma_ch_eng_status
+nvgpu_fifo_init_support
+nvgpu_fifo_suspend
+nvgpu_fifo_sw_quiesce
+nvgpu_finalize_poweron
+nvgpu_free
+nvgpu_free_enabled_flags
+nvgpu_free_fixed
+nvgpu_free_gr_ctx_struct
+nvgpu_get
+nvgpu_get_gpfifo_entry_size
+nvgpu_get_pte
+nvgpu_gmmu_init_page_table
+nvgpu_gmmu_map
+nvgpu_gmmu_map_locked
+nvgpu_gmmu_map_fixed
+nvgpu_gmmu_unmap
+nvgpu_gmmu_unmap_locked
+nvgpu_golden_ctx_verif_get_fault_injection
+nvgpu_gr_alloc
+nvgpu_gr_config_init
+nvgpu_gr_config_deinit
+nvgpu_gr_config_get_max_gpc_count
+nvgpu_gr_config_get_max_tpc_count
+nvgpu_gr_config_get_max_tpc_per_gpc_count
+nvgpu_gr_config_get_gpc_count
+nvgpu_gr_config_get_tpc_count
+nvgpu_gr_config_get_ppc_count
+nvgpu_gr_config_get_pe_count_per_gpc
+nvgpu_gr_config_get_sm_count_per_tpc
+nvgpu_gr_config_get_gpc_mask
+nvgpu_gr_config_get_gpc_ppc_count
+nvgpu_gr_config_get_gpc_skip_mask
+nvgpu_gr_config_get_gpc_tpc_count
+nvgpu_gr_config_get_pes_tpc_count
+nvgpu_gr_config_get_pes_tpc_mask
+nvgpu_gr_config_get_gpc_tpc_mask
+nvgpu_gr_config_get_gpc_tpc_mask_base
+nvgpu_gr_config_get_gpc_tpc_count_base
+nvgpu_gr_config_get_sm_info
+nvgpu_gr_config_get_sm_info_global_tpc_index
+nvgpu_gr_config_get_sm_info_gpc_index
+nvgpu_gr_config_get_sm_info_sm_index
+nvgpu_gr_config_get_sm_info_tpc_index
+nvgpu_gr_config_get_no_of_sm
+nvgpu_gr_config_set_gpc_tpc_mask
+nvgpu_gr_config_set_no_of_sm
+nvgpu_gr_config_set_sm_info_global_tpc_index
+nvgpu_gr_config_set_sm_info_gpc_index
+nvgpu_gr_config_set_sm_info_sm_index
+nvgpu_gr_config_set_sm_info_tpc_index
+nvgpu_gr_ctx_alloc
+nvgpu_gr_ctx_alloc_patch_ctx
+nvgpu_gr_ctx_desc_alloc
+nvgpu_gr_ctx_desc_free
+nvgpu_gr_ctx_free
+nvgpu_gr_ctx_free_patch_ctx
+nvgpu_gr_ctx_get_tsgid
+nvgpu_gr_ctx_map_global_ctx_buffers
+nvgpu_gr_ctx_patch_write
+nvgpu_gr_ctx_patch_write_begin
+nvgpu_gr_ctx_patch_write_end
+nvgpu_gr_ctx_set_size
+nvgpu_gr_enable_hw
+nvgpu_gr_engine_interrupt_mask
+nvgpu_gr_falcon_get_fecs_ucode_segments
+nvgpu_gr_falcon_get_gpccs_ucode_segments
+nvgpu_gr_falcon_get_surface_desc_cpu_va
+nvgpu_gr_falcon_init_ctxsw
+nvgpu_gr_falcon_init_ctx_state
+nvgpu_gr_falcon_init_ctxsw_ucode
+nvgpu_gr_falcon_init_support
+nvgpu_gr_falcon_load_secure_ctxsw_ucode
+nvgpu_gr_falcon_remove_support
+nvgpu_gr_free
+nvgpu_gr_fs_state_init
+nvgpu_gr_get_config_ptr
+nvgpu_gr_global_ctx_buffer_alloc
+nvgpu_gr_global_ctx_buffer_free
+nvgpu_gr_global_ctx_buffer_get_mem
+nvgpu_gr_global_ctx_buffer_map
+nvgpu_gr_global_ctx_buffer_ready
+nvgpu_gr_global_ctx_buffer_unmap
+nvgpu_gr_global_ctx_compare_golden_images
+nvgpu_gr_global_ctx_deinit_local_golden_image
+nvgpu_gr_global_ctx_desc_alloc
+nvgpu_gr_global_ctx_desc_free
+nvgpu_gr_global_ctx_init_local_golden_image
+nvgpu_gr_global_ctx_load_local_golden_image
+nvgpu_gr_global_ctx_set_size
+nvgpu_gr_init
+nvgpu_gr_init_support
+nvgpu_gr_intr_init_support
+nvgpu_gr_intr_remove_support
+nvgpu_gr_intr_handle_fecs_error
+nvgpu_gr_intr_flush_channel_tlb
+nvgpu_gr_obj_ctx_alloc
+nvgpu_gr_obj_ctx_deinit
+nvgpu_gr_obj_ctx_init
+nvgpu_gr_obj_ctx_is_golden_image_ready
+nvgpu_gr_obj_ctx_set_ctxsw_preemption_mode
+nvgpu_gr_prepare_sw
+nvgpu_gr_remove_support
+nvgpu_gr_subctx_alloc
+nvgpu_gr_subctx_free
+nvgpu_gr_suspend
+nvgpu_gr_sw_ready
+nvgpu_has_syncpoints
+nvgpu_init_enabled_flags
+nvgpu_init_hal
+nvgpu_init_ltc_support
+nvgpu_init_mm_support
+nvgpu_init_therm_support
+nvgpu_insert_mapped_buf
+nvgpu_inst_block_addr
+nvgpu_iommuable
+nvgpu_free_inst_block
+nvgpu_inst_block_ptr
+nvgpu_is_enabled
+nvgpu_kcalloc_impl
+nvgpu_kfree_impl
+nvgpu_kmalloc_impl
+nvgpu_kmem_cache_alloc
+nvgpu_kmem_cache_create
+nvgpu_kmem_cache_destroy
+nvgpu_kmem_cache_free
+nvgpu_kmem_get_fault_injection
+nvgpu_kzalloc_impl
+nvgpu_ltc_ecc_free
+nvgpu_ltc_get_cacheline_size
+nvgpu_ltc_get_ltc_count
+nvgpu_ltc_get_slices_per_ltc
+nvgpu_ltc_remove_support
+nvgpu_ltc_sync_enabled
+nvgpu_local_golden_image_get_fault_injection
+nvgpu_log_msg_impl
+nvgpu_mc_intr_mask
+nvgpu_mc_intr_nonstall_pause
+nvgpu_mc_intr_nonstall_resume
+nvgpu_mc_intr_nonstall_unit_config
+nvgpu_mc_intr_stall_pause
+nvgpu_mc_intr_stall_resume
+nvgpu_mc_intr_stall_unit_config
+nvgpu_memcmp
+nvgpu_memcpy
+nvgpu_memset
+nvgpu_mem_create_from_mem
+nvgpu_mem_create_from_phys
+nvgpu_mem_get_addr
+nvgpu_mem_get_phys_addr
+nvgpu_mem_iommu_translate
+nvgpu_mem_is_sysmem
+nvgpu_mem_is_word_aligned
+nvgpu_mem_posix_create_from_list
+nvgpu_mem_rd
+nvgpu_mem_rd32
+nvgpu_mem_rd32_pair
+nvgpu_mem_rd_n
+nvgpu_mem_sgl_dma
+nvgpu_mem_sgl_gpu_addr
+nvgpu_mem_sgl_length
+nvgpu_mem_sgl_next
+nvgpu_mem_sgl_phys
+nvgpu_mem_sgt_free
+nvgpu_mem_sgt_iommuable
+nvgpu_mem_sgt_posix_create_from_list
+nvgpu_mem_wr
+nvgpu_mem_wr32
+nvgpu_mem_wr_n
+nvgpu_mm_get_available_big_page_sizes
+nvgpu_mm_get_default_big_page_size
+nvgpu_mm_setup_hw
+nvgpu_mm_suspend
+nvgpu_msleep
+nvgpu_mutex_acquire
+nvgpu_mutex_destroy
+nvgpu_mutex_init
+nvgpu_mutex_release
+nvgpu_mutex_tryacquire
+nvgpu_netlist_deinit_ctx_vars
+nvgpu_netlist_init_ctx_vars
+nvgpu_netlist_get_sw_non_ctx_load_av_list
+nvgpu_netlist_get_sw_ctx_load_aiv_list
+nvgpu_netlist_get_sw_method_init_av_list
+nvgpu_netlist_get_sw_bundle_init_av_list
+nvgpu_netlist_get_sw_veid_bundle_init_av_list
+nvgpu_netlist_get_sw_bundle64_init_av64_list
+nvgpu_netlist_get_fecs_inst_count
+nvgpu_netlist_get_fecs_data_count
+nvgpu_netlist_get_gpccs_inst_count
+nvgpu_netlist_get_gpccs_data_count
+nvgpu_netlist_get_fecs_inst_list
+nvgpu_netlist_get_fecs_data_list
+nvgpu_netlist_get_gpccs_inst_list
+nvgpu_netlist_get_gpccs_data_list
+nvgpu_nvgpu_get_fault_injection
+nvgpu_pbdma_cleanup_sw
+nvgpu_pbdma_find_for_runlist
+nvgpu_pbdma_status_is_chsw_load
+nvgpu_pbdma_status_is_chsw_save
+nvgpu_pbdma_status_is_chsw_switch
+nvgpu_pbdma_status_is_chsw_valid
+nvgpu_pbdma_status_is_id_type_tsg
+nvgpu_pbdma_status_is_next_id_type_tsg
+nvgpu_pbdma_setup_sw
+nvgpu_pd_alloc
+nvgpu_pd_cache_fini
+nvgpu_pd_cache_init
+nvgpu_pd_free
+nvgpu_pd_gpu_addr
+nvgpu_pd_offset_from_index
+nvgpu_pd_write
+nvgpu_platform_is_silicon
+nvgpu_pmu_early_init
+nvgpu_pmu_remove_support
+nvgpu_pmu_reset
+nvgpu_posix_bug
+nvgpu_posix_warn
+nvgpu_posix_cleanup
+nvgpu_posix_enable_fault_injection
+nvgpu_posix_fault_injection_get_container
+nvgpu_posix_fault_injection_handle_call
+nvgpu_posix_ffs
+nvgpu_posix_fls
+nvgpu_posix_init_fault_injection
+nvgpu_posix_io_add_reg_space
+nvgpu_posix_io_check_sequence
+nvgpu_posix_io_delete_reg_space
+nvgpu_posix_io_get_error_code
+nvgpu_posix_io_init_reg_space
+nvgpu_posix_io_readl_reg_space
+nvgpu_posix_io_record_access
+nvgpu_posix_io_register_reg_space
+nvgpu_posix_io_start_recorder
+nvgpu_posix_io_unregister_reg_space
+nvgpu_posix_io_writel_reg_space
+nvgpu_posix_io_get_reg_space
+nvgpu_posix_is_fault_injection_cntr_set
+nvgpu_posix_is_fault_injection_triggered
+nvgpu_posix_probe
+nvgpu_posix_register_io
+nvgpu_pte_words
+nvgpu_queue_alloc
+nvgpu_queue_free
+nvgpu_queue_in
+nvgpu_queue_in_locked
+nvgpu_queue_out
+nvgpu_queue_out_locked
+nvgpu_queue_out_get_fault_injection
+nvgpu_preempt_channel
+nvgpu_preempt_get_timeout
+nvgpu_preempt_poll_tsg_on_pbdma
+nvgpu_prepare_poweroff
+nvgpu_print_current_impl
+nvgpu_put
+nvgpu_raw_spinlock_acquire
+nvgpu_raw_spinlock_init
+nvgpu_raw_spinlock_release
+nvgpu_rbtree_enum_next
+nvgpu_rbtree_enum_start
+nvgpu_rbtree_insert
+nvgpu_rbtree_less_than_search
+nvgpu_rbtree_range_search
+nvgpu_rbtree_search
+nvgpu_rbtree_unlink
+nvgpu_readl
+nvgpu_readl_impl
+nvgpu_readl_get_fault_injection
+nvgpu_request_firmware
+nvgpu_runlist_cleanup_sw
+nvgpu_runlist_construct_locked
+nvgpu_runlist_get_runlists_mask
+nvgpu_runlist_interleave_level_name
+nvgpu_runlist_lock_active_runlists
+nvgpu_runlist_reload_ids
+nvgpu_runlist_set_state
+nvgpu_runlist_setup_sw
+nvgpu_runlist_unlock_active_runlists
+nvgpu_runlist_unlock_runlists
+nvgpu_runlist_update_for_channel
+nvgpu_runlist_update_locked
+nvgpu_rwsem_init
+nvgpu_rwsem_down_read
+nvgpu_rwsem_down_write
+nvgpu_rwsem_up_read
+nvgpu_rwsem_up_write
+nvgpu_timeout_expired_fault_injection
+nvgpu_timeout_init
+nvgpu_timeout_peek_expired
+nvgpu_timers_get_fault_injection
+nvgpu_tsg_abort
+nvgpu_tsg_bind_channel
+nvgpu_tsg_check_and_get_from_id
+nvgpu_tsg_cleanup_sw
+nvgpu_tsg_default_timeslice_us
+nvgpu_tsg_disable
+nvgpu_tsg_disable_sched
+nvgpu_tsg_enable_sched
+nvgpu_tsg_from_ch
+nvgpu_tsg_get_from_id
+nvgpu_tsg_mark_error
+nvgpu_tsg_open
+nvgpu_tsg_release
+nvgpu_tsg_reset_faulted_eng_pbdma
+nvgpu_tsg_set_ctx_mmu_error
+nvgpu_tsg_set_error_notifier
+nvgpu_tsg_setup_sw
+nvgpu_tsg_unbind_channel
+nvgpu_tsg_unbind_channel_check_hw_state
+nvgpu_tsg_unbind_channel_check_ctx_reload
+nvgpu_set_bit
+nvgpu_set_enabled
+nvgpu_set_power_state
+nvgpu_set_pte
+nvgpu_sgt_alignment
+nvgpu_sgt_create_from_mem
+nvgpu_sgt_free
+nvgpu_sgt_get_dma
+nvgpu_sgt_get_gpu_addr
+nvgpu_sgt_get_ipa
+nvgpu_sgt_get_next
+nvgpu_sgt_get_phys
+nvgpu_sgt_iommuable
+nvgpu_sgt_ipa_to_pa
+nvgpu_spinlock_acquire
+nvgpu_spinlock_init
+nvgpu_spinlock_release
+nvgpu_strnadd_u32
+nvgpu_sw_quiesce
+nvgpu_sw_quiesce_remove_support
+nvgpu_thread_create
+nvgpu_thread_create_priority
+nvgpu_thread_get_fault_injection
+nvgpu_thread_is_running
+nvgpu_thread_join
+nvgpu_thread_running_true_get_fault_injection
+nvgpu_thread_should_stop
+nvgpu_thread_stop
+nvgpu_thread_stop_graceful
+nvgpu_udelay
+nvgpu_usermode_writel
+nvgpu_usleep_range
+nvgpu_vfree_impl
+nvgpu_vm_alloc_va
+nvgpu_vm_area_alloc
+nvgpu_vm_area_find
+nvgpu_vm_area_free
+nvgpu_vm_area_validate_buffer
+nvgpu_vm_bind_channel
+nvgpu_vm_do_init
+nvgpu_vm_find_mapped_buf
+nvgpu_vm_find_mapped_buf_less_than
+nvgpu_vm_find_mapped_buf_range
+nvgpu_vm_find_mapping
+nvgpu_vm_free_va
+nvgpu_vm_get
+nvgpu_vm_get_buffers
+nvgpu_vm_init
+nvgpu_vm_map
+nvgpu_vm_mapping_batch_finish
+nvgpu_vm_mapping_batch_start
+nvgpu_vm_pde_coverage_bit_count
+nvgpu_vm_put
+nvgpu_vm_put_buffers
+nvgpu_vm_unmap
+nvgpu_vmalloc_impl
+nvgpu_vzalloc_impl
+nvgpu_wait_for_deferred_interrupts
+nvgpu_worker_deinit
+nvgpu_worker_enqueue
+nvgpu_worker_init
+nvgpu_worker_init_name
+nvgpu_worker_should_stop
+nvgpu_writel
+nvgpu_writel_check
+nvgpu_clear_bit
+nvgpu_test_bit
+nvgpu_test_and_clear_bit
+nvgpu_test_and_set_bit
+vm_aspace_id
+nvgpu_get_nvhost_dev
+nvgpu_free_nvhost_dev
+nvgpu_ecc_free
+nvgpu_ecc_counter_init
+nvgpu_ecc_finalize_support
+nvgpu_rc_fifo_recover
+nvgpu_rc_ctxsw_timeout
+nvgpu_rc_pbdma_fault
+nvgpu_rc_runlist_update
+nvgpu_rc_preempt_timeout
+nvgpu_rc_gr_fault
+nvgpu_rc_sched_error_bad_tsg
+nvgpu_rc_tsg_and_related_engines
+nvgpu_rc_mmu_fault

libs/igpu/Makefile.interface.tmk

@@ -8,19 +8,11 @@
 # distribution of this software and related documentation without an express
 # license agreement from NVIDIA CORPORATION is strictly prohibited.
 #
-# tmake for SW Mobile component makefile
-#
-# libnvgpu-drv interface makefile fragment
-#
 ###############################################################################
 
 ifdef NV_INTERFACE_FLAG_SHARED_LIBRARY_SECTION
-NV_INTERFACE_NAME             := nvgpu-drv
+NV_INTERFACE_NAME             := nvgpu-drv-igpu
-ifeq ($(CONFIG_NVGPU_DGPU), 1)
+NV_INTERFACE_EXPORTS          := lib$(NV_INTERFACE_NAME)_safe
-NV_INTERFACE_EXPORTS         := lib$(NV_INTERFACE_NAME)-dgpu_safe
-else
-NV_INTERFACE_EXPORTS         := lib$(NV_INTERFACE_NAME)_safe
-endif
 NV_INTERFACE_PUBLIC_INCLUDES  := . include
 endif
 

libs/igpu/Makefile.tmk

@@ -0,0 +1,24 @@
+################################### tell Emacs this is a -*- makefile-gmake -*-
+#
+# Copyright (c) 2020, NVIDIA CORPORATION.  All Rights Reserved.
+#
+# NVIDIA CORPORATION and its licensors retain all intellectual property
+# and proprietary rights in and to this software, related documentation
+# and any modifications thereto.  Any use, reproduction, disclosure or
+# distribution of this software and related documentation without an express
+# license agreement from NVIDIA CORPORATION is strictly prohibited.
+#
+###############################################################################
+
+ifdef NV_COMPONENT_FLAG_SHARED_LIBRARY_SECTION
+include $(NV_BUILD_START_COMPONENT)
+NV_COMPONENT_NAME		:= nvgpu-drv-igpu
+include $(NV_COMPONENT_DIR)/../Makefile.common.tmk
+include $(NV_BUILD_SHARED_LIBRARY)
+endif
+
+# Local Variables:
+# indent-tabs-mode: t
+# tab-width: 8
+# End:
+# vi: set tabstop=8 noexpandtab:

userspace/Makefile

@@ -104,7 +104,7 @@ all: $(OUT)/nvgpu_unit $(UNITS)
 
 # Convenience targets.
 .PHONY: libnvgpu core units
-libnvgpu: $(OUT)/libnvgpu-drv.so
+libnvgpu: $(OUT)/libnvgpu-drv-igpu.so
 core: $(OUT)/nvgpu_unit
 units: $(UNITS)
 
@@ -114,17 +114,17 @@ units: $(UNITS)
 # used for anything beyond that.
 #
 # Also it really should have its own rule...
-$(OUT)/nvgpu_unit: $(OUT)/libnvgpu-drv.so $(CORE_OBJS)
+$(OUT)/nvgpu_unit: $(OUT)/libnvgpu-drv-igpu.so $(CORE_OBJS)
 	$(CC) -shared -o $(OUT)/libnvgpu_unit.so	\
 		$(CORE_OBJS) $(LIB_PATHS) $(LIBS)
 	$(CC) --coverage	 			\
 		-o $(OUT)/nvgpu_unit $(CORE_OBJS) $(LIB_PATHS) $(LIBS)
 
-$(OUT)/libnvgpu-drv.so: $(OBJS)
+$(OUT)/libnvgpu-drv-igpu.so: $(OBJS)
-	$(CC) -shared -Wl,--no-undefined -o $(OUT)/libnvgpu-drv.so $(OBJS) -lgcov -rdynamic -lpthread
+	$(CC) -shared -Wl,--no-undefined -o $(OUT)/libnvgpu-drv-igpu.so $(OBJS) -lgcov -rdynamic -lpthread
 
 # Default build target for all the nvgpu driver object files we want to build in
-# userspace. These get bundled into libnvgpu-drv.so.
+# userspace. These get bundled into libnvgpu-drv-igpu.so.
 $(NVGPU_OUT)/%.o : $(NVGPU_SRC)/%.c $(HEADERS)
 	@if [ ! -d $(dir $@) ] ; then \
 		mkdir -p $(dir $@) ; \
@@ -132,14 +132,14 @@ $(NVGPU_OUT)/%.o : $(NVGPU_SRC)/%.c $(HEADERS)
 	$(CC) --coverage $(CFLAGS) -c -o $@ $<
 
 # Default build target for all the nvgpu-next driver object files we want to
-# build in userspace. These too get bundled into libnvgpu-drv.so.
+# build in userspace. These too get bundled into libnvgpu-drv-igpu.so.
 $(NVGPU_OUT)/%.o : $(NVGPU_NEXT_SRC)/%.c $(HEADERS) $(HEADERS_NEXT)
 	@if [ ! -d $(dir $@) ] ; then \
 		mkdir -p $(dir $@) ; \
 	fi
 	$(CC) --coverage $(CFLAGS) $(configs) -c -o $@ $<
 
-# Build target for unit test files. These are not part of the libnvgpu-drv.so.
+# Build target for unit test files. These are not part of the libnvgpu-drv-igpu.so.
 # These comprise the unit test framework.
 $(CORE_OUT)/%.o : $(CORE_SRC)/%.c $(CORE_HEADERS)
 	@if [ ! -d $(dir $@) ] ; then \
@@ -152,7 +152,7 @@ export TWD INCLUDES CONFIGS UNIT_SRC UNIT_OUT
 export CC CFLAGS LIB_PATHS LIBS
 
 .PHONY: $(UNITS)
-$(UNITS): $(OUT)/libnvgpu-drv.so
+$(UNITS): $(OUT)/libnvgpu-drv-igpu.so
 	@echo "Building unit module: $@"
 	@+$(MAKE) --no-print-directory -C $@
 

userspace/Makefile.interface.tmk

@@ -23,8 +23,6 @@
 #
 # tmake for SW Mobile component makefile
 #
-# libnvgpu-drv interface makefile fragment
-#
 ###############################################################################
 
 ifdef NV_INTERFACE_FLAG_SHARED_LIBRARY_SECTION

userspace/Makefile.tmk

@@ -37,7 +37,6 @@ NVGPU_UNIT_COMMON_INCLUDES	:= \
                                 ../drivers/gpu/nvgpu \
                                 ../drivers/gpu/nvgpu/include
 
-
 ifdef NV_COMPONENT_FLAG_NVTEST_EXECUTABLE_SECTION
 include $(NV_BUILD_START_COMPONENT)
 
@@ -49,7 +48,11 @@ NV_COMPONENT_SOURCES		:= \
 NV_COMPONENT_INCLUDES		:= \
 				$(NVGPU_UNIT_COMMON_INCLUDES)
 
-NV_COMPONENT_NEEDED_INTERFACE_DIRS := ../drivers/gpu/nvgpu
+ifndef NVGPU_UNIT_GPU
+NVGPU_UNIT_GPU			:= igpu
+endif
+
+NV_COMPONENT_NEEDED_INTERFACE_DIRS := ../libs/$(NVGPU_UNIT_GPU)
 
 ifneq ($(NV_BUILD_CONFIGURATION_OS_IS_QNX),1)
 NV_COMPONENT_SYSTEM_SHARED_LIBRARIES += pthread

userspace/gcov.sh

@@ -42,7 +42,7 @@ if [ -d "./build" ]; then
 fi
 
 #Extract the root path of the source code
-NVGPU_SRC_ROOT=$(readelf -p .debug_line $LIB_FOLDER/libnvgpu-drv.so | \
+NVGPU_SRC_ROOT=$(readelf -p .debug_line $LIB_FOLDER/libnvgpu-drv-igpu.so | \
 	grep drivers/gpu/nvgpu/os/posix | sed  's/\s*\[.*\]\s*//g' | \
 	sed 's/drivers\/gpu\/nvgpu\/os\/posix//g' | head -n 1)
 NVGPU_SRC_ROOT=$(realpath $NVGPU_SRC_ROOT)

userspace/include/unit/args.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2018-2020, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -32,7 +32,7 @@
 #define stringify(x)			__stringify(x)
 
 #ifndef __DEFAULT_ARG_DRIVER_LOAD_PATH
-#define __DEFAULT_ARG_DRIVER_LOAD_PATH	./libnvgpu-drv.so
+#define __DEFAULT_ARG_DRIVER_LOAD_PATH	./libnvgpu-drv-igpu.so
 #endif
 #define DEFAULT_ARG_DRIVER_LOAD_PATH	stringify(__DEFAULT_ARG_DRIVER_LOAD_PATH)
 

userspace/install-unit.sh

@@ -116,7 +116,7 @@ fi
 # And copy...
 jcp $nvgpu_bins/userspace-l4t_64/nvgpu_unit              nvgpu_unit/nvgpu_unit
 jcp $nvgpu_bins/userspace-l4t_64/libnvgpu_unit-lib.so    nvgpu_unit/libnvgpu-unit.so
-jcp $nvgpu_bins/drivers/gpu/nvgpu-l4t_64/libnvgpu-drv.so nvgpu_unit/libnvgpu-drv.so
+jcp $nvgpu_bins/drivers/gpu/nvgpu-l4t_64/libnvgpu-drv-igpu.so nvgpu_unit/libnvgpu-drv-igpu.so
 jcp $TOP/kernel/nvgpu/userspace/unit.sh                  nvgpu_unit/unit.sh
 jcp $TOP/kernel/nvgpu/userspace/gcov.sh                  nvgpu_unit/gcov.sh
 jcp $TOP/kernel/nvgpu/userspace/testlist.py              nvgpu_unit/testlist.py

userspace/nvgpu_submit_unit.sh

@@ -23,7 +23,7 @@
 #
 # Execute the unit test. Args to this script are passed on to the unit test
 # core. This just serves to set the LD_LIBRARY_PATH environment variable such
-# that unit tests are found and nvgpu-drv is found.
+# that unit tests are found and nvgpu-drv-igpu is found.
 #
 
 this_script_dir="$( cd "$( dirname "${BASH_SOURCE[0]}" )" > /dev/null && pwd )"

userspace/src/nvgpu.c

@@ -31,7 +31,7 @@
  * resolving addresses into symbols easier in the future.
  *
  * Also, this makes people think carefully about what functions to call in
- * nvgpu-drv from the unit test FW. The interaction should really be limited
+ * nvgpu-drv-igpu from the unit test FW. The interaction should really be limited
  * and doing explicit name lookups is a good way to prevent too much coupling.
  */
 int core_load_nvgpu(struct unit_fw *fw)
@@ -43,14 +43,14 @@ int core_load_nvgpu(struct unit_fw *fw)
 	if (fw->args->is_qnx == 0) {
 		/*
 		 * Specify a GLOBAL binding so that subsequently loaded
-		 * unit tests see the nvgpu-drv library. They will of course
+		 * unit tests see the nvgpu-drv-igpu library. They will of course
 		 * need it (and will access it directly). I.e they will link
-		 * against nvgpu-drv and this should satisfy that linkage.
+		 * against nvgpu-drv-igpu and this should satisfy that linkage.
 		 */
 		flag |= RTLD_GLOBAL;
 	}
 
-	/* TODO: WAR: remove this dependency of libnvgpu-drv.so for qnx unit
+	/* TODO: WAR: remove this dependency of libnvgpu-drv-igpu.so for qnx unit
 	 * test, refer NVGPU-1935 for more detail */
 	fw->nvgpu_so = dlopen(load_path, flag);
 

userspace/unit.sh

@@ -23,7 +23,7 @@
 #
 # Execute the unit test. Args to this script are passed on to the unit test
 # core. This just serves to set the LD_LIBRARY_PATH environment variable such
-# that unit tests are found and nvgpu-drv is found.
+# that unit tests are found and nvgpu-drv-igpu is found.
 #
 
 options=$(getopt -o t: --long test-level: -- "$@")
@@ -34,13 +34,13 @@ pushd $this_script_dir
 if [ -f nvgpu_unit ]; then
         # if the executable is in the current directory, we are running on
         # target, so use that dir structure
-        LD_LIBRARY_PATH=".:units"
+        LD_LIBRARY_PATH=".:units/igpu"
         cores=$(cat /proc/cpuinfo |grep processor |wc -l)
 
 	# Ignore number of cores for now; it seems that the parallel unit
 	# tests are just too buggy and that they really don't save much
 	# actual computing time.
-        NVGPU_UNIT="./nvgpu_unit --nvtest --unit-load-path units/ --no-color \
+        NVGPU_UNIT="./nvgpu_unit --nvtest --unit-load-path units/igpu --no-color \
                  --num-threads 1"
 else
         # running on host

userspace/units/Makefile.units.common.tmk

@@ -1,6 +1,6 @@
 ################################### tell Emacs this is a -*- makefile-gmake -*-
 #
-# Copyright (c) 2018-2019, NVIDIA CORPORATION.  All rights reserved.
+# Copyright (c) 2018-2020, NVIDIA CORPORATION.  All rights reserved.
 #
 # Permission is hereby granted, free of charge, to any person obtaining a
 # copy of this software and associated documentation files (the "Software"),
@@ -43,9 +43,12 @@ endif
 
 ifdef NVGPU_UNIT_INCLUDES
 NV_COMPONENT_INCLUDES 		:= \
-				$(NVGPU_UNIT_INCLUDES) \
+				$(NVGPU_UNIT_INCLUDES)
-				$(NV_SOURCE)/kernel/nvgpu/userspace/units/mock-iospace/include
 endif
+NV_COMPONENT_INCLUDES 		+= \
+				$(NV_SOURCE)/kernel/nvgpu/userspace/units/mock-iospace/include \
+				$(NV_SOURCE)/kernel/nvgpu/drivers/gpu/nvgpu/include \
+				$(NV_SOURCE)/kernel/nvgpu/drivers/gpu/nvgpu
 
 ifdef NVGPU_CFLAGS
 NV_COMPONENT_CFLAGS		:= \
@@ -72,18 +75,22 @@ NV_COMPONENT_SYSTEM_SHARED_LIBRARIES += $(NVGPU_UNIT_SHARED_LIBRARIES)
 endif
 
 ifdef NVGPU_UNIT_INTERFACE_DIRS
-NV_COMPONENT_NEEDED_INTERFACE_DIRS += \
+NV_COMPONENT_NEEDED_INTERFACE_DIRS += $(NVGPU_UNIT_INTERFACE_DIRS) 
-				$(NVGPU_UNIT_INTERFACE_DIRS) \
+endif
-				$(NV_SOURCE)/kernel/nvgpu/drivers/gpu/nvgpu
+ifdef CONFIG_NVGPU_DGPU
+NV_COMPONENT_NEEDED_INTERFACE_DIRS += $(NV_SOURCE)/kernel/nvgpu/libs/dgpu
 else
-NV_COMPONENT_NEEDED_INTERFACE_DIRS += \
+NV_COMPONENT_NEEDED_INTERFACE_DIRS += $(NV_SOURCE)/kernel/nvgpu/libs/igpu
-                                $(NV_SOURCE)/kernel/nvgpu/drivers/gpu/nvgpu
 endif
 
 ifdef NVGPU_SYSTEMIMAGE_DIR
 NV_COMPONENT_SYSTEMIMAGE_DIR := $(NVGPU_SYSTEMIMAGE_DIR)
 else
-NV_COMPONENT_SYSTEMIMAGE_DIR    := $(NV_SYSTEMIMAGE_TEST_EXECUTABLE_DIR)/nvgpu_unit/units
+ifdef CONFIG_NVGPU_DGPU
+NV_COMPONENT_SYSTEMIMAGE_DIR    := $(NV_SYSTEMIMAGE_TEST_EXECUTABLE_DIR)/nvgpu_unit/units/dgpu
+else
+NV_COMPONENT_SYSTEMIMAGE_DIR    := $(NV_SYSTEMIMAGE_TEST_EXECUTABLE_DIR)/nvgpu_unit/units/igpu
+endif
 endif
 
 systemimage:: $(NV_COMPONENT_SYSTEMIMAGE_DIR)