gpu: nvgpu: add channel_user_syncpt

Refactor user managed syncpoints out of the channel sync infrastructure
that deals with jobs submitted via the kernel api. The user syncpt only
needs to expose the id and gpu address of the reserved syncpoint. None
of the rest (fences, priv cmdbufs) is needed for that, so it hasn't been
ideal to couple with the user-allocated syncpts.

With user syncpts now provided by channel_user_syncpt, remove the
user_managed flag from the kernel sync api.

This allows moving all the kernel submit sync code to be conditionally
compiled in only when needed, and separates the user sync functionality
in a more clear way from the rest with a minimal API.

[this is squashed with commit 5111caea601a (gpu: nvgpu: guard user
syncpt with nvhost config) from
https://git-master.nvidia.com/r/c/linux-nvgpu/+/2325009]

Jira NVGPU-4548

Change-Id: I99259fc9cbd30bbd478ed86acffcce12768502d3
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2321768
(cherry picked from commit 1095ad353f5f1cf7ca180d0701bc02a607404f5e)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2319629
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Konsta Hölttä
2020-03-26 11:53:59 +02:00
committed by Alex Waterman
parent b813adbf49
commit 4f80c6b8a9
21 changed files with 380 additions and 191 deletions

View File

@@ -26,6 +26,13 @@
#ifndef NVGPU_CHANNEL_SYNC_PRIV_H
#define NVGPU_CHANNEL_SYNC_PRIV_H
/*
* These APIs are used for job synchronization that we know about in the
* driver. If submits happen in userspace only, none of this will be needed and
* won't be included. This is here just to double check for now.
*/
#ifdef CONFIG_NVGPU_KERNEL_MODE_SUBMIT
#include <nvgpu/atomic.h>
#include <nvgpu/types.h>
@@ -47,7 +54,6 @@ struct nvgpu_channel_sync {
* instead use the public APIs starting with nvgpu_channel_sync_*
*/
struct nvgpu_channel_sync_ops {
#ifdef CONFIG_NVGPU_KERNEL_MODE_SUBMIT
int (*wait_fence_raw)(struct nvgpu_channel_sync *s, u32 id, u32 thresh,
struct priv_cmd_entry *entry);
@@ -69,11 +75,12 @@ struct nvgpu_channel_sync_ops {
bool register_irq);
void (*set_min_eq_max)(struct nvgpu_channel_sync *s);
#endif
void (*set_safe_state)(struct nvgpu_channel_sync *s);
void (*destroy)(struct nvgpu_channel_sync *s);
};
#endif /* CONFIG_NVGPU_KERNEL_MODE_SUBMIT */
#endif /* NVGPU_CHANNEL_SYNC_PRIV_H */