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Revert "Revert "gpu: nvgpu: Discard coherency check on gmmu""

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This reverts commit 5b25686d54.

Change-Id: I2370df22e19978bed0d046b1a7ef99cc97e5d009
Signed-off-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2018543
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Vinod Gopalakrishnakurup
2019-02-13 11:52:56 -08:00
committed by mobile promotions
parent 8ebf8ac8ff
commit 5001308dc4
5 changed files with 6 additions and 19 deletions
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13
drivers/gpu/nvgpu/common/mm/gmmu/page_table.c
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@@ -713,7 +713,7 @@ static int __nvgpu_gmmu_update_page_table(struct vm_gk20a *vm,
"vm=%s " "vm=%s "
"%-5s GPU virt %#-12llx +%#-9llx phys %#-12llx " "%-5s GPU virt %#-12llx +%#-9llx phys %#-12llx "
"phys offset: %#-4llx; pgsz: %3dkb perm=%-2s | " "phys offset: %#-4llx; pgsz: %3dkb perm=%-2s | "
"kind=%#02x APT=%-6s %c%c%c%c%c", "kind=%#02x APT=%-6s %c%c%c%c",
vm->name, vm->name,
(sgt != NULL) ? "MAP" : "UNMAP", (sgt != NULL) ? "MAP" : "UNMAP",
virt_addr, virt_addr,
@@ -727,7 +727,6 @@ static int __nvgpu_gmmu_update_page_table(struct vm_gk20a *vm,
attrs->cacheable ? 'C' : '-', attrs->cacheable ? 'C' : '-',
attrs->sparse ? 'S' : '-', attrs->sparse ? 'S' : '-',
attrs->priv ? 'P' : '-', attrs->priv ? 'P' : '-',
attrs->coherent ? 'I' : '-',
attrs->valid ? 'V' : '-'); attrs->valid ? 'V' : '-');
err = __nvgpu_gmmu_do_update_page_table(vm, err = __nvgpu_gmmu_do_update_page_table(vm,
@@ -785,7 +784,6 @@ u64 gk20a_locked_gmmu_map(struct vm_gk20a *vm,
.rw_flag = rw_flag, .rw_flag = rw_flag,
.sparse = sparse, .sparse = sparse,
.priv = priv, .priv = priv,
.coherent = flags & NVGPU_VM_MAP_IO_COHERENT,
.valid = (flags & NVGPU_VM_MAP_UNMAPPED_PTE) == 0U, .valid = (flags & NVGPU_VM_MAP_UNMAPPED_PTE) == 0U,
.aperture = aperture .aperture = aperture
}; };
@@ -801,14 +799,6 @@ u64 gk20a_locked_gmmu_map(struct vm_gk20a *vm,
attrs.l3_alloc = (bool)(flags & NVGPU_VM_MAP_L3_ALLOC); attrs.l3_alloc = (bool)(flags & NVGPU_VM_MAP_L3_ALLOC);
/*
* Handle the IO coherency aperture: make sure the .aperture field is
* correct based on the IO coherency flag.
*/
if (attrs.coherent && attrs.aperture == APERTURE_SYSMEM) {
attrs.aperture = APERTURE_SYSMEM_COH;
}
/* /*
* Only allocate a new GPU VA range if we haven't already been passed a * Only allocate a new GPU VA range if we haven't already been passed a
* GPU VA range. This facilitates fixed mappings. * GPU VA range. This facilitates fixed mappings.
@@ -866,7 +856,6 @@ void gk20a_locked_gmmu_unmap(struct vm_gk20a *vm,
.rw_flag = rw_flag, .rw_flag = rw_flag,
.sparse = sparse, .sparse = sparse,
.priv = 0, .priv = 0,
.coherent = 0,
.valid = 0, .valid = 0,
.aperture = APERTURE_INVALID, .aperture = APERTURE_INVALID,
}; };

3
drivers/gpu/nvgpu/gk20a/mm_gk20a.c
View File

@@ -288,7 +288,7 @@ static void update_gmmu_pte_locked(struct vm_gk20a *vm,
pte_dbg(g, attrs, pte_dbg(g, attrs,
"PTE: i=%-4u size=%-2u offs=%-4u | " "PTE: i=%-4u size=%-2u offs=%-4u | "
"GPU %#-12llx phys %#-12llx " "GPU %#-12llx phys %#-12llx "
"pgsz: %3dkb perm=%-2s kind=%#02x APT=%-6s %c%c%c%c%c " "pgsz: %3dkb perm=%-2s kind=%#02x APT=%-6s %c%c%c%c "
"ctag=0x%08x " "ctag=0x%08x "
"[0x%08x, 0x%08x]", "[0x%08x, 0x%08x]",
pd_idx, l->entry_size, pd_offset, pd_idx, l->entry_size, pd_offset,
@@ -300,7 +300,6 @@ static void update_gmmu_pte_locked(struct vm_gk20a *vm,
attrs->cacheable ? 'C' : '-', attrs->cacheable ? 'C' : '-',
attrs->sparse ? 'S' : '-', attrs->sparse ? 'S' : '-',
attrs->priv ? 'P' : '-', attrs->priv ? 'P' : '-',
attrs->coherent ? 'I' : '-',
attrs->valid ? 'V' : '-', attrs->valid ? 'V' : '-',
U32(attrs->ctag) >> U32(ctag_shift), U32(attrs->ctag) >> U32(ctag_shift),
pte_w[1], pte_w[0]); pte_w[1], pte_w[0]);

3
drivers/gpu/nvgpu/gp10b/mm_gp10b.c
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@@ -264,7 +264,7 @@ static void update_gmmu_pte_locked(struct vm_gk20a *vm,
"vm=%s " "vm=%s "
"PTE: i=%-4u size=%-2u | " "PTE: i=%-4u size=%-2u | "
"GPU %#-12llx phys %#-12llx " "GPU %#-12llx phys %#-12llx "
"pgsz: %3dkb perm=%-2s kind=%#02x APT=%-6s %c%c%c%c%c " "pgsz: %3dkb perm=%-2s kind=%#02x APT=%-6s %c%c%c%c "
"ctag=0x%08x " "ctag=0x%08x "
"[0x%08x, 0x%08x]", "[0x%08x, 0x%08x]",
vm->name, vm->name,
@@ -277,7 +277,6 @@ static void update_gmmu_pte_locked(struct vm_gk20a *vm,
attrs->cacheable ? 'C' : '-', attrs->cacheable ? 'C' : '-',
attrs->sparse ? 'S' : '-', attrs->sparse ? 'S' : '-',
attrs->priv ? 'P' : '-', attrs->priv ? 'P' : '-',
attrs->coherent ? 'I' : '-',
attrs->valid ? 'V' : '-', attrs->valid ? 'V' : '-',
(u32)attrs->ctag / g->ops.fb.compression_page_size(g), (u32)attrs->ctag / g->ops.fb.compression_page_size(g),
pte_w[1], pte_w[0]); pte_w[1], pte_w[0]);

4
drivers/gpu/nvgpu/include/nvgpu/gmmu.h
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@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a * Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"), * copy of this software and associated documentation files (the "Software"),
@@ -63,7 +63,6 @@ enum gk20a_mem_rw_flag {
* rw_flag: Flag from enum gk20a_mem_rw_flag * rw_flag: Flag from enum gk20a_mem_rw_flag
* sparse: Set if the mapping should be sparse. * sparse: Set if the mapping should be sparse.
* priv: Privilidged mapping. * priv: Privilidged mapping.
* coherent: Set if the mapping should be IO coherent.
* valid: Set if the PTE should be marked valid. * valid: Set if the PTE should be marked valid.
* aperture: VIDMEM or SYSMEM. * aperture: VIDMEM or SYSMEM.
* debug: When set print debugging info. * debug: When set print debugging info.
@@ -81,7 +80,6 @@ struct nvgpu_gmmu_attrs {
enum gk20a_mem_rw_flag rw_flag; enum gk20a_mem_rw_flag rw_flag;
bool sparse; bool sparse;
bool priv; bool priv;
bool coherent;
bool valid; bool valid;
enum nvgpu_aperture aperture; enum nvgpu_aperture aperture;
bool debug; bool debug;

2
include/uapi/linux/nvgpu.h
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@@ -1954,6 +1954,8 @@ struct nvgpu_as_bind_channel_args {
* *
* Specify that a mapping shall be IO coherent. * Specify that a mapping shall be IO coherent.
* *
* DEPRECATED: do not use! This will be removed in a future update.
*
* %NVGPU_AS_MAP_BUFFER_FLAGS_UNMAPPED_PTE * %NVGPU_AS_MAP_BUFFER_FLAGS_UNMAPPED_PTE
* *
* Specify that a mapping shall be marked as invalid but otherwise * Specify that a mapping shall be marked as invalid but otherwise