gpu: nvgpu: Move final gv100 and tu104 MM HALs to hal/mm/

Move the HALs under gv100 and tu104 to mm_gv100.c and mm_tu104.c
HAL files. Update the necessary makefiles and include directives
as well.

JIRA NVGPU-2042

Change-Id: I664e9d13e963bae826fc8f4b9b90cc4e1c231a90
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2109695
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

drivers/gpu/nvgpu/Makefile

@@ -153,6 +153,8 @@ nvgpu-y += \
 	hal/mm/mm_gm20b.o \
 	hal/mm/mm_gp10b.o \
 	hal/mm/mm_gv11b.o \
+	hal/mm/mm_gv100.o \
+	hal/mm/mm_tu104.o \
 	hal/mm/cache/flush_gk20a.o \
 	hal/mm/cache/flush_gv11b.o \
 	hal/mm/gmmu/gmmu_gk20a.o \
@@ -599,7 +601,3 @@ nvgpu-$(CONFIG_TEGRA_GR_VIRTUALIZATION) += \
 nvgpu-$(CONFIG_GK20A_CYCLE_STATS) += \
 	common/perf/cyclestats_snapshot.o \
 	common/cyclestats/cyclestats.o
-
-nvgpu-y += \
-	gv100/mm_gv100.o \
-	tu104/mm_tu104.o \

drivers/gpu/nvgpu/Makefile.sources

@@ -243,12 +243,12 @@ srcs += common/sim/sim.c \
 	common/nvlink/nvlink_tu104.c \
 	common/nvlink/nvlink.c \
 	common/fence/fence.c \
-	gv100/mm_gv100.c \
-	tu104/mm_tu104.c \
 	hal/mm/mm_gk20a.c \
 	hal/mm/mm_gm20b.c \
 	hal/mm/mm_gp10b.c \
 	hal/mm/mm_gv11b.c \
+	hal/mm/mm_gv100.c \
+	hal/mm/mm_tu104.c \
 	hal/mm/cache/flush_gk20a.c \
 	hal/mm/cache/flush_gv11b.c \
 	hal/mm/mmu_fault/mmu_fault_gv11b.c \

drivers/gpu/nvgpu/hal/init/hal_gv100.c

@@ -24,6 +24,7 @@
 
 #include "hal/mm/mm_gp10b.h"
 #include "hal/mm/mm_gv11b.h"
+#include "hal/mm/mm_gv100.h"
 #include "hal/mm/cache/flush_gk20a.h"
 #include "hal/mm/cache/flush_gv11b.h"
 #include "hal/mm/gmmu/gmmu_gm20b.h"
@@ -157,7 +158,6 @@
 #include "hal_gv100.h"
 #include "hal_gv100_litter.h"
 
-#include "gv100/mm_gv100.h"
 #include "hal/clk/clk_gv100.h"
 
 #include <nvgpu/gk20a.h>

drivers/gpu/nvgpu/hal/init/hal_tu104.c

@@ -25,6 +25,7 @@
 #include "hal/mm/mm_gm20b.h"
 #include "hal/mm/mm_gp10b.h"
 #include "hal/mm/mm_gv11b.h"
+#include "hal/mm/mm_tu104.h"
 #include "hal/mm/cache/flush_gk20a.h"
 #include "hal/mm/cache/flush_gv11b.h"
 #include "hal/mm/gmmu/gmmu_gm20b.h"
@@ -176,7 +177,6 @@
 #include "common/vbios/bios_sw_gp106.h"
 #include "common/vbios/bios_sw_tu104.h"
 
-#include "tu104/mm_tu104.h"
 #include "hal/fbpa/fbpa_tu104.h"
 #include "hal_tu104.h"
 #include "hal_tu104_litter.h"

drivers/gpu/nvgpu/hal/mm/mm_gv100.c

@@ -1,7 +1,5 @@
 /*
- * GV100 memory management
+ * Copyright (c) 2017-2019, NVIDIA CORPORATION.  All rights reserved.
- *
- * Copyright (c) 2017-2018, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -22,21 +20,19 @@
  * DEALINGS IN THE SOFTWARE.
  */
 
-#include <nvgpu/sizes.h>
+#include <nvgpu/mm.h>
-#include <nvgpu/io.h>
-#include <nvgpu/gk20a.h>
 
-#include "gv100/mm_gv100.h"
+#include "mm_gv100.h"
 
 u32 gv100_mm_get_flush_retries(struct gk20a *g, enum nvgpu_flush_op op)
 {
 	switch (op) {
 	/* GV100 has a large FB so it needs larger timeouts */
 	case NVGPU_FLUSH_FB:
-		return 2000;
+		return 2000U;
 	case NVGPU_FLUSH_L2_FLUSH:
-		return 2000;
+		return 2000U;
 	default:
-		return 200; /* Default retry timer */
+		return 200U; /* Default retry timer */
 	}
 }

drivers/gpu/nvgpu/hal/mm/mm_gv100.h

@@ -1,7 +1,5 @@
 /*
- * GV100 memory management
+ * Copyright (c) 2019, NVIDIA CORPORATION.  All rights reserved.
- *
- * Copyright (c) 2017, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -22,10 +20,11 @@
  * DEALINGS IN THE SOFTWARE.
  */
 
-#ifndef MM_GV100_H
+#ifndef HAL_MM_MM_GV100_H
-#define MM_GV100_H
+#define HAL_MM_MM_GV100_H
 
 struct gk20a;
+enum nvgpu_flush_op;
 
 u32 gv100_mm_get_flush_retries(struct gk20a *g, enum nvgpu_flush_op op);
 

drivers/gpu/nvgpu/hal/mm/mm_tu104.c

@@ -24,7 +24,7 @@
 
 #include <nvgpu/mm.h>
 
-#include "tu104/mm_tu104.h"
+#include "mm_tu104.h"
 
 u32 tu104_mm_get_flush_retries(struct gk20a *g, enum nvgpu_flush_op op)
 {
@@ -33,13 +33,13 @@ u32 tu104_mm_get_flush_retries(struct gk20a *g, enum nvgpu_flush_op op)
 	switch (op) {
 	/* TU104 has a large FB so it needs larger timeouts */
 	case NVGPU_FLUSH_FB:
-		retries = 2500;
+		retries = 2500U;
 		break;
 	case NVGPU_FLUSH_L2_FLUSH:
-		retries = 2000;
+		retries = 2000U;
 		break;
 	default:
-		retries = 200; /* Default retry timer */
+		retries = 200U; /* Default retry timer */
 		break;
 	}
 

drivers/gpu/nvgpu/hal/mm/mm_tu104.h

@@ -22,8 +22,8 @@
  * DEALINGS IN THE SOFTWARE.
  */
 
-#ifndef MM_TU104_H
+#ifndef HAL_MM_MM_TU104_H
-#define MM_TU104_H
+#define HAL_MM_MM_TU104_H
 
 struct gk20a;
 enum nvgpu_flush_op;