nv-tegra-mirror/linux-nvgpu
1
0
Fork 0
mirror of git://nv-tegra.nvidia.com/linux-nvgpu.git synced 2025-12-22 17:36:20 +03:00
Code Issues Packages Projects Releases Wiki Activity

gpu: nvgpu: make debugger register access ELPG protected

Browse Source 
Some of the APIs that access debugger register are not protected
from ELPG. This might trigger PRI access timeouts for corresponding
registers if GR engine is power gated.

Add gr_gk20a_elpg_protected_call() to protect against ELPG.

Bug 2820066

Change-Id: I467ea28aaea1c0e36c2d6aabce6a2daea6ee9911
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2306383
(cherry picked from commit 0c0eb25ee798db3a8dcd8cab7db06312a220240e)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2313210
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Deepak Nibade
2020-03-03 15:58:42 +05:30
committed by mobile promotions
parent bb2c8ef511
commit 505251d696
1 changed files with 8 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
drivers/gpu/nvgpu/os/linux/ioctl_ctrl.c
View File

@@ -660,7 +660,8 @@ static int nvgpu_gpu_ioctl_trigger_suspend(struct gk20a *g)
return err; return err;
nvgpu_mutex_acquire(&g->dbg_sessions_lock); nvgpu_mutex_acquire(&g->dbg_sessions_lock);
err = g->ops.gr.trigger_suspend(g); err = gr_gk20a_elpg_protected_call(g,
g->ops.gr.trigger_suspend(g));
nvgpu_mutex_release(&g->dbg_sessions_lock); nvgpu_mutex_release(&g->dbg_sessions_lock);
gk20a_idle(g); gk20a_idle(g);
@@ -695,7 +696,8 @@ static int nvgpu_gpu_ioctl_wait_for_pause(struct gk20a *g,
goto out_free; goto out_free;
nvgpu_mutex_acquire(&g->dbg_sessions_lock); nvgpu_mutex_acquire(&g->dbg_sessions_lock);
g->ops.gr.wait_for_pause(g, w_state); (void)gr_gk20a_elpg_protected_call(g,
g->ops.gr.wait_for_pause(g, w_state));
for (sm_id = 0; sm_id < g->gr.no_of_sm; sm_id++) { for (sm_id = 0; sm_id < g->gr.no_of_sm; sm_id++) {
ioctl_w_state[sm_id].valid_warps[0] = ioctl_w_state[sm_id].valid_warps[0] =
@@ -738,7 +740,8 @@ static int nvgpu_gpu_ioctl_resume_from_pause(struct gk20a *g)
return err; return err;
nvgpu_mutex_acquire(&g->dbg_sessions_lock); nvgpu_mutex_acquire(&g->dbg_sessions_lock);
err = g->ops.gr.resume_from_pause(g); err = gr_gk20a_elpg_protected_call(g,
g->ops.gr.resume_from_pause(g));
nvgpu_mutex_release(&g->dbg_sessions_lock); nvgpu_mutex_release(&g->dbg_sessions_lock);
gk20a_idle(g); gk20a_idle(g);
@@ -754,7 +757,8 @@ static int nvgpu_gpu_ioctl_clear_sm_errors(struct gk20a *g)
if (err) if (err)
return err; return err;
err = g->ops.gr.clear_sm_errors(g); err = gr_gk20a_elpg_protected_call(g,
g->ops.gr.clear_sm_errors(g));
gk20a_idle(g); gk20a_idle(g);