From 51a86f81bbe3d3539f90d102bf79ef0b2e96e8a5 Mon Sep 17 00:00:00 2001 From: Seshendra Gadagottu Date: Wed, 15 May 2019 14:12:31 -0700 Subject: [PATCH] gpu: nvgpu: fix MISRA 17.7 in hal ltc driver Add error check for return value from function nvgpu_timeout_init. JIRA NVGPU-3422 Change-Id: Ie89f689539086c5990f0856022aa4e5c4099e190 Signed-off-by: Seshendra Gadagottu Reviewed-on: https://git-master.nvidia.com/r/2119970 GVS: Gerrit_Virtual_Submit Reviewed-by: Philip Elcan Reviewed-by: Vinod Gopalakrishnakurup Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/hal/ltc/ltc_gm20b.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/nvgpu/hal/ltc/ltc_gm20b.c b/drivers/gpu/nvgpu/hal/ltc/ltc_gm20b.c index 4b19a79f5..357cf3378 100644 --- a/drivers/gpu/nvgpu/hal/ltc/ltc_gm20b.c +++ b/drivers/gpu/nvgpu/hal/ltc/ltc_gm20b.c @@ -77,6 +77,7 @@ void gm20b_flush_ltc(struct gk20a *g) u32 ltc_stride = nvgpu_get_litter_value(g, GPU_LIT_LTC_STRIDE); bool is_clean_pending_set = false; bool is_invalidate_pending_set = false; + int err; /* Clean... */ nvgpu_writel_check(g, ltc_ltcs_ltss_tstg_cmgmt1_r(), @@ -108,7 +109,11 @@ void gm20b_flush_ltc(struct gk20a *g) * * So 5ms timeout here should be more than sufficient. */ - nvgpu_timeout_init(g, &timeout, 5, NVGPU_TIMER_CPU_TIMER); + err = nvgpu_timeout_init(g, &timeout, 5, NVGPU_TIMER_CPU_TIMER); + if (err != 0) { + nvgpu_err(g, "nvgpu_timeout_init failed err=%d", err); + return; + } do { int cmgmt1 = ltc_ltc0_ltss_tstg_cmgmt1_r() + @@ -134,7 +139,11 @@ void gm20b_flush_ltc(struct gk20a *g) u32 op_pending; /* Again, 5ms. */ - nvgpu_timeout_init(g, &timeout, 5, NVGPU_TIMER_CPU_TIMER); + err = nvgpu_timeout_init(g, &timeout, 5, NVGPU_TIMER_CPU_TIMER); + if (err != 0) { + nvgpu_err(g, "nvgpu_timeout_init failed err=%d", err); + return; + } do { int cmgmt0 = ltc_ltc0_ltss_tstg_cmgmt0_r() +