diff --git a/drivers/gpu/nvgpu/common/fifo/submit.c b/drivers/gpu/nvgpu/common/fifo/submit.c index 162cc19b5..1c47aa5f6 100644 --- a/drivers/gpu/nvgpu/common/fifo/submit.c +++ b/drivers/gpu/nvgpu/common/fifo/submit.c @@ -573,8 +573,9 @@ static int nvgpu_submit_channel_gpfifo(struct nvgpu_channel *c, nvgpu_profile_snapshot(profile, PROFILE_JOB_TRACKING); /* - * wait_cmd can be unset even if flag_fence_wait exists. See - * the expiration check in channel_sync_syncpt_gen_wait_cmd. + * wait_cmd can be unset even if flag_fence_wait exists; the + * android sync framework for example can provide entirely + * empty fences that act like trivially expired waits. */ if (wait_cmd != NULL) { nvgpu_submit_append_priv_cmdbuf(c, wait_cmd); diff --git a/drivers/gpu/nvgpu/common/sync/channel_sync_syncpt.c b/drivers/gpu/nvgpu/common/sync/channel_sync_syncpt.c index feefd3bf7..adcdd6026 100644 --- a/drivers/gpu/nvgpu/common/sync/channel_sync_syncpt.c +++ b/drivers/gpu/nvgpu/common/sync/channel_sync_syncpt.c @@ -60,31 +60,21 @@ static int channel_sync_syncpt_gen_wait_cmd(struct nvgpu_channel *c, u32 wait_cmd_size, u32 pos, bool preallocated) { int err = 0; - bool is_expired = nvgpu_nvhost_syncpt_is_expired_ext( - c->g->nvhost, id, thresh); - if (is_expired) { - if (preallocated) { - nvgpu_memset(c->g, wait_cmd->mem, - (wait_cmd->off + pos * wait_cmd_size) * (u32)sizeof(u32), - 0, wait_cmd_size * (u32)sizeof(u32)); + if (!preallocated) { + err = nvgpu_channel_alloc_priv_cmdbuf(c, + c->g->ops.sync.syncpt.get_wait_cmd_size(), + wait_cmd); + if (err != 0) { + nvgpu_err(c->g, "not enough priv cmd buffer space"); + return err; } - } else { - if (!preallocated) { - err = nvgpu_channel_alloc_priv_cmdbuf(c, - c->g->ops.sync.syncpt.get_wait_cmd_size(), - wait_cmd); - if (err != 0) { - nvgpu_err(c->g, "not enough priv cmd buffer space"); - return err; - } - } - nvgpu_log(c->g, gpu_dbg_info, "sp->id %d gpu va %llx", - id, c->vm->syncpt_ro_map_gpu_va); - c->g->ops.sync.syncpt.add_wait_cmd(c->g, wait_cmd, - pos * wait_cmd_size, id, thresh, - c->vm->syncpt_ro_map_gpu_va); } + nvgpu_log(c->g, gpu_dbg_info, "sp->id %d gpu va %llx", + id, c->vm->syncpt_ro_map_gpu_va); + c->g->ops.sync.syncpt.add_wait_cmd(c->g, wait_cmd, + pos * wait_cmd_size, id, thresh, + c->vm->syncpt_ro_map_gpu_va); return 0; }