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gpu: nvgpu: fix misra 18.4 violations
This change eliminates MISRA Advisory Rule 18.4 violations in the
following cases:
* nvgpu_submit_append_gpfifo_user_direct()
* nvgpu_submit_append_gpfifo_common()
- use array-indexing to access gpfifo entry lists
* gv11b_gr_intr_record_sm_error_state()
- use array-indexing to access sm_error_states table
Advisory Rule 18.4 states that the +, -, +=, and -= operators should
not be applied to an expression of pointer type.
JIRA NVGPU-3798
Change-Id: I736930e4ba09a88888b0ef48f62496c4082ea5a1
Signed-off-by: Scott Long <scottl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2210173
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
committed by
Alex Waterman
parent
3d546ad863
commit
52a4dd74e2
@@ -234,7 +234,7 @@ static int nvgpu_submit_append_gpfifo_user_direct(struct nvgpu_channel *c,
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u32 length1 = len - length0;
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err = g->os_channel.copy_user_gpfifo(
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gpfifo_cpu + start, userdata,
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&gpfifo_cpu[start], userdata,
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0, length0);
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if (err != 0) {
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return err;
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@@ -248,7 +248,7 @@ static int nvgpu_submit_append_gpfifo_user_direct(struct nvgpu_channel *c,
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}
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} else {
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err = g->os_channel.copy_user_gpfifo(
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gpfifo_cpu + start, userdata,
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&gpfifo_cpu[start], userdata,
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0, len);
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if (err != 0) {
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return err;
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@@ -274,7 +274,7 @@ static void nvgpu_submit_append_gpfifo_common(struct nvgpu_channel *c,
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/* wrap-around */
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u32 length0 = gpfifo_size - start;
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u32 length1 = len - length0;
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struct nvgpu_gpfifo_entry *src2 = src + length0;
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struct nvgpu_gpfifo_entry *src2 = &src[length0];
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nvgpu_mem_wr_n(g, gpfifo_mem, start, src, length0);
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nvgpu_mem_wr_n(g, gpfifo_mem, 0, src2, length1);
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