nvgpu: linux: uapi: Add MIG characteristics flag

* Add MIG gpu characteristics flag
* Add MIG support flag

JIRA NVGPU-5762

Change-Id: Id3b9ec56ab48a8d0828c96881e586f4987b167d6
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2369122
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Lakshmanan M
2020-07-01 10:30:24 +05:30
committed by Alex Waterman
parent 06a43f2adc
commit 530381ee86
3 changed files with 11 additions and 8 deletions

View File

@@ -279,10 +279,13 @@ struct gk20a;
/** zbc classes support */
#define NVGPU_SUPPORT_ZBC 95U
/** Multi Instance GPU support */
#define NVGPU_SUPPORT_MIG 96U
/*
* Must be greater than the largest bit offset in the above list.
*/
#define NVGPU_MAX_ENABLED_BITS 96U
#define NVGPU_MAX_ENABLED_BITS 97U
/**
* @brief Check if the passed flag is enabled.

View File

@@ -268,7 +268,9 @@ static struct nvgpu_flags_mapping flags_mapping[] = {
{NVGPU_GPU_FLAGS_SUPPORT_I2M,
NVGPU_SUPPORT_I2M},
{NVGPU_GPU_FLAGS_SUPPORT_ZBC,
NVGPU_SUPPORT_ZBC}
NVGPU_SUPPORT_ZBC},
{NVGPU_GPU_FLAGS_SUPPORT_MIG,
NVGPU_SUPPORT_MIG}
};
static u64 nvgpu_ctrl_ioctl_gpu_characteristics_flags(struct gk20a *g)
@@ -436,7 +438,6 @@ gk20a_ctrl_ioctl_gpu_characteristics(
nvgpu_set_preemption_mode_flags(g, &gpu);
/* Default values for legacy mode (non MIG) */
gpu.mig_enabled = false;
gpu.gpu_instance_id = 0x0;
gpu.gr_sys_pipe_id = 0x0;
gpu.gr_instance_id = 0x0;

View File

@@ -191,6 +191,9 @@ struct nvgpu_gpu_zbc_query_table_args {
#define NVGPU_GPU_FLAGS_SUPPORT_I2M (1ULL << 43)
/* Flag to indicate whether zbc classes are supported */
#define NVGPU_GPU_FLAGS_SUPPORT_ZBC (1ULL << 44)
/* Flag to indicate whether Multi Instance Gpu per GPU physical device
is enabled/disabled. */
#define NVGPU_GPU_FLAGS_SUPPORT_MIG (1ULL << 45)
/* SM LRF ECC is enabled */
#define NVGPU_GPU_FLAGS_ECC_ENABLED_SM_LRF (1ULL << 60)
/* SM SHM ECC is enabled */
@@ -317,14 +320,10 @@ struct nvgpu_gpu_characteristics {
__u32 max_veid_count_per_tsg;
__u32 num_sub_partition_per_fbpa;
__u8 mig_enabled;
__u8 reserved4[3];
__u32 gpu_instance_id;
__u32 gr_sys_pipe_id;
__u32 gr_sys_pipe_id;
__u32 gr_instance_id;
__u32 reserved5;
/* Notes:
- This struct can be safely appended with new fields. However, always