gpu: nvgpu: unify qnx types unit with posix

Unify qnx types unit with posix.  Modify certain defines as part of
unification.  Modify the fecs trace function mmap_user_buffer to
not have OS specific structure as parameter.  Rename the function
pointer mmap_user_buffer as get_mmap_user_buffer_info to reflect the
functionality handled by the function.

Jira NVGPU-2146

Change-Id: I58ec9bf23a435c039d1b5f04194f56067b11aa28
Signed-off-by: ajesh <akv@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2082619
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
ajesh
2019-03-27 13:01:22 +05:30
committed by mobile promotions
parent 058057853c
commit 535e7836bc
16 changed files with 74 additions and 48 deletions

View File

@@ -292,7 +292,8 @@ static const struct gpu_ops vgpu_gp10b_ops = {
.fecs_trace = {
.alloc_user_buffer = vgpu_alloc_user_buffer,
.free_user_buffer = vgpu_free_user_buffer,
.mmap_user_buffer = vgpu_mmap_user_buffer,
.get_mmap_user_buffer_info =
vgpu_get_mmap_user_buffer_info,
.init = vgpu_fecs_trace_init,
.deinit = vgpu_fecs_trace_deinit,
.enable = vgpu_fecs_trace_enable,

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@@ -50,7 +50,8 @@ bool vgpu_fecs_trace_is_enabled(struct gk20a *g);
int vgpu_fecs_trace_poll(struct gk20a *g);
int vgpu_alloc_user_buffer(struct gk20a *g, void **buf, size_t *size);
int vgpu_free_user_buffer(struct gk20a *g);
int vgpu_mmap_user_buffer(struct gk20a *g, struct vm_area_struct *vma);
void vgpu_get_mmap_user_buffer_info(struct gk20a *g,
void **mmapaddr, size_t *mmapsize);
int vgpu_fecs_trace_max_entries(struct gk20a *g,
struct nvgpu_gpu_ctxsw_trace_filter *filter);
int vgpu_fecs_trace_set_filter(struct gk20a *g,

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@@ -341,7 +341,8 @@ static const struct gpu_ops vgpu_gv11b_ops = {
.fecs_trace = {
.alloc_user_buffer = vgpu_alloc_user_buffer,
.free_user_buffer = vgpu_free_user_buffer,
.mmap_user_buffer = vgpu_mmap_user_buffer,
.get_mmap_user_buffer_info =
vgpu_get_mmap_user_buffer_info,
.init = vgpu_fecs_trace_init,
.deinit = vgpu_fecs_trace_deinit,
.enable = vgpu_fecs_trace_enable,

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@@ -443,7 +443,8 @@ static const struct gpu_ops gp10b_ops = {
.fecs_trace = {
.alloc_user_buffer = nvgpu_gr_fecs_trace_ring_alloc,
.free_user_buffer = nvgpu_gr_fecs_trace_ring_free,
.mmap_user_buffer = nvgpu_gr_fecs_trace_mmap_buffer,
.get_mmap_user_buffer_info =
nvgpu_gr_fecs_trace_get_mmap_buffer_info,
.init = nvgpu_gr_fecs_trace_init,
.deinit = nvgpu_gr_fecs_trace_deinit,
.enable = nvgpu_gr_fecs_trace_enable,

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@@ -561,7 +561,8 @@ static const struct gpu_ops gv100_ops = {
.fecs_trace = {
.alloc_user_buffer = nvgpu_gr_fecs_trace_ring_alloc,
.free_user_buffer = nvgpu_gr_fecs_trace_ring_free,
.mmap_user_buffer = nvgpu_gr_fecs_trace_mmap_buffer,
.get_mmap_user_buffer_info =
nvgpu_gr_fecs_trace_get_mmap_buffer_info,
.init = nvgpu_gr_fecs_trace_init,
.deinit = nvgpu_gr_fecs_trace_deinit,
.enable = nvgpu_gr_fecs_trace_enable,

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@@ -540,7 +540,8 @@ static const struct gpu_ops gv11b_ops = {
.fecs_trace = {
.alloc_user_buffer = nvgpu_gr_fecs_trace_ring_alloc,
.free_user_buffer = nvgpu_gr_fecs_trace_ring_free,
.mmap_user_buffer = nvgpu_gr_fecs_trace_mmap_buffer,
.get_mmap_user_buffer_info =
nvgpu_gr_fecs_trace_get_mmap_buffer_info,
.init = nvgpu_gr_fecs_trace_init,
.deinit = nvgpu_gr_fecs_trace_deinit,
.enable = nvgpu_gr_fecs_trace_enable,

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@@ -173,7 +173,7 @@ struct railgate_stats {
#define GPU_LIT_PERFMON_PMMFBP_ROP_DOMAIN_START 43
#define GPU_LIT_PERFMON_PMMFBP_ROP_DOMAIN_COUNT 44
#define nvgpu_get_litter_value(g, v) (g)->ops.get_litter_value((g), v)
#define nvgpu_get_litter_value(g, v) ((g)->ops.get_litter_value((g), v))
#define MAX_TPC_PG_CONFIGS 3
@@ -612,8 +612,8 @@ struct gpu_ops {
int (*alloc_user_buffer)(struct gk20a *g,
void **buf, size_t *size);
int (*free_user_buffer)(struct gk20a *g);
int (*mmap_user_buffer)(struct gk20a *g,
struct vm_area_struct *vma);
void (*get_mmap_user_buffer_info)(struct gk20a *g,
void **addr, size_t *size);
int (*set_filter)(struct gk20a *g,
struct nvgpu_gpu_ctxsw_trace_filter *filter);
u32 (*get_buffer_full_mailbox_val)(void);
@@ -1333,7 +1333,7 @@ struct gpu_ops {
} boardobj;
struct {
int (*clk_set_boot_clk)(struct gk20a *g);
}clk;
} clk;
} pmu_ver;
struct {
int (*get_netlist_name)(struct gk20a *g, int index, char *name);
@@ -1566,7 +1566,7 @@ struct gpu_ops {
int (*arbiter_clk_init)(struct gk20a *g);
bool (*check_clk_arb_support)(struct gk20a *g);
u32 (*get_arbiter_clk_domains)(struct gk20a *g);
int (*get_arbiter_f_points)(struct gk20a *g,u32 api_domain,
int (*get_arbiter_f_points)(struct gk20a *g, u32 api_domain,
u32 *num_points, u16 *freqs_in_mhz);
int (*get_arbiter_clk_range)(struct gk20a *g, u32 api_domain,
u16 *min_mhz, u16 *max_mhz);

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@@ -176,7 +176,8 @@ int nvgpu_gr_fecs_trace_unbind_channel(struct gk20a *g,
*/
int nvgpu_gr_fecs_trace_ring_alloc(struct gk20a *g, void **buf, size_t *size);
int nvgpu_gr_fecs_trace_ring_free(struct gk20a *g);
int nvgpu_gr_fecs_trace_mmap_buffer(struct gk20a *g, struct vm_area_struct *vma);
void nvgpu_gr_fecs_trace_get_mmap_buffer_info(struct gk20a *g,
void **mmapaddr, size_t *mmapsize);
void nvgpu_gr_fecs_trace_add_tsg_reset(struct gk20a *g, struct tsg_gk20a *tsg);
u8 nvgpu_gpu_ctxsw_tags_to_common_tags(u8 tags);
int nvgpu_gr_fecs_trace_write_entry(struct gk20a *g,

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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -27,6 +27,7 @@
#define NVGPU_KREF_H
#include <nvgpu/atomic.h>
#include <nvgpu/types.h>
struct nvgpu_ref {
nvgpu_atomic_t refcount;

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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -24,7 +24,7 @@
#ifdef __KERNEL__
#include <linux/log2.h>
#elif defined(__NVGPU_POSIX__)
#else
#include <nvgpu/posix/log2.h>
#endif

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@@ -33,7 +33,6 @@
#define is_power_of_2(x) \
({ \
typeof(x) __x__ = (x); \
(__x__ != 0U && ((__x__ & (__x__ - 1U)) == 0U)); \
(__x__ != 0U && ((__x__ & (__x__ - 1U)) == 0U));\
})
#endif /* NVGPU_POSIX_LOG2_H */

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@@ -91,16 +91,22 @@ typedef signed long long s64;
#define DIV_ROUND_UP(n, d) (((n) + (d) - 1U) / (d))
/*
* Only used in clk_gm20b.c which we will never unit test. Don't use!
*/
#define DIV_ROUND_CLOSEST(x, divisor) ({BUG(); 0; })
#define DIV_ROUND_CLOSEST(a, divisor)( \
{ \
typeof(a) val = a; \
typeof(divisor) div = divisor; \
(((typeof(a))-1) > 0 || \
((typeof(divisor))-1) > 0 || (val) > 0) ? \
(((val) + ((div) / 2)) / (div)) : \
(((val) - ((div) / 2)) / (div)); \
} \
)
/*
* Joys of userspace: usually division just works since the compiler can link
* against external division functions implicitly.
*/
#define do_div(a, b) ((a) /= (b))
#define div64_u64(a, b) ((a) / (b))
#define __round_mask(x, y) ((__typeof__(x))((y) - 1U))
@@ -177,12 +183,12 @@ static inline unsigned long __hweight64(uint64_t x)
* Better suited under a compiler.h type header file, but for now these can live
* here.
*/
#define __must_check
#define __must_check __attribute__((warn_unused_result))
#define __maybe_unused __attribute__((unused))
#define __iomem
#define __user
#define unlikely
#define likely
#define unlikely(x) (x)
#define likely(x) (x)
#define __stringify(x) #x

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@@ -24,10 +24,8 @@
#ifdef __KERNEL__
#include <linux/types.h>
#elif defined(__NVGPU_POSIX__)
#include <nvgpu/posix/types.h>
#else
#include <nvgpu_rmos/include/types.h>
#include <nvgpu/posix/types.h>
#endif
/*

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@@ -508,22 +508,42 @@ static struct vm_operations_struct gk20a_ctxsw_dev_vma_ops = {
.close = gk20a_ctxsw_dev_vma_close,
};
int nvgpu_gr_fecs_trace_mmap_buffer(struct gk20a *g,
struct vm_area_struct *vma)
void nvgpu_gr_fecs_trace_get_mmap_buffer_info(struct gk20a *g,
void **mmapaddr, size_t *mmapsize)
{
return remap_vmalloc_range(vma, g->ctxsw_trace->devs[0].hdr, 0);
*mmapaddr = g->ctxsw_trace->devs[0].hdr;
*mmapsize = 0;
}
int gk20a_ctxsw_dev_mmap(struct file *filp, struct vm_area_struct *vma)
{
struct gk20a_ctxsw_dev *dev = filp->private_data;
struct gk20a *g = dev->g;
size_t mmapsize = 0;
void *mmapaddr;
int ret;
nvgpu_log(g, gpu_dbg_fn|gpu_dbg_ctxsw, "vm_start=%lx vm_end=%lx",
vma->vm_start, vma->vm_end);
ret = dev->g->ops.gr.fecs_trace.mmap_user_buffer(dev->g, vma);
dev->g->ops.gr.fecs_trace.get_mmap_user_buffer_info(dev->g,
&mmapaddr, &mmapsize);
if (mmapsize) {
unsigned long size = 0;
unsigned long vsize = vma->vm_end - vma->vm_start;
size = min(mmapsize, vsize);
size = round_up(size, PAGE_SIZE);
ret = remap_pfn_range(vma, vma->vm_start,
(unsigned long) mmapaddr,
size,
vma->vm_page_prot);
} else {
ret = remap_vmalloc_range(vma, mmapaddr, 0);
}
if (likely(!ret)) {
vma->vm_private_data = dev;
vma->vm_ops = &gk20a_ctxsw_dev_vma_ops;
@@ -757,7 +777,7 @@ void nvgpu_gr_fecs_trace_add_tsg_reset(struct gk20a *g, struct tsg_gk20a *tsg)
u8 nvgpu_gpu_ctxsw_tags_to_common_tags(u8 tags)
{
switch (tags){
switch (tags) {
case NVGPU_CTXSW_TAG_SOF:
return NVGPU_GPU_CTXSW_TAG_SOF;
case NVGPU_CTXSW_TAG_CTXSW_REQ_BY_HOST:

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@@ -37,17 +37,11 @@ int vgpu_alloc_user_buffer(struct gk20a *g, void **buf, size_t *size)
return 0;
}
int vgpu_mmap_user_buffer(struct gk20a *g, struct vm_area_struct *vma)
void vgpu_get_mmap_user_buffer_info(struct gk20a *g,
void **mmapaddr, size_t *mmapsize)
{
struct vgpu_fecs_trace *vcst = (struct vgpu_fecs_trace *)g->fecs_trace;
unsigned long size = vgpu_ivm_get_size(vcst->cookie);
unsigned long vsize = vma->vm_end - vma->vm_start;
size = min(size, vsize);
size = round_up(size, PAGE_SIZE);
return remap_pfn_range(vma, vma->vm_start,
vgpu_ivm_get_ipa(vcst->cookie) >> PAGE_SHIFT,
size,
vma->vm_page_prot);
*mmapsize = vgpu_ivm_get_size(vcst->cookie);
*mmapaddr = (void *) (vgpu_ivm_get_ipa(vcst->cookie) >> PAGE_SHIFT);
}

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@@ -590,7 +590,8 @@ static const struct gpu_ops tu104_ops = {
.fecs_trace = {
.alloc_user_buffer = nvgpu_gr_fecs_trace_ring_alloc,
.free_user_buffer = nvgpu_gr_fecs_trace_ring_free,
.mmap_user_buffer = nvgpu_gr_fecs_trace_mmap_buffer,
.get_mmap_user_buffer_info =
nvgpu_gr_fecs_trace_get_mmap_buffer_info,
.init = nvgpu_gr_fecs_trace_init,
.deinit = nvgpu_gr_fecs_trace_deinit,
.enable = nvgpu_gr_fecs_trace_enable,