From 53873f5daff3a0520a637b8cc35f8be6c40dee33 Mon Sep 17 00:00:00 2001 From: Nitin Kumbhar Date: Mon, 6 May 2019 13:22:43 +0530 Subject: [PATCH] gpu: nvgpu: ctx: fix misra rule 16.1 error Fix misra errors from nvgpu_gr_ctx_prepare_hwpm_mode() Error: MISRA C-2012 Rule 16.1: nvgpu/drivers/gpu/nvgpu/common/gr/ctx.c:815: missing_break: This switch clause does not end with an unconditional break statement. nvgpu/drivers/gpu/nvgpu/common/gr/ctx.c:785: misra_violation: The switch statement is not well formed. NVGPU-3224 Change-Id: Ica7029fd84f443b8ce3d51a5c5f32bb6a6172040 Signed-off-by: Nitin Kumbhar Reviewed-on: https://git-master.nvidia.com/r/2112703 Reviewed-by: svc-mobile-coverity Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Deepak Nibade Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/common/gr/ctx.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/nvgpu/common/gr/ctx.c b/drivers/gpu/nvgpu/common/gr/ctx.c index d406ec445..4a97038cd 100644 --- a/drivers/gpu/nvgpu/common/gr/ctx.c +++ b/drivers/gpu/nvgpu/common/gr/ctx.c @@ -767,6 +767,7 @@ int nvgpu_gr_ctx_prepare_hwpm_mode(struct gk20a *g, struct nvgpu_gr_ctx *gr_ctx, u32 mode, bool *skip_update) { struct pm_ctx_desc *pm_ctx = &gr_ctx->pm_ctx; + int ret = 0; *skip_update = false; @@ -814,10 +815,11 @@ int nvgpu_gr_ctx_prepare_hwpm_mode(struct gk20a *g, struct nvgpu_gr_ctx *gr_ctx, break; default: nvgpu_err(g, "invalid hwpm context switch mode"); - return -EINVAL; + ret = -EINVAL; + break; } - return 0; + return ret; } int nvgpu_gr_ctx_set_hwpm_mode(struct gk20a *g, struct nvgpu_gr_ctx *gr_ctx,