diff --git a/arch/nvgpu-hal-new.yaml b/arch/nvgpu-hal-new.yaml index 86a4684a5..6c4b44b80 100644 --- a/arch/nvgpu-hal-new.yaml +++ b/arch/nvgpu-hal-new.yaml @@ -485,7 +485,9 @@ mm: sources: [ hal/mm/mm_gp10b_fusa.c, hal/mm/mm_gp10b.h, hal/mm/mm_gv11b_fusa.c, - hal/mm/mm_gv11b.h] + hal/mm/mm_gv11b.h, + hal/mm/mm_ga10b_fusa.c, + hal/mm/mm_ga10b.h] mm: safe: no sources: [ hal/mm/mm_gk20a.c, diff --git a/drivers/gpu/nvgpu/Makefile b/drivers/gpu/nvgpu/Makefile index 3ee93e8e5..5a8bb21ab 100644 --- a/drivers/gpu/nvgpu/Makefile +++ b/drivers/gpu/nvgpu/Makefile @@ -752,6 +752,7 @@ nvgpu-$(CONFIG_NVGPU_REMAP) += \ nvgpu-y += \ hal/mm/mm_gv11b_fusa.o \ hal/mm/mm_gp10b_fusa.o \ + hal/mm/mm_ga10b_fusa.o \ hal/mm/gmmu/gmmu_gv11b_fusa.o \ hal/mm/gmmu/gmmu_gp10b_fusa.o \ hal/mm/gmmu/gmmu_gk20a_fusa.o \ diff --git a/drivers/gpu/nvgpu/Makefile.sources b/drivers/gpu/nvgpu/Makefile.sources index 02f86f740..c143e1be7 100644 --- a/drivers/gpu/nvgpu/Makefile.sources +++ b/drivers/gpu/nvgpu/Makefile.sources @@ -220,6 +220,7 @@ endif # Source files below are functionaly safe (FuSa) and must always be included. srcs += hal/mm/mm_gv11b_fusa.c \ hal/mm/mm_gp10b_fusa.c \ + hal/mm/mm_ga10b_fusa.c \ hal/mm/gmmu/gmmu_gv11b_fusa.c \ hal/mm/gmmu/gmmu_gp10b_fusa.c \ hal/mm/gmmu/gmmu_gk20a_fusa.c \ diff --git a/drivers/gpu/nvgpu/hal/init/hal_ga100.c b/drivers/gpu/nvgpu/hal/init/hal_ga100.c index afe888e28..5b9d906eb 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_ga100.c +++ b/drivers/gpu/nvgpu/hal/init/hal_ga100.c @@ -77,6 +77,7 @@ #include "hal/mm/mm_gp10b.h" #include "hal/mm/mm_gv11b.h" #include "hal/mm/mm_tu104.h" +#include "hal/mm/mm_ga10b.h" #include "hal/mm/cache/flush_gk20a.h" #include "hal/mm/cache/flush_gv11b.h" #include "hal/mm/gmmu/gmmu_gm20b.h" @@ -1293,6 +1294,7 @@ static const struct gops_mm ga100_ops_mm = { .is_bar1_supported = gv11b_mm_is_bar1_supported, .init_inst_block = gv11b_mm_init_inst_block, .init_inst_block_core = gv11b_mm_init_inst_block_core, + .bar2_vm_size = ga10b_mm_bar2_vm_size, .init_bar2_vm = gp10b_mm_init_bar2_vm, .remove_bar2_vm = gp10b_mm_remove_bar2_vm, .get_flush_retries = tu104_mm_get_flush_retries, diff --git a/drivers/gpu/nvgpu/hal/init/hal_ga10b.c b/drivers/gpu/nvgpu/hal/init/hal_ga10b.c index 0606ec4e9..1ad164174 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_ga10b.c +++ b/drivers/gpu/nvgpu/hal/init/hal_ga10b.c @@ -54,6 +54,7 @@ #include "hal/mm/mm_gp10b.h" #include "hal/mm/mm_gv11b.h" +#include "hal/mm/mm_ga10b.h" #include "hal/mm/cache/flush_gk20a.h" #include "hal/mm/cache/flush_gv11b.h" #include "hal/mm/gmmu/gmmu_gm20b.h" @@ -1308,6 +1309,7 @@ static const struct gops_mm ga10b_ops_mm = { .is_bar1_supported = gv11b_mm_is_bar1_supported, .init_inst_block = gv11b_mm_init_inst_block, .init_inst_block_core = gv11b_mm_init_inst_block_core, + .bar2_vm_size = ga10b_mm_bar2_vm_size, .init_bar2_vm = gp10b_mm_init_bar2_vm, .remove_bar2_vm = gp10b_mm_remove_bar2_vm, .get_default_va_sizes = gp10b_mm_get_default_va_sizes, diff --git a/drivers/gpu/nvgpu/hal/mm/mm_ga10b.h b/drivers/gpu/nvgpu/hal/mm/mm_ga10b.h new file mode 100644 index 000000000..10a38ad91 --- /dev/null +++ b/drivers/gpu/nvgpu/hal/mm/mm_ga10b.h @@ -0,0 +1,30 @@ +/* + * Copyright (c) 2023, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef HAL_MM_MM_GA10B_H +#define HAL_MM_MM_GA10B_H + +struct gk20a; + +u32 ga10b_mm_bar2_vm_size(struct gk20a *g); + +#endif /* HAL_MM_MM_GA10B_H */ diff --git a/drivers/gpu/nvgpu/hal/mm/mm_ga10b_fusa.c b/drivers/gpu/nvgpu/hal/mm/mm_ga10b_fusa.c new file mode 100644 index 000000000..85bce5264 --- /dev/null +++ b/drivers/gpu/nvgpu/hal/mm/mm_ga10b_fusa.c @@ -0,0 +1,72 @@ +/* + * Copyright (c) 2023, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#include +#include + +#include + +#include "mm_ga10b.h" + +u32 ga10b_mm_bar2_vm_size(struct gk20a *g) +{ + u32 num_pbdma = nvgpu_get_litter_value(g, GPU_LIT_HOST_NUM_PBDMA); + u32 buffer_size; + u32 fb_size; + + /* Calculate engine method buffer size */ + buffer_size = nvgpu_safe_add_u32(nvgpu_safe_mult_u32((9U + 1U + 3U), + g->ops.ce.get_num_pce(g)), 2U); + buffer_size = nvgpu_safe_mult_u32((27U * 5U), buffer_size); + buffer_size = PAGE_ALIGN(buffer_size); + nvgpu_log_info(g, "method buffer size in bytes %u", buffer_size); + + buffer_size = nvgpu_safe_mult_u32(num_pbdma, buffer_size); + + buffer_size = nvgpu_safe_mult_u32(buffer_size, g->ops.channel.count(g)); + + nvgpu_log_info(g, "method buffer size in bytes for max TSGs %u", + buffer_size); + + /* + * Calculate fault buffers size. + * Max entries take care of 1 entry used for full detection. + */ + fb_size = nvgpu_safe_add_u32(g->ops.channel.count(g), 1U); + fb_size = nvgpu_safe_mult_u32(fb_size, gmmu_fault_buf_size_v()); + + /* Consider replayable and non replayable faults */ + fb_size = nvgpu_safe_mult_u32(fb_size, 2U); + + nvgpu_log_info(g, "fault buffers size in bytes %u", fb_size); + + buffer_size = nvgpu_safe_add_u32(buffer_size, fb_size); + + /* Add PAGE_SIZE for vab buffer size */ + buffer_size = nvgpu_safe_add_u32(buffer_size, PAGE_SIZE); + + buffer_size = PAGE_ALIGN(buffer_size); + + nvgpu_log_info(g, "bar2 vm size in bytes %u", buffer_size); + + return buffer_size; +} diff --git a/drivers/gpu/nvgpu/hal/mm/mm_gp10b_fusa.c b/drivers/gpu/nvgpu/hal/mm/mm_gp10b_fusa.c index 94a617abe..fa9d7d9c5 100644 --- a/drivers/gpu/nvgpu/hal/mm/mm_gp10b_fusa.c +++ b/drivers/gpu/nvgpu/hal/mm/mm_gp10b_fusa.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -34,8 +34,12 @@ int gp10b_mm_init_bar2_vm(struct gk20a *g) struct nvgpu_mem *inst_block = &mm->bar2.inst_block; u32 big_page_size = g->ops.mm.gmmu.get_default_big_page_size(); - /* BAR2 aperture size is 32MB */ - mm->bar2.aperture_size = U32(32) << 20U; + /* BAR2 aperture size is 32MB for chips prior to Ampere */ + if (g->ops.mm.bar2_vm_size != NULL) { + mm->bar2.aperture_size = g->ops.mm.bar2_vm_size(g); + } else { + mm->bar2.aperture_size = U32(32) << 20U; + } nvgpu_log_info(g, "bar2 vm size = 0x%x", mm->bar2.aperture_size); mm->bar2.vm = nvgpu_vm_init(g, big_page_size, SZ_4K, diff --git a/drivers/gpu/nvgpu/hal/vgpu/init/vgpu_hal_ga10b.c b/drivers/gpu/nvgpu/hal/vgpu/init/vgpu_hal_ga10b.c index 1e520bbc3..c3b17dffe 100644 --- a/drivers/gpu/nvgpu/hal/vgpu/init/vgpu_hal_ga10b.c +++ b/drivers/gpu/nvgpu/hal/vgpu/init/vgpu_hal_ga10b.c @@ -25,6 +25,7 @@ #include "hal/mm/mm_gm20b.h" #include "hal/mm/mm_gp10b.h" #include "hal/mm/mm_gv11b.h" +#include "hal/mm/mm_ga10b.h" #include "hal/mm/gmmu/gmmu_gk20a.h" #include "hal/mm/gmmu/gmmu_gm20b.h" #include "hal/mm/gmmu/gmmu_gp10b.h" @@ -819,6 +820,7 @@ static const struct gops_mm vgpu_ga10b_ops_mm = { .is_bar1_supported = gv11b_mm_is_bar1_supported, .init_inst_block = gv11b_mm_init_inst_block, .init_inst_block_core = gv11b_mm_init_inst_block_core, + .bar2_vm_size = ga10b_mm_bar2_vm_size, .init_bar2_vm = gp10b_mm_init_bar2_vm, .remove_bar2_vm = gp10b_mm_remove_bar2_vm, .vm_as_alloc_share = vgpu_vm_as_alloc_share, diff --git a/drivers/gpu/nvgpu/include/nvgpu/gops/mm.h b/drivers/gpu/nvgpu/include/nvgpu/gops/mm.h index a13c67bdb..7384280ff 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/gops/mm.h +++ b/drivers/gpu/nvgpu/include/nvgpu/gops/mm.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -512,6 +512,18 @@ struct gops_mm { */ bool (*is_bar1_supported)(struct gk20a *g); + /** + * @brief HAL to get the BAR2 virtual memory size in bytes. + * + * @param g [in] The GPU. + * + * - Return size needed for mapping the engine method buffers, VAB and + * fault buffers in bar2 vm. + * + * @return size in bytes. + */ + u32 (*bar2_vm_size)(struct gk20a *g); + /** * @brief HAL to initialize the BAR2 virtual memory. *