From 557c67fa307fbb583eaf88b167245c2c9c465b8f Mon Sep 17 00:00:00 2001 From: Seshendra Gadagottu Date: Tue, 7 May 2019 13:50:36 -0700 Subject: [PATCH] gpu: nvgpu: fix MISRA 16.x errors in hal class Fixed issues related to switch case formatting. JIRA NVGPU-3421 Change-Id: I5271b0ede0c400444e60d70bf05943461766bc59 Signed-off-by: Seshendra Gadagottu Reviewed-on: https://git-master.nvidia.com/r/2114174 Reviewed-by: svc-mobile-coverity Reviewed-by: svc-mobile-misra GVS: Gerrit_Virtual_Submit Reviewed-by: Vinod Gopalakrishnakurup Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/hal/class/class_gm20b.c | 3 ++- drivers/gpu/nvgpu/hal/class/class_gp10b.c | 13 +++------- drivers/gpu/nvgpu/hal/class/class_gv11b.c | 30 ++++++++--------------- drivers/gpu/nvgpu/hal/class/class_tu104.c | 30 ++++++++++++++++------- 4 files changed, 36 insertions(+), 40 deletions(-) diff --git a/drivers/gpu/nvgpu/hal/class/class_gm20b.c b/drivers/gpu/nvgpu/hal/class/class_gm20b.c index 55b43c76e..4f36b7d62 100644 --- a/drivers/gpu/nvgpu/hal/class/class_gm20b.c +++ b/drivers/gpu/nvgpu/hal/class/class_gm20b.c @@ -26,7 +26,7 @@ bool gm20b_class_is_valid(u32 class_num) { - bool valid = false; + bool valid; switch (class_num) { case MAXWELL_COMPUTE_B: @@ -38,6 +38,7 @@ bool gm20b_class_is_valid(u32 class_num) break; default: + valid = false; break; } diff --git a/drivers/gpu/nvgpu/hal/class/class_gp10b.c b/drivers/gpu/nvgpu/hal/class/class_gp10b.c index 4834ad6b0..ae68028f5 100644 --- a/drivers/gpu/nvgpu/hal/class/class_gp10b.c +++ b/drivers/gpu/nvgpu/hal/class/class_gp10b.c @@ -23,11 +23,12 @@ #include #include +#include "class_gm20b.h" #include "class_gp10b.h" bool gp10b_class_is_valid(u32 class_num) { - bool valid = false; + bool valid; nvgpu_speculation_barrier(); switch (class_num) { @@ -36,16 +37,8 @@ bool gp10b_class_is_valid(u32 class_num) case PASCAL_DMA_COPY_A: valid = true; break; - - case MAXWELL_COMPUTE_B: - case MAXWELL_B: - case FERMI_TWOD_A: - case KEPLER_DMA_COPY_A: - case MAXWELL_DMA_COPY_A: - valid = true; - break; - default: + valid = gm20b_class_is_valid(class_num); break; } return valid; diff --git a/drivers/gpu/nvgpu/hal/class/class_gv11b.c b/drivers/gpu/nvgpu/hal/class/class_gv11b.c index 27fe0f2f1..ce18c79f1 100644 --- a/drivers/gpu/nvgpu/hal/class/class_gv11b.c +++ b/drivers/gpu/nvgpu/hal/class/class_gv11b.c @@ -23,32 +23,23 @@ #include #include +#include "class_gp10b.h" #include "class_gv11b.h" bool gv11b_class_is_valid(u32 class_num) { - bool valid = false; + bool valid; nvgpu_speculation_barrier(); + switch (class_num) { case VOLTA_COMPUTE_A: case VOLTA_A: case VOLTA_DMA_COPY_A: valid = true; break; - - case MAXWELL_COMPUTE_B: - case MAXWELL_B: - case FERMI_TWOD_A: - case KEPLER_DMA_COPY_A: - case MAXWELL_DMA_COPY_A: - case PASCAL_COMPUTE_A: - case PASCAL_A: - case PASCAL_DMA_COPY_A: - valid = true; - break; - default: + valid = gp10b_class_is_valid(class_num); break; } return valid; @@ -56,17 +47,16 @@ bool gv11b_class_is_valid(u32 class_num) bool gv11b_class_is_valid_gfx(u32 class_num) { - bool valid = false; + bool valid; nvgpu_speculation_barrier(); + switch (class_num) { case VOLTA_A: - case PASCAL_A: - case MAXWELL_B: valid = true; break; - default: + valid = gp10b_class_is_valid_gfx(class_num); break; } return valid; @@ -74,17 +64,17 @@ bool gv11b_class_is_valid_gfx(u32 class_num) bool gv11b_class_is_valid_compute(u32 class_num) { - bool valid = false; + bool valid; nvgpu_speculation_barrier(); + switch (class_num) { case VOLTA_COMPUTE_A: - case PASCAL_COMPUTE_A: - case MAXWELL_COMPUTE_B: valid = true; break; default: + valid = gp10b_class_is_valid_compute(class_num); break; } return valid; diff --git a/drivers/gpu/nvgpu/hal/class/class_tu104.c b/drivers/gpu/nvgpu/hal/class/class_tu104.c index 56e82c26b..bcf3da979 100644 --- a/drivers/gpu/nvgpu/hal/class/class_tu104.c +++ b/drivers/gpu/nvgpu/hal/class/class_tu104.c @@ -28,42 +28,54 @@ bool tu104_class_is_valid(u32 class_num) { + bool valid; + nvgpu_speculation_barrier(); + switch (class_num) { case TURING_CHANNEL_GPFIFO_A: case TURING_A: case TURING_COMPUTE_A: case TURING_DMA_COPY_A: - return true; + valid = true; + break; default: + valid = gv11b_class_is_valid(class_num); break; } - - return gv11b_class_is_valid(class_num); + return valid; }; bool tu104_class_is_valid_gfx(u32 class_num) { + bool valid; + nvgpu_speculation_barrier(); + switch (class_num) { case TURING_A: - return true; + valid = true; + break; default: + valid = gv11b_class_is_valid_gfx(class_num); break; } - - return gv11b_class_is_valid_gfx(class_num); + return valid; } bool tu104_class_is_valid_compute(u32 class_num) { + bool valid; + nvgpu_speculation_barrier(); + switch (class_num) { case TURING_COMPUTE_A: - return true; + valid = true; + break; default: + valid = gv11b_class_is_valid_compute(class_num); break; } - - return gv11b_class_is_valid_compute(class_num); + return valid; }