gpu: nvgpu: Add thermal module support

The following CL contains the following VBIOS thermal table parsing
and PMU interface support.
1) Thermal device table
2) Thermal channel table

JIRA DNVGPU-130

Change-Id: Ie3abab4bf099a022b1b59db96811c2ed44079519
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: http://git-master/r/1240630
(cherry picked from commit 814962a4be0a8cd0cddc7bc5211c62308ab1fea2)
Reviewed-on: http://git-master/r/1246210
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

drivers/gpu/nvgpu/Makefile.nvgpu-t18x

@@ -54,7 +54,11 @@ nvgpu-y += \
 	$(nvgpu-t18x)/volt/volt_rail.o \
 	$(nvgpu-t18x)/volt/volt_dev.o \
 	$(nvgpu-t18x)/volt/volt_policy.o \
-	$(nvgpu-t18x)/volt/volt_pmu.o
+	$(nvgpu-t18x)/volt/volt_pmu.o \
+	$(nvgpu-t18x)/therm/thrm.o \
+	$(nvgpu-t18x)/therm/thrmdev.o \
+	$(nvgpu-t18x)/therm/thrmchannel.o \
+	$(nvgpu-t18x)/therm/thrmpmu.o
 
 nvgpu-$(CONFIG_TEGRA_GK20A) += $(nvgpu-t18x)/gp10b/platform_gp10b_tegra.o
 

drivers/gpu/nvgpu/include/bios.h

@@ -788,4 +788,58 @@ struct vbios_voltage_policy_table_1x_entry {
 #define NV_VBIOS_VPT_ENTRY_PARAM1_SR_SETTLE_TIME_INTERMEDIATE_SHIFT \
 		0
 
+#define VBIOS_THERM_DEVICE_VERSION_1X                                      0x10
+
+#define VBIOS_THERM_DEVICE_1X_HEADER_SIZE_04                         0x00000004
+
+struct therm_device_1x_header {
+	u8 version;
+	u8 header_size;
+	u8 table_entry_size;
+	u8 num_table_entries;
+} ;
+
+struct therm_device_1x_entry {
+	u8 class_id;
+	u8 param0;
+	u8 flags;
+} ;
+
+#define NV_VBIOS_THERM_DEVICE_1X_ENTRY_CLASS_GPU                               0x01
+
+#define NV_VBIOS_THERM_DEVICE_1X_ENTRY_PARAM0_I2C_DEVICE_INDEX_MASK        0xFF
+#define NV_VBIOS_THERM_DEVICE_1X_ENTRY_PARAM0_I2C_DEVICE_INDEX_SHIFT          0
+
+#define VBIOS_THERM_CHANNEL_VERSION_1X                                     0x10
+
+#define VBIOS_THERM_CHANNEL_1X_HEADER_SIZE_09                        0x00000009
+
+struct therm_channel_1x_header {
+	u8 version;
+	u8 header_size;
+	u8 table_entry_size;
+	u8 num_table_entries;
+	u8 gpu_avg_pri_ch_idx;
+	u8 gpu_max_pri_ch_idx;
+	u8 board_pri_ch_idx;
+	u8 mem_pri_ch_idx;
+	u8 pwr_supply_pri_ch_idx;
+};
+
+struct therm_channel_1x_entry {
+	u8 class_id;
+	u8 param0;
+	u8 param1;
+	u8 param2;
+	u8 flags;
+};
+
+#define NV_VBIOS_THERM_CHANNEL_1X_ENTRY_CLASS_DEVICE                       0x01
+
+#define NV_VBIOS_THERM_CHANNEL_1X_ENTRY_PARAM0_DEVICE_INDEX_MASK           0xFF
+#define NV_VBIOS_THERM_CHANNEL_1X_ENTRY_PARAM0_DEVICE_INDEX_SHIFT             0
+
+#define NV_VBIOS_THERM_CHANNEL_1X_ENTRY_PARAM1_DEVICE_PROVIDER_INDEX_MASK  0xFF
+#define NV_VBIOS_THERM_CHANNEL_1X_ENTRY_PARAM1_DEVICE_PROVIDER_INDEX_SHIFT    0
+
 #endif

drivers/gpu/nvgpu/pstate/pstate.c

@@ -19,6 +19,7 @@
 #include "pmgr/pmgr.h"
 #include "include/bios.h"
 #include "pstate/pstate.h"
+#include "therm/thrm.h"
 
 static int pstate_sw_setup(struct gk20a *g);
 
@@ -49,6 +50,10 @@ int gk20a_init_pstate_support(struct gk20a *g)
 	if (err)
 		return err;
 
+	err = therm_domain_sw_setup(g);
+	if (err)
+		return err;
+
 	err = vfe_var_sw_setup(g);
 	if (err)
 		return err;
@@ -104,6 +109,10 @@ int gk20a_init_pstate_pmu_support(struct gk20a *g)
 		return err;
 	}
 
+	err = therm_domain_pmu_setup(g);
+	if (err)
+		return err;
+
 	err = vfe_var_pmu_setup(g);
 	if (err)
 		return err;

drivers/gpu/nvgpu/therm/thrm.c

@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ */
+
+#include "gk20a/gk20a.h"
+#include "thrm.h"
+#include "thrmpmu.h"
+
+u32 therm_domain_sw_setup(struct gk20a *g)
+{
+	u32 status;
+
+	status = therm_device_sw_setup(g);
+	if (status) {
+		gk20a_err(dev_from_gk20a(g),
+			"error creating boardobjgrp for therm devices, status - 0x%x",
+			status);
+		goto exit;
+	}
+
+	status = therm_channel_sw_setup(g);
+	if (status) {
+		gk20a_err(dev_from_gk20a(g),
+			"error creating boardobjgrp for therm channel, status - 0x%x",
+			status);
+		goto exit;
+	}
+
+exit:
+	return status;
+}
+
+u32 therm_domain_pmu_setup(struct gk20a *g)
+{
+	return therm_send_pmgr_tables_to_pmu(g);
+}

drivers/gpu/nvgpu/therm/thrm.h

@@ -0,0 +1,29 @@
+/*
+ * general thermal table structures & definitions
+ *
+ * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ */
+#ifndef _THRM_H_
+#define _THRM_H_
+
+#include "thrmdev.h"
+#include "thrmchannel.h"
+
+struct therm_pmupstate {
+	struct therm_devices therm_deviceobjs;
+	struct therm_channels therm_channelobjs;
+};
+
+u32 therm_domain_sw_setup(struct gk20a *g);
+u32 therm_domain_pmu_setup(struct gk20a *g);
+
+#endif

drivers/gpu/nvgpu/therm/thrmchannel.c

@@ -0,0 +1,247 @@
+/*
+ * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ */
+
+#include "gk20a/gk20a.h"
+#include "thrmchannel.h"
+#include "include/bios.h"
+#include "boardobj/boardobjgrp.h"
+#include "boardobj/boardobjgrp_e32.h"
+#include "pmuif/gpmuifboardobj.h"
+#include "pmuif/gpmuifthermsensor.h"
+#include "gm206/bios_gm206.h"
+#include "gk20a/pmu_gk20a.h"
+
+static u32 _therm_channel_pmudatainit_device(struct gk20a *g,
+			struct boardobj *board_obj_ptr,
+			struct nv_pmu_boardobj *ppmudata)
+{
+	u32 status = 0;
+	struct therm_channel *pchannel;
+	struct therm_channel_device *ptherm_channel;
+	struct nv_pmu_therm_therm_channel_device_boardobj_set *pset;
+
+	status = boardobj_pmudatainit_super(g, board_obj_ptr, ppmudata);
+	if (status) {
+		gk20a_err(dev_from_gk20a(g),
+			"error updating pmu boardobjgrp for therm channel 0x%x",
+			status);
+		status = -ENOMEM;
+		goto done;
+	}
+
+	pchannel = (struct therm_channel *)board_obj_ptr;
+	pset = (struct nv_pmu_therm_therm_channel_device_boardobj_set *)ppmudata;
+	ptherm_channel = (struct therm_channel_device *)board_obj_ptr;
+
+	pset->super.scaling = pchannel->scaling;
+	pset->super.offset = pchannel->offset;
+	pset->super.temp_min = pchannel->temp_min;
+	pset->super.temp_max = pchannel->temp_max;
+
+	pset->therm_dev_idx = ptherm_channel->therm_dev_idx;
+	pset->therm_dev_prov_idx = ptherm_channel->therm_dev_prov_idx;
+
+done:
+	return status;
+}
+static struct boardobj *construct_channel_device(struct gk20a *g,
+			void *pargs, u16 pargs_size, u8 type)
+{
+	struct boardobj *board_obj_ptr = NULL;
+	struct therm_channel *pchannel;
+	struct therm_channel_device *pchannel_device;
+	u32 status;
+	struct therm_channel_device *therm_device = (struct therm_channel_device*)pargs;
+
+	status = boardobj_construct_super(g, &board_obj_ptr,
+		pargs_size, pargs);
+	if (status)
+		return NULL;
+
+	/* Set Super class interfaces */
+	board_obj_ptr->pmudatainit = _therm_channel_pmudatainit_device;
+
+	pchannel = (struct therm_channel *)board_obj_ptr;
+	pchannel_device = (struct therm_channel_device *)board_obj_ptr;
+
+	pchannel->temp_min = 0;
+	pchannel->temp_max = 0;
+
+	pchannel->scaling = (1 << 8);
+	pchannel->offset = 0;
+
+	pchannel_device->therm_dev_idx = therm_device->therm_dev_idx;
+	pchannel_device->therm_dev_prov_idx = therm_device->therm_dev_prov_idx;
+
+	gk20a_dbg_info(" Done");
+
+	return board_obj_ptr;
+}
+
+static u32 _therm_channel_pmudata_instget(struct gk20a *g,
+			struct nv_pmu_boardobjgrp *pmuboardobjgrp,
+			struct nv_pmu_boardobj **ppboardobjpmudata,
+			u8 idx)
+{
+	struct nv_pmu_therm_therm_channel_boardobj_grp_set *pgrp_set =
+		(struct nv_pmu_therm_therm_channel_boardobj_grp_set *)
+		pmuboardobjgrp;
+
+	gk20a_dbg_info("");
+
+	/*check whether pmuboardobjgrp has a valid boardobj in index*/
+	if (((u32)BIT(idx) &
+			pgrp_set->hdr.data.super.obj_mask.super.data[0]) == 0)
+		return -EINVAL;
+
+	*ppboardobjpmudata = (struct nv_pmu_boardobj *)
+		&pgrp_set->objects[idx].data.board_obj;
+
+	gk20a_dbg_info(" Done");
+
+	return 0;
+}
+
+static u32 devinit_get_therm_channel_table(struct gk20a *g,
+				struct therm_channels *pthermchannelobjs)
+{
+	u32 status = 0;
+	u8 *therm_channel_table_ptr = NULL;
+	u8 *curr_therm_channel_table_ptr = NULL;
+	struct boardobj *boardobj;
+	struct therm_channel_1x_header therm_channel_table_header = { 0 };
+	struct therm_channel_1x_entry *therm_channel_table_entry = NULL;
+	u32 index;
+	u32 obj_index = 0;
+	u16 therm_channel_size = 0;
+	union {
+		struct boardobj boardobj;
+		struct therm_channel therm_channel;
+		struct therm_channel_device device;
+	} therm_channel_data;
+
+	gk20a_dbg_info("");
+
+	if (g->ops.bios.get_perf_table_ptrs) {
+		therm_channel_table_ptr = (u8 *)g->ops.bios.get_perf_table_ptrs(g,
+				g->bios.perf_token, THERMAL_CHANNEL_TABLE);
+		if (therm_channel_table_ptr == NULL) {
+			status = -EINVAL;
+			goto done;
+		}
+	}
+
+	memcpy(&therm_channel_table_header, therm_channel_table_ptr,
+		VBIOS_THERM_CHANNEL_1X_HEADER_SIZE_09);
+
+	if (therm_channel_table_header.version !=
+			VBIOS_THERM_CHANNEL_VERSION_1X) {
+		status = -EINVAL;
+		goto done;
+	}
+
+	if (therm_channel_table_header.header_size <
+			VBIOS_THERM_CHANNEL_1X_HEADER_SIZE_09) {
+		status = -EINVAL;
+		goto done;
+	}
+
+	curr_therm_channel_table_ptr = (therm_channel_table_ptr +
+		VBIOS_THERM_CHANNEL_1X_HEADER_SIZE_09);
+
+	for (index = 0; index < therm_channel_table_header.num_table_entries;
+		index++) {
+		therm_channel_table_entry = (struct therm_channel_1x_entry *)
+			(curr_therm_channel_table_ptr +
+				(therm_channel_table_header.table_entry_size * index));
+
+		if (therm_channel_table_entry->class_id !=
+				NV_VBIOS_THERM_CHANNEL_1X_ENTRY_CLASS_DEVICE) {
+			continue;
+		}
+
+		therm_channel_data.device.therm_dev_idx = therm_channel_table_entry->param0;
+		therm_channel_data.device.therm_dev_prov_idx = therm_channel_table_entry->param1;
+
+		therm_channel_size = sizeof(struct therm_channel_device);
+		therm_channel_data.boardobj.type = CTRL_THERMAL_THERM_CHANNEL_CLASS_DEVICE;
+
+		boardobj = construct_channel_device(g, &therm_channel_data,
+					therm_channel_size, therm_channel_data.boardobj.type);
+
+		if (!boardobj) {
+			gk20a_err(dev_from_gk20a(g),
+				"unable to create thermal device for %d type %d",
+				index, therm_channel_data.boardobj.type);
+			status = -EINVAL;
+			goto done;
+		}
+
+		status = boardobjgrp_objinsert(&pthermchannelobjs->super.super,
+				boardobj, obj_index);
+
+		if (status) {
+			gk20a_err(dev_from_gk20a(g),
+			"unable to insert thermal device boardobj for %d", index);
+			status = -EINVAL;
+			goto done;
+		}
+
+		++obj_index;
+	}
+
+done:
+	gk20a_dbg_info(" done status %x", status);
+	return status;
+}
+
+u32 therm_channel_sw_setup(struct gk20a *g)
+{
+	u32 status;
+	struct boardobjgrp *pboardobjgrp = NULL;
+	struct therm_channels *pthermchannelobjs;
+
+	/* Construct the Super Class and override the Interfaces */
+	status = boardobjgrpconstruct_e32(&g->therm_pmu.therm_channelobjs.super);
+	if (status) {
+		gk20a_err(dev_from_gk20a(g),
+			  "error creating boardobjgrp for therm devices, status - 0x%x",
+			  status);
+		goto done;
+	}
+
+	pboardobjgrp = &g->therm_pmu.therm_channelobjs.super.super;
+	pthermchannelobjs = &(g->therm_pmu.therm_channelobjs);
+
+	/* Override the Interfaces */
+	pboardobjgrp->pmudatainstget = _therm_channel_pmudata_instget;
+
+	status = devinit_get_therm_channel_table(g, pthermchannelobjs);
+	if (status)
+		goto done;
+
+	BOARDOBJGRP_PMU_CONSTRUCT(pboardobjgrp, THERM, THERM_CHANNEL);
+
+	status = BOARDOBJGRP_PMU_CMD_GRP_SET_CONSTRUCT(g, pboardobjgrp,
+			therm, THERM, therm_channel, THERM_CHANNEL);
+	if (status) {
+		gk20a_err(dev_from_gk20a(g),
+			  "error constructing PMU_BOARDOBJ_CMD_GRP_SET interface - 0x%x",
+			  status);
+		goto done;
+	}
+
+done:
+	gk20a_dbg_info(" done status %x", status);
+	return status;
+}

drivers/gpu/nvgpu/therm/thrmchannel.h

@@ -0,0 +1,42 @@
+/*
+ * general thermal device structures & definitions
+ *
+ * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ */
+#ifndef _THRMCHANNEL_H_
+#define _THRMCHANNEL_H_
+
+#include "boardobj/boardobj.h"
+#include "boardobj/boardobjgrp.h"
+#include "ctrl/ctrltherm.h"
+
+struct therm_channel {
+	struct boardobj super;
+	s16 scaling;
+	s16 offset;
+	s32 temp_min;
+	s32 temp_max;
+};
+
+struct therm_channels {
+	struct boardobjgrp_e32 super;
+};
+
+struct therm_channel_device {
+	struct therm_channel super;
+	u8 therm_dev_idx;
+	u8 therm_dev_prov_idx;
+};
+
+u32 therm_channel_sw_setup(struct gk20a *g);
+
+#endif

drivers/gpu/nvgpu/therm/thrmdev.c

@@ -0,0 +1,193 @@
+/*
+ * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ */
+
+#include "gk20a/gk20a.h"
+#include "thrmdev.h"
+#include "include/bios.h"
+#include "boardobj/boardobjgrp.h"
+#include "boardobj/boardobjgrp_e32.h"
+#include "pmuif/gpmuifboardobj.h"
+#include "pmuif/gpmuifthermsensor.h"
+#include "gm206/bios_gm206.h"
+#include "gk20a/pmu_gk20a.h"
+#include "ctrl/ctrltherm.h"
+
+static struct boardobj *construct_therm_device(struct gk20a *g,
+			void *pargs, u16 pargs_size, u8 type)
+{
+	struct boardobj *board_obj_ptr = NULL;
+	u32 status;
+
+	status = boardobj_construct_super(g, &board_obj_ptr,
+		pargs_size, pargs);
+	if (status)
+		return NULL;
+
+	gk20a_dbg_info(" Done");
+
+	return board_obj_ptr;
+}
+
+static u32 _therm_device_pmudata_instget(struct gk20a *g,
+			struct nv_pmu_boardobjgrp *pmuboardobjgrp,
+			struct nv_pmu_boardobj **ppboardobjpmudata,
+			u8 idx)
+{
+	struct nv_pmu_therm_therm_device_boardobj_grp_set *pgrp_set =
+		(struct nv_pmu_therm_therm_device_boardobj_grp_set *)
+		pmuboardobjgrp;
+
+	gk20a_dbg_info("");
+
+	/*check whether pmuboardobjgrp has a valid boardobj in index*/
+	if (((u32)BIT(idx) &
+			pgrp_set->hdr.data.super.obj_mask.super.data[0]) == 0)
+		return -EINVAL;
+
+	*ppboardobjpmudata = (struct nv_pmu_boardobj *)
+		&pgrp_set->objects[idx].data;
+
+	gk20a_dbg_info(" Done");
+
+	return 0;
+}
+
+static u32 devinit_get_therm_device_table(struct gk20a *g,
+				struct therm_devices *pthermdeviceobjs)
+{
+	u32 status = 0;
+	u8 *therm_device_table_ptr = NULL;
+	u8 *curr_therm_device_table_ptr = NULL;
+	struct boardobj *boardobj;
+	struct therm_device_1x_header therm_device_table_header = { 0 };
+	struct therm_device_1x_entry *therm_device_table_entry = NULL;
+	u32 index;
+	u32 obj_index = 0;
+	u16 therm_device_size = 0;
+	union {
+		struct boardobj boardobj;
+		struct therm_device therm_device;
+	} therm_device_data;
+
+	gk20a_dbg_info("");
+
+	if (g->ops.bios.get_perf_table_ptrs) {
+		therm_device_table_ptr = (u8 *)g->ops.bios.get_perf_table_ptrs(g,
+				g->bios.perf_token, THERMAL_DEVICE_TABLE);
+		if (therm_device_table_ptr == NULL) {
+			status = -EINVAL;
+			goto done;
+		}
+	}
+
+	memcpy(&therm_device_table_header, therm_device_table_ptr,
+		VBIOS_THERM_DEVICE_1X_HEADER_SIZE_04);
+
+	if (therm_device_table_header.version !=
+			VBIOS_THERM_DEVICE_VERSION_1X) {
+		status = -EINVAL;
+		goto done;
+	}
+
+	if (therm_device_table_header.header_size <
+			VBIOS_THERM_DEVICE_1X_HEADER_SIZE_04) {
+		status = -EINVAL;
+		goto done;
+	}
+
+	curr_therm_device_table_ptr = (therm_device_table_ptr +
+		VBIOS_THERM_DEVICE_1X_HEADER_SIZE_04);
+
+	for (index = 0; index < therm_device_table_header.num_table_entries;
+		index++) {
+		therm_device_table_entry = (struct therm_device_1x_entry *)
+			(curr_therm_device_table_ptr +
+				(therm_device_table_header.table_entry_size * index));
+
+		if (therm_device_table_entry->class_id !=
+				NV_VBIOS_THERM_DEVICE_1X_ENTRY_CLASS_GPU) {
+			continue;
+		}
+
+		therm_device_size = sizeof(struct therm_device);
+		therm_device_data.boardobj.type = CTRL_THERMAL_THERM_DEVICE_CLASS_GPU;
+
+		boardobj = construct_therm_device(g, &therm_device_data,
+					therm_device_size, therm_device_data.boardobj.type);
+
+		if (!boardobj) {
+			gk20a_err(dev_from_gk20a(g),
+				"unable to create thermal device for %d type %d",
+				index, therm_device_data.boardobj.type);
+			status = -EINVAL;
+			goto done;
+		}
+
+		status = boardobjgrp_objinsert(&pthermdeviceobjs->super.super,
+				boardobj, obj_index);
+
+		if (status) {
+			gk20a_err(dev_from_gk20a(g),
+			"unable to insert thermal device boardobj for %d", index);
+			status = -EINVAL;
+			goto done;
+		}
+
+		++obj_index;
+	}
+
+done:
+	gk20a_dbg_info(" done status %x", status);
+	return status;
+}
+
+u32 therm_device_sw_setup(struct gk20a *g)
+{
+	u32 status;
+	struct boardobjgrp *pboardobjgrp = NULL;
+	struct therm_devices *pthermdeviceobjs;
+
+	/* Construct the Super Class and override the Interfaces */
+	status = boardobjgrpconstruct_e32(&g->therm_pmu.therm_deviceobjs.super);
+	if (status) {
+		gk20a_err(dev_from_gk20a(g),
+			  "error creating boardobjgrp for therm devices, status - 0x%x",
+			  status);
+		goto done;
+	}
+
+	pboardobjgrp = &g->therm_pmu.therm_deviceobjs.super.super;
+	pthermdeviceobjs = &(g->therm_pmu.therm_deviceobjs);
+
+	/* Override the Interfaces */
+	pboardobjgrp->pmudatainstget = _therm_device_pmudata_instget;
+
+	status = devinit_get_therm_device_table(g, pthermdeviceobjs);
+	if (status)
+		goto done;
+
+	BOARDOBJGRP_PMU_CONSTRUCT(pboardobjgrp, THERM, THERM_DEVICE);
+
+	status = BOARDOBJGRP_PMU_CMD_GRP_SET_CONSTRUCT(g, pboardobjgrp,
+			therm, THERM, therm_device, THERM_DEVICE);
+	if (status) {
+		gk20a_err(dev_from_gk20a(g),
+			  "error constructing PMU_BOARDOBJ_CMD_GRP_SET interface - 0x%x",
+			  status);
+		goto done;
+	}
+
+done:
+	gk20a_dbg_info(" done status %x", status);
+	return status;
+}

drivers/gpu/nvgpu/therm/thrmdev.h

@@ -0,0 +1,31 @@
+/*
+ * general thermal device structures & definitions
+ *
+ * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ */
+#ifndef _THRMDEV_H_
+#define _THRMDEV_H_
+
+#include "boardobj/boardobj.h"
+#include "boardobj/boardobjgrp.h"
+
+struct therm_devices {
+	struct boardobjgrp_e32 super;
+};
+
+struct therm_device {
+	struct therm_devices super;
+};
+
+u32 therm_device_sw_setup(struct gk20a *g);
+
+#endif

drivers/gpu/nvgpu/therm/thrmpmu.c

@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ */
+
+#include "gk20a/gk20a.h"
+#include "include/bios.h"
+#include "boardobj/boardobjgrp.h"
+#include "boardobj/boardobjgrp_e32.h"
+#include "pmuif/gpmuifboardobj.h"
+#include "thrmpmu.h"
+
+u32 therm_send_pmgr_tables_to_pmu(struct gk20a *g)
+{
+	u32 status = 0;
+	struct boardobjgrp *pboardobjgrp = NULL;
+
+	if (!BOARDOBJGRP_IS_EMPTY(&g->therm_pmu.therm_deviceobjs.super.super)) {
+		pboardobjgrp = &g->therm_pmu.therm_deviceobjs.super.super;
+		status = pboardobjgrp->pmuinithandle(g, pboardobjgrp);
+		if (status) {
+			gk20a_err(dev_from_gk20a(g),
+				"therm_send_pmgr_tables_to_pmu - therm_device failed %x",
+				status);
+			goto exit;
+		}
+	}
+
+	if (!BOARDOBJGRP_IS_EMPTY(
+			&g->therm_pmu.therm_channelobjs.super.super)) {
+		pboardobjgrp = &g->therm_pmu.therm_channelobjs.super.super;
+		status = pboardobjgrp->pmuinithandle(g, pboardobjgrp);
+		if (status) {
+			gk20a_err(dev_from_gk20a(g),
+				"therm_send_pmgr_tables_to_pmu - therm_channel failed %x",
+				status);
+			goto exit;
+		}
+	}
+
+exit:
+	return status;
+}

drivers/gpu/nvgpu/therm/thrmpmu.h

@@ -0,0 +1,20 @@
+/*
+ * general thermal pmu control structures & definitions
+ *
+ * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ */
+#ifndef _THRMPMU_H_
+#define _THRMPMU_H_
+
+u32 therm_send_pmgr_tables_to_pmu(struct gk20a *g);
+
+#endif