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gpu: nvgpu: add CONFIG_NVGPU_TEGRA_FUSE

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Encapsulate the tegra fuse functionality under the config flag
CONFIG_NVGPU_TEGRA_FUSE.

Bug 2834141

Change-Id: I54c9e82360e8a24008ea14eb55af80f81d325cdc
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2306432
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Sagar Kamble
2020-02-28 21:25:59 +05:30
committed by Alex Waterman
parent 3748be5792
commit 59c6947fc6
30 changed files with 209 additions and 36 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
drivers/gpu/nvgpu/os/linux/fuse.c
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2017-2020, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -15,9 +15,11 @@
#include <nvgpu/fuse.h>
int nvgpu_tegra_get_gpu_speedo_id(struct gk20a *g)
int nvgpu_tegra_get_gpu_speedo_id(struct gk20a *g, int *id)
{
return tegra_sku_info.gpu_speedo_id;
*id = tegra_sku_info.gpu_speedo_id;
return 0;
}
/*

11
drivers/gpu/nvgpu/os/linux/module.c
View File

@@ -31,11 +31,13 @@
#include <linux/of_gpio.h>
#include <uapi/linux/nvgpu.h>
#ifdef CONFIG_NVGPU_TEGRA_FUSE
#include <dt-bindings/soc/gm20b-fuse.h>
#include <dt-bindings/soc/gp10b-fuse.h>
#include <dt-bindings/soc/gv11b-fuse.h>
#include <soc/tegra/fuse.h>
#endif /* CONFIG_NVGPU_TEGRA_FUSE */
#include <nvgpu/hal_init.h>
#include <nvgpu/dma.h>
@@ -1134,9 +1136,12 @@ static int gk20a_pm_railgate(struct device *dev)
#ifdef CONFIG_DEBUG_FS
g->pstats.last_rail_gate_complete = jiffies;
#endif
#ifdef CONFIG_NVGPU_TEGRA_FUSE
ret = tegra_fuse_clock_disable();
if (ret)
nvgpu_err(g, "failed to disable tegra fuse clock, err=%d", ret);
#endif
return ret;
}
@@ -1151,11 +1156,14 @@ static int gk20a_pm_unrailgate(struct device *dev)
if (!platform->unrailgate)
return 0;
#ifdef CONFIG_NVGPU_TEGRA_FUSE
ret = tegra_fuse_clock_enable();
if (ret) {
nvgpu_err(g, "failed to enable tegra fuse clock, err=%d", ret);
return ret;
}
#endif
#ifdef CONFIG_DEBUG_FS
g->pstats.last_rail_ungate_start = jiffies;
if (g->pstats.railgating_cycle_count >= 1)
@@ -1505,6 +1513,7 @@ static inline void set_gk20a(struct platform_device *pdev, struct gk20a *gk20a)
static int nvgpu_read_fuse_overrides(struct gk20a *g)
{
#ifdef CONFIG_NVGPU_TEGRA_FUSE
struct device_node *np = nvgpu_get_node(g);
struct gk20a_platform *platform = dev_get_drvdata(dev_from_gk20a(g));
u32 *fuses;
@@ -1545,7 +1554,7 @@ static int nvgpu_read_fuse_overrides(struct gk20a *g)
}
nvgpu_kfree(g, fuses);
#endif
return 0;
}

4
drivers/gpu/nvgpu/os/linux/platform_gk20a_tegra.c
View File

@@ -36,7 +36,9 @@
#endif
#include <linux/platform/tegra/tegra_emc.h>
#ifdef CONFIG_NVGPU_TEGRA_FUSE
#include <soc/tegra/chip-id.h>
#endif
#include <nvgpu/kmem.h>
#include <nvgpu/bug.h>
@@ -830,8 +832,10 @@ static int gk20a_tegra_probe(struct device *dev)
dev_warn(dev, "board does not support scaling");
}
platform->g->clk.gpc_pll.id = GM20B_GPC_PLL_B1;
#ifdef CONFIG_NVGPU_TEGRA_FUSE
if (tegra_chip_get_revision() > TEGRA210_REVISION_A04p)
platform->g->clk.gpc_pll.id = GM20B_GPC_PLL_C1;
#endif
}
if (platform->platform_chip_id == TEGRA_132)

1
drivers/gpu/nvgpu/os/linux/scale.c
View File

@@ -18,7 +18,6 @@
#include <linux/devfreq.h>
#include <linux/export.h>
#include <soc/tegra/chip-id.h>
#include <linux/pm_qos.h>
#include <governor.h>

4
drivers/gpu/nvgpu/os/linux/sysfs.c
View File

@@ -890,6 +890,7 @@ static DEVICE_ATTR(tpc_pg_mask, ROOTRW, tpc_pg_mask_read, tpc_pg_mask_store);
static ssize_t tpc_fs_mask_store(struct device *dev,
struct device_attribute *attr, const char *buf, size_t count)
{
#ifdef CONFIG_NVGPU_TEGRA_FUSE
struct gk20a *g = get_gk20a(dev);
struct nvgpu_gr_config *gr_config = nvgpu_gr_get_config_ptr(g);
struct nvgpu_gr_obj_ctx_golden_image *gr_golden_image =
@@ -924,6 +925,9 @@ static ssize_t tpc_fs_mask_store(struct device *dev,
}
return count;
#else
return -ENODEV;
#endif
}
static ssize_t tpc_fs_mask_read(struct device *dev,

4
drivers/gpu/nvgpu/os/linux/vgpu/vgpu_linux.c
View File

@@ -22,7 +22,9 @@
#include <linux/pm_runtime.h>
#include <linux/pm_qos.h>
#include <linux/platform_device.h>
#ifdef CONFIG_NVGPU_TEGRA_FUSE
#include <soc/tegra/chip-id.h>
#endif
#include <nvgpu/kmem.h>
#include <nvgpu/bug.h>
@@ -357,8 +359,10 @@ int vgpu_probe(struct platform_device *pdev)
}
l->dev = dev;
#ifdef CONFIG_NVGPU_TEGRA_FUSE
if (tegra_platform_is_vdk())
nvgpu_set_enabled(gk20a, NVGPU_IS_FMODEL, true);
#endif
gk20a->is_virtual = true;