diff --git a/drivers/gpu/nvgpu/common/mc/mc.c b/drivers/gpu/nvgpu/common/mc/mc.c index 19d2c6853..a82677ca1 100644 --- a/drivers/gpu/nvgpu/common/mc/mc.c +++ b/drivers/gpu/nvgpu/common/mc/mc.c @@ -30,7 +30,7 @@ u32 nvgpu_mc_boot_0(struct gk20a *g, u32 *arch, u32 *impl, u32 *rev) { - u32 val = __nvgpu_readl(g, mc_boot_0_r()); + u32 val = nvgpu_readl_impl(g, mc_boot_0_r()); if (val != U32_MAX) { diff --git a/drivers/gpu/nvgpu/include/nvgpu/io.h b/drivers/gpu/nvgpu/include/nvgpu/io.h index d6cc16e8a..d0dcaa6e4 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/io.h +++ b/drivers/gpu/nvgpu/include/nvgpu/io.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -38,7 +38,7 @@ struct gk20a; void nvgpu_writel(struct gk20a *g, u32 r, u32 v); void nvgpu_writel_relaxed(struct gk20a *g, u32 r, u32 v); u32 nvgpu_readl(struct gk20a *g, u32 r); -u32 __nvgpu_readl(struct gk20a *g, u32 r); +u32 nvgpu_readl_impl(struct gk20a *g, u32 r); void nvgpu_writel_check(struct gk20a *g, u32 r, u32 v); void nvgpu_writel_loop(struct gk20a *g, u32 r, u32 v); void nvgpu_bar1_writel(struct gk20a *g, u32 b, u32 v); diff --git a/drivers/gpu/nvgpu/libnvgpu-drv.export b/drivers/gpu/nvgpu/libnvgpu-drv.export index e5addf29b..b8290eae9 100644 --- a/drivers/gpu/nvgpu/libnvgpu-drv.export +++ b/drivers/gpu/nvgpu/libnvgpu-drv.export @@ -2,7 +2,6 @@ __nvgpu_log_dbg __nvgpu_log_msg -__nvgpu_readl bitmap_clear bitmap_find_next_zero_area_off bitmap_set @@ -154,6 +153,7 @@ nvgpu_rbtree_range_search nvgpu_rbtree_search nvgpu_rbtree_unlink nvgpu_readl +nvgpu_readl_impl nvgpu_runlist_construct_locked nvgpu_rwsem_init nvgpu_tsg_default_timeslice_us diff --git a/drivers/gpu/nvgpu/os/linux/linux-io.c b/drivers/gpu/nvgpu/os/linux/linux-io.c index d2c57af5e..415fae2a1 100644 --- a/drivers/gpu/nvgpu/os/linux/linux-io.c +++ b/drivers/gpu/nvgpu/os/linux/linux-io.c @@ -45,7 +45,7 @@ void nvgpu_writel_relaxed(struct gk20a *g, u32 r, u32 v) u32 nvgpu_readl(struct gk20a *g, u32 r) { - u32 v = __nvgpu_readl(g, r); + u32 v = nvgpu_readl_impl(g, r); if (v == 0xffffffff) nvgpu_check_gpu_state(g); @@ -53,7 +53,7 @@ u32 nvgpu_readl(struct gk20a *g, u32 r) return v; } -u32 __nvgpu_readl(struct gk20a *g, u32 r) +u32 nvgpu_readl_impl(struct gk20a *g, u32 r) { struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g); u32 v = 0xffffffff; diff --git a/drivers/gpu/nvgpu/os/posix/posix-io.c b/drivers/gpu/nvgpu/os/posix/posix-io.c index 9ae5ec8d0..a62eeeae0 100644 --- a/drivers/gpu/nvgpu/os/posix/posix-io.c +++ b/drivers/gpu/nvgpu/os/posix/posix-io.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -94,7 +94,7 @@ void nvgpu_writel_loop(struct gk20a *g, u32 r, u32 v) BUG(); } -u32 __nvgpu_readl(struct gk20a *g, u32 r) +u32 nvgpu_readl_impl(struct gk20a *g, u32 r) { struct nvgpu_posix_io_callbacks *callbacks = nvgpu_os_posix_from_gk20a(g)->callbacks; diff --git a/userspace/required_tests.json b/userspace/required_tests.json index c8fb40db4..b08367e26 100644 --- a/userspace/required_tests.json +++ b/userspace/required_tests.json @@ -1423,7 +1423,7 @@ "unit": "posix_env" }, { - "test": "__readl", + "test": "readl_impl", "test_level": 0, "unit": "posix_mockio" }, diff --git a/userspace/units/posix/mockio/posix-mockio.c b/userspace/units/posix/mockio/posix-mockio.c index c4c7b79eb..892d60a14 100644 --- a/userspace/units/posix/mockio/posix-mockio.c +++ b/userspace/units/posix/mockio/posix-mockio.c @@ -191,9 +191,9 @@ struct readl_test_args nvgpu_readl_args = { .fn = nvgpu_readl }; -struct readl_test_args __nvgpu_readl_args = { - .name = "__nvgpu_readl", - .fn = __nvgpu_readl +struct readl_test_args nvgpu_readl_impl_args = { + .name = "nvgpu_readl_impl", + .fn = nvgpu_readl_impl }; struct readl_test_args nvgpu_bar1_readl_args = { @@ -333,7 +333,7 @@ struct unit_module_test posix_mockio_tests[] = { UNIT_TEST(usermode_writel, test_writel, &nvgpu_usermode_writel_args, 0), UNIT_TEST(readl, test_readl, &nvgpu_readl_args, 0), - UNIT_TEST(__readl, test_readl, &__nvgpu_readl_args, 0), + UNIT_TEST(readl_impl, test_readl, &nvgpu_readl_impl_args, 0), UNIT_TEST(bar1_readl, test_readl, &nvgpu_bar1_readl_args, 0), UNIT_TEST(test_register_space, test_register_space, NULL, 0), };