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gpu: nvgpu: pmu: add check before enabling elpg.
Do not enable/disable elpg if platform->can_elpg is false. Bug 1870556 Change-Id: I82d1fc4efdccc518827a6150fd3c17f6112e2f4a Signed-off-by: Deepak Goyal <dgoyal@nvidia.com> Reviewed-on: http://git-master/r/1465816 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -1206,6 +1206,7 @@ static inline void get_exception_mmu_fault_info(
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void gk20a_fifo_reset_engine(struct gk20a *g, u32 engine_id)
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{
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struct fifo_gk20a *f = NULL;
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struct gk20a_platform *platform;
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u32 engine_enum = ENGINE_INVAL_GK20A;
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u32 inst_id = 0;
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struct fifo_engine_info_gk20a *engine_info;
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@@ -1216,6 +1217,7 @@ void gk20a_fifo_reset_engine(struct gk20a *g, u32 engine_id)
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return;
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f = &g->fifo;
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platform = dev_get_drvdata(g->dev);
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engine_info = gk20a_fifo_get_engine_info(g, engine_id);
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@@ -1228,7 +1230,7 @@ void gk20a_fifo_reset_engine(struct gk20a *g, u32 engine_id)
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nvgpu_err(g, "unsupported engine_id %d", engine_id);
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if (engine_enum == ENGINE_GR_GK20A) {
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if (g->support_pmu && g->elpg_enabled)
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if (g->support_pmu && platform->can_elpg)
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gk20a_pmu_disable_elpg(g);
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/* resetting engine will alter read/write index.
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* need to flush circular buffer before re-enabling FECS.
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@@ -1241,7 +1243,7 @@ void gk20a_fifo_reset_engine(struct gk20a *g, u32 engine_id)
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/* resetting engine using mc_enable_r() is not
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enough, we do full init sequence */
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gk20a_gr_reset(g);
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if (g->support_pmu && g->elpg_enabled)
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if (g->support_pmu && platform->can_elpg)
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gk20a_pmu_enable_elpg(g);
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}
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if ((engine_enum == ENGINE_GRCE_GK20A) ||
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@@ -1466,6 +1468,7 @@ static bool gk20a_fifo_handle_mmu_fault(
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bool id_is_tsg)
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{
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bool fake_fault;
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struct gk20a_platform *platform = dev_get_drvdata(g->dev);
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unsigned long fault_id;
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unsigned long engine_mmu_fault_id;
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bool verbose = true;
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@@ -1476,7 +1479,7 @@ static bool gk20a_fifo_handle_mmu_fault(
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g->fifo.deferred_reset_pending = false;
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/* Disable power management */
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if (g->support_pmu && g->elpg_enabled)
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if (g->support_pmu && platform->can_elpg)
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gk20a_pmu_disable_elpg(g);
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if (g->ops.clock_gating.slcg_gr_load_gating_prod)
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g->ops.clock_gating.slcg_gr_load_gating_prod(g,
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@@ -1675,8 +1678,9 @@ static bool gk20a_fifo_handle_mmu_fault(
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gr_gpfifo_ctl_semaphore_access_enabled_f());
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/* It is safe to enable ELPG again. */
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if (g->support_pmu && g->elpg_enabled)
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if (g->support_pmu && platform->can_elpg)
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gk20a_pmu_enable_elpg(g);
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return verbose;
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}
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