diff --git a/drivers/gpu/nvgpu/hal/fifo/pbdma_ga10b_fusa.c b/drivers/gpu/nvgpu/hal/fifo/pbdma_ga10b_fusa.c
index f9ed2fe53..ed4827ae0 100644
--- a/drivers/gpu/nvgpu/hal/fifo/pbdma_ga10b_fusa.c
+++ b/drivers/gpu/nvgpu/hal/fifo/pbdma_ga10b_fusa.c
@@ -444,12 +444,12 @@ static bool ga10b_pbdma_handle_intr_0_legacy(struct gk20a *g, u32 pbdma_id,
 
 	if ((pbdma_intr_0 & pbdma_intr_0_pbentry_pending_f()) != 0U) {
 		g->ops.pbdma.reset_header(g, pbdma_id);
-		ga10b_pbdma_reset_method(g, pbdma_id, 0);
+		g->ops.pbdma.reset_method(g, pbdma_id, 0);
 		recover = true;
 	}
 
 	if ((pbdma_intr_0 & pbdma_intr_0_method_pending_f()) != 0U) {
-		ga10b_pbdma_reset_method(g, pbdma_id, 0);
+		g->ops.pbdma.reset_method(g, pbdma_id, 0);
 		recover = true;
 	}
 
@@ -465,8 +465,7 @@ static bool ga10b_pbdma_handle_intr_0_legacy(struct gk20a *g, u32 pbdma_id,
 		for (i = 0U; i < 4U; i++) {
 			if (g->ops.pbdma.is_sw_method_subch(g,
 					pbdma_id, i)) {
-				ga10b_pbdma_reset_method(g,
-						pbdma_id, i);
+				g->ops.pbdma.reset_method(g, pbdma_id, i);
 			}
 		}
 		recover = true;
diff --git a/drivers/gpu/nvgpu/hal/init/hal_ga100.c b/drivers/gpu/nvgpu/hal/init/hal_ga100.c
index d1a2b66c4..f4ebf51e1 100644
--- a/drivers/gpu/nvgpu/hal/init/hal_ga100.c
+++ b/drivers/gpu/nvgpu/hal/init/hal_ga100.c
@@ -1061,6 +1061,7 @@ static const struct gops_pbdma ga100_ops_pbdma = {
 	.set_clear_intr_offsets = ga100_pbdma_set_clear_intr_offsets,
 	.read_data = ga100_pbdma_read_data,
 	.reset_header = ga10b_pbdma_reset_header,
+	.reset_method = ga10b_pbdma_reset_method,
 	.device_fatal_0_intr_descs = ga10b_pbdma_device_fatal_0_intr_descs,
 	.channel_fatal_0_intr_descs = ga10b_pbdma_channel_fatal_0_intr_descs,
 	.restartable_0_intr_descs = gm20b_pbdma_restartable_0_intr_descs,
diff --git a/drivers/gpu/nvgpu/hal/init/hal_ga10b.c b/drivers/gpu/nvgpu/hal/init/hal_ga10b.c
index 62b7f2c70..660eb3e6b 100644
--- a/drivers/gpu/nvgpu/hal/init/hal_ga10b.c
+++ b/drivers/gpu/nvgpu/hal/init/hal_ga10b.c
@@ -1079,6 +1079,7 @@ static const struct gops_pbdma ga10b_ops_pbdma = {
 	.set_clear_intr_offsets = ga10b_pbdma_set_clear_intr_offsets,
 	.read_data = ga10b_pbdma_read_data,
 	.reset_header = ga10b_pbdma_reset_header,
+	.reset_method = ga10b_pbdma_reset_method,
 	.device_fatal_0_intr_descs = ga10b_pbdma_device_fatal_0_intr_descs,
 	.channel_fatal_0_intr_descs = ga10b_pbdma_channel_fatal_0_intr_descs,
 	.restartable_0_intr_descs = gm20b_pbdma_restartable_0_intr_descs,
diff --git a/drivers/gpu/nvgpu/include/nvgpu/gops/pbdma.h b/drivers/gpu/nvgpu/include/nvgpu/gops/pbdma.h
index 6a43a3594..dab9281e1 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/gops/pbdma.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/gops/pbdma.h
@@ -64,6 +64,8 @@ struct gops_pbdma {
 	u32 (*acquire_val)(u64 timeout);
 	u32 (*read_data)(struct gk20a *g, u32 pbdma_id);
 	void (*reset_header)(struct gk20a *g, u32 pbdma_id);
+	void (*reset_method)(struct gk20a *g, u32 pbdma_id,
+			u32 pbdma_method_index);
 	u32 (*device_fatal_0_intr_descs)(void);
 	u32 (*channel_fatal_0_intr_descs)(void);
 	u32 (*restartable_0_intr_descs)(void);