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gpu: nvgpu: Nvlink interrupt handling

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Enable logging and error reporting for MIF, DLPL, and TLC blocks.
Configure the NVLIPT and IOCTRL interrupt registers to rollup
the MIF and TLC errors on the link-specific fatal line and the
DLPL interrupts on link-specific intr_a(fatal) line. Both
link_err_fatal and link_intr_a are rolled up to stall interrupt line.
In the handling ISR, clear the interrupt status registers and print
an error.
Move the interrupt handling HAL code to /common/hal.

JIRA NVGPU-4350
JIRA NVGPU-4351
JIRA NVGPU-5231
JIRA NVGPU-4354
JIRA NVGPU-4355
JIRA NVGPU-4356

Change-Id: I14812499caf506592f3ae84d6681d857730d31ff
Signed-off-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2313221
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Tejal Kudav
2020-04-15 07:39:09 +00:00
committed by Alex Waterman
parent d58d6ff321
commit 5af8cedf05
16 changed files with 883 additions and 573 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
drivers/gpu/nvgpu/hal/init/hal_tu104.c
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@@ -180,7 +180,7 @@
#include "hal/xve/xve_tu104.h"
#include "common/nvlink/init/device_reginit_gv100.h"
#include "common/nvlink/intr_and_err_handling_gv100.h"
#include "hal/nvlink/intr_and_err_handling_tu104.h"
#include "hal/nvlink/minion_gv100.h"
#include "hal/nvlink/minion_tu104.h"
#include "hal/nvlink/link_mode_transitions_gv100.h"
@@ -1553,13 +1553,9 @@ static const struct gpu_ops tu104_ops = {
.is_debug_mode = tu104_nvlink_minion_is_debug_mode,
},
.intr = {
.common_intr_enable = gv100_nvlink_common_intr_enable,
.init_nvlipt_intr = gv100_nvlink_init_nvlipt_intr,
.enable_link_intr = gv100_nvlink_enable_link_intr,
.init_mif_intr = gv100_nvlink_init_mif_intr,
.mif_intr_enable = gv100_nvlink_mif_intr_enable,
.dlpl_intr_enable = gv100_nvlink_dlpl_intr_enable,
.isr = gv100_nvlink_isr,
.init_link_err_intr = tu104_nvlink_init_link_err_intr,
.enable_link_err_intr = tu104_nvlink_enable_link_err_intr,
.isr = tu104_nvlink_isr,
}
},
#endif