nv-tegra-mirror/linux-nvgpu
1
0
Fork 0
mirror of git://nv-tegra.nvidia.com/linux-nvgpu.git synced 2025-12-23 09:57:08 +03:00
Code Issues Packages Projects Releases Wiki Activity

gpu: nvgpu: add characteristics flag NVGPU_GPU_FLAGS_SUPPORT_TSG

Browse Source 
NVGPU_GPU_FLAGS_SUPPORT_TSG indicates both the kernel driver and
device support time slice group (TSG).

Bug 1617046
Bug 200155618

Change-Id: Ib3490a32b773222560c58f1fd6d32bffcb97d6cd
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/1010173
Reviewed-by: Sami Kiminki <skiminki@nvidia.com>
Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
This commit is contained in:
Richard Zhao
2016-02-09 15:22:16 -08:00
committed by Vladislav Buzov
parent 9f7613945c
commit 5b7588a50b
3 changed files with 12 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
drivers/gpu/nvgpu/gk20a/gk20a.c
View File

@@ -1999,6 +1999,7 @@ int gk20a_init_gpu_characteristics(struct gk20a *g)
gpu->flags |= NVGPU_GPU_FLAGS_HAS_SYNCPOINTS; gpu->flags |= NVGPU_GPU_FLAGS_HAS_SYNCPOINTS;
gpu->flags |= NVGPU_GPU_FLAGS_SUPPORT_USERSPACE_MANAGED_AS; gpu->flags |= NVGPU_GPU_FLAGS_SUPPORT_USERSPACE_MANAGED_AS;
gpu->flags |= NVGPU_GPU_FLAGS_SUPPORT_TSG;
gpu->gpc_mask = 1; gpu->gpc_mask = 1;

2
drivers/gpu/nvgpu/vgpu/vgpu.c
View File

@@ -329,6 +329,8 @@ int vgpu_pm_finalize_poweron(struct device *dev)
goto done; goto done;
} }
g->gpu_characteristics.flags &= ~NVGPU_GPU_FLAGS_SUPPORT_TSG;
gk20a_channel_resume(g); gk20a_channel_resume(g);
done: done:

16
include/uapi/linux/nvgpu.h
View File

@@ -95,19 +95,21 @@ struct nvgpu_gpu_zbc_query_table_args {
#define NVGPU_GPU_BUS_TYPE_NONE 0 #define NVGPU_GPU_BUS_TYPE_NONE 0
#define NVGPU_GPU_BUS_TYPE_AXI 32 #define NVGPU_GPU_BUS_TYPE_AXI 32
#define NVGPU_GPU_FLAGS_HAS_SYNCPOINTS (1 << 0) #define NVGPU_GPU_FLAGS_HAS_SYNCPOINTS (1ULL << 0)
/* MAP_BUFFER_EX with partial mappings */ /* MAP_BUFFER_EX with partial mappings */
#define NVGPU_GPU_FLAGS_SUPPORT_PARTIAL_MAPPINGS (1 << 1) #define NVGPU_GPU_FLAGS_SUPPORT_PARTIAL_MAPPINGS (1ULL << 1)
/* MAP_BUFFER_EX with sparse allocations */ /* MAP_BUFFER_EX with sparse allocations */
#define NVGPU_GPU_FLAGS_SUPPORT_SPARSE_ALLOCS (1 << 2) #define NVGPU_GPU_FLAGS_SUPPORT_SPARSE_ALLOCS (1ULL << 2)
/* sync fence FDs are available in, e.g., submit_gpfifo */ /* sync fence FDs are available in, e.g., submit_gpfifo */
#define NVGPU_GPU_FLAGS_SUPPORT_SYNC_FENCE_FDS (1 << 3) #define NVGPU_GPU_FLAGS_SUPPORT_SYNC_FENCE_FDS (1ULL << 3)
/* NVGPU_IOCTL_CHANNEL_CYCLE_STATS is available */ /* NVGPU_IOCTL_CHANNEL_CYCLE_STATS is available */
#define NVGPU_GPU_FLAGS_SUPPORT_CYCLE_STATS (1 << 4) #define NVGPU_GPU_FLAGS_SUPPORT_CYCLE_STATS (1ULL << 4)
/* NVGPU_IOCTL_CHANNEL_CYCLE_STATS_SNAPSHOT is available */ /* NVGPU_IOCTL_CHANNEL_CYCLE_STATS_SNAPSHOT is available */
#define NVGPU_GPU_FLAGS_SUPPORT_CYCLE_STATS_SNAPSHOT (1 << 6) #define NVGPU_GPU_FLAGS_SUPPORT_CYCLE_STATS_SNAPSHOT (1ULL << 6)
/* User-space managed address spaces support */ /* User-space managed address spaces support */
#define NVGPU_GPU_FLAGS_SUPPORT_USERSPACE_MANAGED_AS (1 << 7) #define NVGPU_GPU_FLAGS_SUPPORT_USERSPACE_MANAGED_AS (1ULL << 7)
/* Both gpu driver and device support TSG */
#define NVGPU_GPU_FLAGS_SUPPORT_TSG (1ULL << 8)
struct nvgpu_gpu_characteristics { struct nvgpu_gpu_characteristics {
__u32 arch; __u32 arch;