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gpu: nvgpu: Cleanup uart and debugfs debug prints

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The gk20a_debug_dump() function implicitly adds a newline since it
uses nvgpu_err() under the hood (for uart destined prints). For the
seq_file destined writes it does not so there is an annoying inconsistency.

Remove the newline that many of the gk20a_debug_dump() calls add and add
the newline to the (now) seq_printf() call. This reduces the length of
debug dump logs and speeds them up - UART is _very_ slow after all.

Also cleanup some formatting issues in the various debug prints I
happened to notice.

JIRA NVGPU-5541

Change-Id: Iabf853d5c50214794fc4cbb602dfffabeb877132
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2347956
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Alex Waterman
2020-05-20 11:21:28 -05:00
parent f2d424d452
commit 5d06a59bc5
8 changed files with 236 additions and 240 deletions
Download Patch File Download Diff File Expand all files Collapse all files

16
drivers/gpu/nvgpu/common/fifo/channel.c
View File

@@ -2433,9 +2433,9 @@ static void nvgpu_channel_sync_debug_dump(struct gk20a *g,
{ {
#ifdef CONFIG_NVGPU_NON_FUSA #ifdef CONFIG_NVGPU_NON_FUSA
gk20a_debug_output(o, gk20a_debug_output(o,
"RAMFC : TOP: %016llx PUT: %016llx GET: %016llx " "RAMFC: TOP: %012llx PUT: %012llx GET: %012llx "
"FETCH: %016llx" "FETCH: %012llx "
"HEADER: %08x COUNT: %08x" "HEADER: %08x COUNT: %08x "
"SYNCPOINT: %08x %08x " "SYNCPOINT: %08x %08x "
"SEMAPHORE: %08x %08x %08x %08x", "SEMAPHORE: %08x %08x %08x %08x",
info->inst.pb_top_level_get, info->inst.pb_top_level_get,
@@ -2483,10 +2483,10 @@ static void nvgpu_channel_info_debug_dump(struct gk20a *g,
nvgpu_channel_sync_debug_dump(g, o, info); nvgpu_channel_sync_debug_dump(g, o, info);
} else { } else {
gk20a_debug_output(o, gk20a_debug_output(o,
"RAMFC : TOP: %016llx PUT: %016llx GET: %016llx " "RAMFC: TOP: %012llx PUT: %012llx GET: %012llx "
"FETCH: %016llx" "FETCH: %012llx "
"HEADER: %08x COUNT: %08x" "HEADER: %08x COUNT: %08x "
"SEMAPHORE: addr %016llx" "SEMAPHORE: addr %012llx "
"payload %016llx execute %08x", "payload %016llx execute %08x",
info->inst.pb_top_level_get, info->inst.pb_top_level_get,
info->inst.pb_put, info->inst.pb_put,
@@ -2507,7 +2507,7 @@ static void nvgpu_channel_info_debug_dump(struct gk20a *g,
info->sema.addr); info->sema.addr);
} }
gk20a_debug_output(o, "\n"); gk20a_debug_output(o, " ");
} }
void nvgpu_channel_debug_dump_all(struct gk20a *g, void nvgpu_channel_debug_dump_all(struct gk20a *g,

2
drivers/gpu/nvgpu/hal/fifo/engine_status_gm20b.c
View File

@@ -66,5 +66,5 @@ void gm20b_dump_engine_status(struct gk20a *g, struct nvgpu_debug_context *o)
gk20a_debug_output(o, " State: busy"); gk20a_debug_output(o, " State: busy");
} }
} }
gk20a_debug_output(o, "\n"); gk20a_debug_output(o, " ");
} }

4
drivers/gpu/nvgpu/hal/fifo/engine_status_gv100_fusa.c
View File

@@ -77,7 +77,7 @@ void gv100_dump_engine_status(struct gk20a *g, struct nvgpu_debug_context *o)
if (engine_status.is_busy) { if (engine_status.is_busy) {
gk20a_debug_output(o, "busy "); gk20a_debug_output(o, "busy ");
} }
gk20a_debug_output(o, "\n"); gk20a_debug_output(o, " ");
} }
gk20a_debug_output(o, "\n"); gk20a_debug_output(o, " ");
} }

130
drivers/gpu/nvgpu/hal/gr/gr/gr_gm20b.c
View File

@@ -280,132 +280,132 @@ int gr_gm20b_dump_gr_status_regs(struct gk20a *g,
gr_engine_id = nvgpu_engine_get_gr_id(g); gr_engine_id = nvgpu_engine_get_gr_id(g);
gk20a_debug_output(o, "NV_PGRAPH_STATUS: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_STATUS: 0x%x",
gk20a_readl(g, gr_status_r())); gk20a_readl(g, gr_status_r()));
gk20a_debug_output(o, "NV_PGRAPH_STATUS1: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_STATUS1: 0x%x",
gk20a_readl(g, gr_status_1_r())); gk20a_readl(g, gr_status_1_r()));
gk20a_debug_output(o, "NV_PGRAPH_STATUS2: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_STATUS2: 0x%x",
gk20a_readl(g, gr_status_2_r())); gk20a_readl(g, gr_status_2_r()));
gk20a_debug_output(o, "NV_PGRAPH_ENGINE_STATUS: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_ENGINE_STATUS: 0x%x",
gk20a_readl(g, gr_engine_status_r())); gk20a_readl(g, gr_engine_status_r()));
gk20a_debug_output(o, "NV_PGRAPH_GRFIFO_STATUS : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_GRFIFO_STATUS : 0x%x",
gk20a_readl(g, gr_gpfifo_status_r())); gk20a_readl(g, gr_gpfifo_status_r()));
gk20a_debug_output(o, "NV_PGRAPH_GRFIFO_CONTROL : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_GRFIFO_CONTROL : 0x%x",
gk20a_readl(g, gr_gpfifo_ctl_r())); gk20a_readl(g, gr_gpfifo_ctl_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_HOST_INT_STATUS : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_HOST_INT_STATUS : 0x%x",
gk20a_readl(g, gr_fecs_host_int_status_r())); gk20a_readl(g, gr_fecs_host_int_status_r()));
gk20a_debug_output(o, "NV_PGRAPH_EXCEPTION : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_EXCEPTION : 0x%x",
gk20a_readl(g, gr_exception_r())); gk20a_readl(g, gr_exception_r()));
gk20a_debug_output(o, "NV_PGRAPH_FECS_INTR : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_FECS_INTR : 0x%x",
gk20a_readl(g, gr_fecs_intr_r())); gk20a_readl(g, gr_fecs_intr_r()));
g->ops.engine_status.read_engine_status_info(g, gr_engine_id, g->ops.engine_status.read_engine_status_info(g, gr_engine_id,
&engine_status); &engine_status);
gk20a_debug_output(o, "NV_PFIFO_ENGINE_STATUS(GR) : 0x%x\n", gk20a_debug_output(o, "NV_PFIFO_ENGINE_STATUS(GR) : 0x%x",
engine_status.reg_data); engine_status.reg_data);
gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY0: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY0: 0x%x",
gk20a_readl(g, gr_activity_0_r())); gk20a_readl(g, gr_activity_0_r()));
gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY1: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY1: 0x%x",
gk20a_readl(g, gr_activity_1_r())); gk20a_readl(g, gr_activity_1_r()));
gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY2: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY2: 0x%x",
gk20a_readl(g, gr_activity_2_r())); gk20a_readl(g, gr_activity_2_r()));
gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY4: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY4: 0x%x",
gk20a_readl(g, gr_activity_4_r())); gk20a_readl(g, gr_activity_4_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_SKED_ACTIVITY: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_SKED_ACTIVITY: 0x%x",
gk20a_readl(g, gr_pri_sked_activity_r())); gk20a_readl(g, gr_pri_sked_activity_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY0: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY0: 0x%x",
gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_activity0_r())); gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_activity0_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY1: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY1: 0x%x",
gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_activity1_r())); gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_activity1_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY2: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY2: 0x%x",
gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_activity2_r())); gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_activity2_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY3: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY3: 0x%x",
gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_activity3_r())); gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_activity3_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_ACTIVITY0: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_ACTIVITY0: 0x%x",
gk20a_readl(g, gr_pri_gpc0_tpc0_tpccs_tpc_activity_0_r())); gk20a_readl(g, gr_pri_gpc0_tpc0_tpccs_tpc_activity_0_r()));
if ((nvgpu_gr_config_get_gpc_tpc_count_base(gr->config) != NULL) && if ((nvgpu_gr_config_get_gpc_tpc_count_base(gr->config) != NULL) &&
(nvgpu_gr_config_get_gpc_tpc_count(gr->config, 0) == 2U)) { (nvgpu_gr_config_get_gpc_tpc_count(gr->config, 0) == 2U)) {
gk20a_debug_output(o, gk20a_debug_output(o,
"NV_PGRAPH_PRI_GPC0_TPC1_TPCCS_TPC_ACTIVITY0: 0x%x\n", "NV_PGRAPH_PRI_GPC0_TPC1_TPCCS_TPC_ACTIVITY0: 0x%x",
gk20a_readl(g, gk20a_readl(g,
(gr_pri_gpc0_tpc0_tpccs_tpc_activity_0_r() + (gr_pri_gpc0_tpc0_tpccs_tpc_activity_0_r() +
nvgpu_get_litter_value(g, GPU_LIT_TPC_IN_GPC_STRIDE)))); nvgpu_get_litter_value(g, GPU_LIT_TPC_IN_GPC_STRIDE))));
} }
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY0: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY0: 0x%x",
gk20a_readl(g, gr_pri_gpcs_gpccs_gpc_activity_0_r())); gk20a_readl(g, gr_pri_gpcs_gpccs_gpc_activity_0_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY1: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY1: 0x%x",
gk20a_readl(g, gr_pri_gpcs_gpccs_gpc_activity_1_r())); gk20a_readl(g, gr_pri_gpcs_gpccs_gpc_activity_1_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY2: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY2: 0x%x",
gk20a_readl(g, gr_pri_gpcs_gpccs_gpc_activity_2_r())); gk20a_readl(g, gr_pri_gpcs_gpccs_gpc_activity_2_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY3: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY3: 0x%x",
gk20a_readl(g, gr_pri_gpcs_gpccs_gpc_activity_3_r())); gk20a_readl(g, gr_pri_gpcs_gpccs_gpc_activity_3_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_TPCS_TPCCS_TPC_ACTIVITY0: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_TPCS_TPCCS_TPC_ACTIVITY0: 0x%x",
gk20a_readl(g, gr_pri_gpcs_tpcs_tpccs_tpc_activity_0_r())); gk20a_readl(g, gr_pri_gpcs_tpcs_tpccs_tpc_activity_0_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_BECS_BE_ACTIVITY0: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_BECS_BE_ACTIVITY0: 0x%x",
gk20a_readl(g, gr_pri_be0_becs_be_activity0_r())); gk20a_readl(g, gr_pri_be0_becs_be_activity0_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BE1_BECS_BE_ACTIVITY0: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_BE1_BECS_BE_ACTIVITY0: 0x%x",
gk20a_readl(g, (gr_pri_be0_becs_be_activity0_r() + gk20a_readl(g, (gr_pri_be0_becs_be_activity0_r() +
nvgpu_get_litter_value(g, GPU_LIT_ROP_STRIDE)))); nvgpu_get_litter_value(g, GPU_LIT_ROP_STRIDE))));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BES_BECS_BE_ACTIVITY0: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_BES_BECS_BE_ACTIVITY0: 0x%x",
gk20a_readl(g, gr_pri_bes_becs_be_activity0_r())); gk20a_readl(g, gr_pri_bes_becs_be_activity0_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_DS_MPIPE_STATUS: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_DS_MPIPE_STATUS: 0x%x",
gk20a_readl(g, gr_pri_ds_mpipe_status_r())); gk20a_readl(g, gr_pri_ds_mpipe_status_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FE_GO_IDLE_ON_STATUS: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_FE_GO_IDLE_ON_STATUS: 0x%x",
gk20a_readl(g, gr_pri_fe_go_idle_on_status_r())); gk20a_readl(g, gr_pri_fe_go_idle_on_status_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FE_GO_IDLE_TIMEOUT : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_FE_GO_IDLE_TIMEOUT : 0x%x",
gk20a_readl(g, gr_fe_go_idle_timeout_r())); gk20a_readl(g, gr_fe_go_idle_timeout_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FE_GO_IDLE_CHECK : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_FE_GO_IDLE_CHECK : 0x%x",
gk20a_readl(g, gr_pri_fe_go_idle_check_r())); gk20a_readl(g, gr_pri_fe_go_idle_check_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FE_GO_IDLE_INFO : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_FE_GO_IDLE_INFO : 0x%x",
gk20a_readl(g, gr_pri_fe_go_idle_info_r())); gk20a_readl(g, gr_pri_fe_go_idle_info_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_TPC0_TEX_M_TEX_SUBUNITS_STATUS: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_TPC0_TEX_M_TEX_SUBUNITS_STATUS: 0x%x",
gk20a_readl(g, gr_pri_gpc0_tpc0_tex_m_tex_subunits_status_r())); gk20a_readl(g, gr_pri_gpc0_tpc0_tex_m_tex_subunits_status_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_CWD_FS: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_CWD_FS: 0x%x",
gk20a_readl(g, gr_cwd_fs_r())); gk20a_readl(g, gr_cwd_fs_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FE_TPC_FS: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_FE_TPC_FS: 0x%x",
gk20a_readl(g, gr_fe_tpc_fs_r())); gk20a_readl(g, gr_fe_tpc_fs_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_CWD_GPC_TPC_ID(0): 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_CWD_GPC_TPC_ID(0): 0x%x",
gk20a_readl(g, gr_cwd_gpc_tpc_id_r(0))); gk20a_readl(g, gr_cwd_gpc_tpc_id_r(0)));
gk20a_debug_output(o, "NV_PGRAPH_PRI_CWD_SM_ID(0): 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_CWD_SM_ID(0): 0x%x",
gk20a_readl(g, gr_cwd_sm_id_r(0))); gk20a_readl(g, gr_cwd_sm_id_r(0)));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_CTXSW_STATUS_FE_0: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_CTXSW_STATUS_FE_0: 0x%x",
g->ops.gr.falcon.read_fecs_ctxsw_status0(g)); g->ops.gr.falcon.read_fecs_ctxsw_status0(g));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_CTXSW_STATUS_1: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_CTXSW_STATUS_1: 0x%x",
g->ops.gr.falcon.read_fecs_ctxsw_status1(g)); g->ops.gr.falcon.read_fecs_ctxsw_status1(g));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_STATUS_GPC_0: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_STATUS_GPC_0: 0x%x",
gk20a_readl(g, gr_gpc0_gpccs_ctxsw_status_gpc_0_r())); gk20a_readl(g, gr_gpc0_gpccs_ctxsw_status_gpc_0_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_STATUS_1: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_STATUS_1: 0x%x",
gk20a_readl(g, gr_gpc0_gpccs_ctxsw_status_1_r())); gk20a_readl(g, gr_gpc0_gpccs_ctxsw_status_1_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_CTXSW_IDLESTATE : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_CTXSW_IDLESTATE : 0x%x",
gk20a_readl(g, gr_fecs_ctxsw_idlestate_r())); gk20a_readl(g, gr_fecs_ctxsw_idlestate_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_IDLESTATE : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_IDLESTATE : 0x%x",
gk20a_readl(g, gr_gpc0_gpccs_ctxsw_idlestate_r())); gk20a_readl(g, gr_gpc0_gpccs_ctxsw_idlestate_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_CURRENT_CTX : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_CURRENT_CTX : 0x%x",
g->ops.gr.falcon.get_current_ctx(g)); g->ops.gr.falcon.get_current_ctx(g));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_NEW_CTX : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_NEW_CTX : 0x%x",
gk20a_readl(g, gr_fecs_new_ctx_r())); gk20a_readl(g, gr_fecs_new_ctx_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_CROP_STATUS1 : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_CROP_STATUS1 : 0x%x",
gk20a_readl(g, gr_pri_be0_crop_status1_r())); gk20a_readl(g, gr_pri_be0_crop_status1_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BES_CROP_STATUS1 : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_BES_CROP_STATUS1 : 0x%x",
gk20a_readl(g, gr_pri_bes_crop_status1_r())); gk20a_readl(g, gr_pri_bes_crop_status1_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_ZROP_STATUS : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_ZROP_STATUS : 0x%x",
gk20a_readl(g, gr_pri_be0_zrop_status_r())); gk20a_readl(g, gr_pri_be0_zrop_status_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_ZROP_STATUS2 : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_ZROP_STATUS2 : 0x%x",
gk20a_readl(g, gr_pri_be0_zrop_status2_r())); gk20a_readl(g, gr_pri_be0_zrop_status2_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BES_ZROP_STATUS : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_BES_ZROP_STATUS : 0x%x",
gk20a_readl(g, gr_pri_bes_zrop_status_r())); gk20a_readl(g, gr_pri_bes_zrop_status_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BES_ZROP_STATUS2 : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_BES_ZROP_STATUS2 : 0x%x",
gk20a_readl(g, gr_pri_bes_zrop_status2_r())); gk20a_readl(g, gr_pri_bes_zrop_status2_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_BECS_BE_EXCEPTION: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_BECS_BE_EXCEPTION: 0x%x",
gk20a_readl(g, gr_pri_be0_becs_be_exception_r())); gk20a_readl(g, gr_pri_be0_becs_be_exception_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_BECS_BE_EXCEPTION_EN: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_BECS_BE_EXCEPTION_EN: 0x%x",
gk20a_readl(g, gr_pri_be0_becs_be_exception_en_r())); gk20a_readl(g, gr_pri_be0_becs_be_exception_en_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_EXCEPTION: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_EXCEPTION: 0x%x",
gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_exception_r())); gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_exception_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_EXCEPTION_EN: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_EXCEPTION_EN: 0x%x",
gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_exception_en_r())); gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_exception_en_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_EXCEPTION: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_EXCEPTION: 0x%x",
gk20a_readl(g, gr_pri_gpc0_tpc0_tpccs_tpc_exception_r())); gk20a_readl(g, gr_pri_gpc0_tpc0_tpccs_tpc_exception_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_EXCEPTION_EN: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_EXCEPTION_EN: 0x%x",
gk20a_readl(g, gr_pri_gpc0_tpc0_tpccs_tpc_exception_en_r())); gk20a_readl(g, gr_pri_gpc0_tpc0_tpccs_tpc_exception_en_r()));
return 0; return 0;
@@ -513,19 +513,19 @@ void gr_gm20b_bpt_reg_info(struct gk20a *g, struct nvgpu_warpstate *w_state)
/* Only for debug purpose */ /* Only for debug purpose */
for (sm_id = 0; sm_id < no_of_sm; sm_id++) { for (sm_id = 0; sm_id < no_of_sm; sm_id++) {
nvgpu_log_fn(g, "w_state[%d].valid_warps[0]: %llx\n", nvgpu_log_fn(g, "w_state[%d].valid_warps[0]: %llx",
sm_id, w_state[sm_id].valid_warps[0]); sm_id, w_state[sm_id].valid_warps[0]);
nvgpu_log_fn(g, "w_state[%d].valid_warps[1]: %llx\n", nvgpu_log_fn(g, "w_state[%d].valid_warps[1]: %llx",
sm_id, w_state[sm_id].valid_warps[1]); sm_id, w_state[sm_id].valid_warps[1]);
nvgpu_log_fn(g, "w_state[%d].trapped_warps[0]: %llx\n", nvgpu_log_fn(g, "w_state[%d].trapped_warps[0]: %llx",
sm_id, w_state[sm_id].trapped_warps[0]); sm_id, w_state[sm_id].trapped_warps[0]);
nvgpu_log_fn(g, "w_state[%d].trapped_warps[1]: %llx\n", nvgpu_log_fn(g, "w_state[%d].trapped_warps[1]: %llx",
sm_id, w_state[sm_id].trapped_warps[1]); sm_id, w_state[sm_id].trapped_warps[1]);
nvgpu_log_fn(g, "w_state[%d].paused_warps[0]: %llx\n", nvgpu_log_fn(g, "w_state[%d].paused_warps[0]: %llx",
sm_id, w_state[sm_id].paused_warps[0]); sm_id, w_state[sm_id].paused_warps[0]);
nvgpu_log_fn(g, "w_state[%d].paused_warps[1]: %llx\n", nvgpu_log_fn(g, "w_state[%d].paused_warps[1]: %llx",
sm_id, w_state[sm_id].paused_warps[1]); sm_id, w_state[sm_id].paused_warps[1]);
} }
} }

133
drivers/gpu/nvgpu/hal/gr/gr/gr_gp10b.c
View File

@@ -239,128 +239,128 @@ int gr_gp10b_dump_gr_status_regs(struct gk20a *g,
gr_engine_id = nvgpu_engine_get_gr_id(g); gr_engine_id = nvgpu_engine_get_gr_id(g);
gk20a_debug_output(o, "NV_PGRAPH_STATUS: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_STATUS: 0x%x",
gk20a_readl(g, gr_status_r())); gk20a_readl(g, gr_status_r()));
gk20a_debug_output(o, "NV_PGRAPH_STATUS1: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_STATUS1: 0x%x",
gk20a_readl(g, gr_status_1_r())); gk20a_readl(g, gr_status_1_r()));
gk20a_debug_output(o, "NV_PGRAPH_STATUS2: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_STATUS2: 0x%x",
gk20a_readl(g, gr_status_2_r())); gk20a_readl(g, gr_status_2_r()));
gk20a_debug_output(o, "NV_PGRAPH_ENGINE_STATUS: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_ENGINE_STATUS: 0x%x",
gk20a_readl(g, gr_engine_status_r())); gk20a_readl(g, gr_engine_status_r()));
gk20a_debug_output(o, "NV_PGRAPH_GRFIFO_STATUS : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_GRFIFO_STATUS : 0x%x",
gk20a_readl(g, gr_gpfifo_status_r())); gk20a_readl(g, gr_gpfifo_status_r()));
gk20a_debug_output(o, "NV_PGRAPH_GRFIFO_CONTROL : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_GRFIFO_CONTROL : 0x%x",
gk20a_readl(g, gr_gpfifo_ctl_r())); gk20a_readl(g, gr_gpfifo_ctl_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_HOST_INT_STATUS : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_HOST_INT_STATUS : 0x%x",
gk20a_readl(g, gr_fecs_host_int_status_r())); gk20a_readl(g, gr_fecs_host_int_status_r()));
gk20a_debug_output(o, "NV_PGRAPH_EXCEPTION : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_EXCEPTION : 0x%x",
gk20a_readl(g, gr_exception_r())); gk20a_readl(g, gr_exception_r()));
gk20a_debug_output(o, "NV_PGRAPH_FECS_INTR : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_FECS_INTR : 0x%x",
gk20a_readl(g, gr_fecs_intr_r())); gk20a_readl(g, gr_fecs_intr_r()));
g->ops.engine_status.read_engine_status_info(g, gr_engine_id, g->ops.engine_status.read_engine_status_info(g, gr_engine_id,
&engine_status); &engine_status);
gk20a_debug_output(o, "NV_PFIFO_ENGINE_STATUS(GR) : 0x%x\n", gk20a_debug_output(o, "NV_PFIFO_ENGINE_STATUS(GR) : 0x%x",
engine_status.reg_data); engine_status.reg_data);
gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY0: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY0: 0x%x",
gk20a_readl(g, gr_activity_0_r())); gk20a_readl(g, gr_activity_0_r()));
gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY1: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY1: 0x%x",
gk20a_readl(g, gr_activity_1_r())); gk20a_readl(g, gr_activity_1_r()));
gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY2: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY2: 0x%x",
gk20a_readl(g, gr_activity_2_r())); gk20a_readl(g, gr_activity_2_r()));
gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY4: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY4: 0x%x",
gk20a_readl(g, gr_activity_4_r())); gk20a_readl(g, gr_activity_4_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_SKED_ACTIVITY: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_SKED_ACTIVITY: 0x%x",
gk20a_readl(g, gr_pri_sked_activity_r())); gk20a_readl(g, gr_pri_sked_activity_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY0: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY0: 0x%x",
gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_activity0_r())); gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_activity0_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY1: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY1: 0x%x",
gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_activity1_r())); gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_activity1_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY2: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY2: 0x%x",
gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_activity2_r())); gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_activity2_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY3: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY3: 0x%x",
gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_activity3_r())); gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_activity3_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_ACTIVITY0: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_ACTIVITY0: 0x%x",
gk20a_readl(g, gr_pri_gpc0_tpc0_tpccs_tpc_activity_0_r())); gk20a_readl(g, gr_pri_gpc0_tpc0_tpccs_tpc_activity_0_r()));
if ((nvgpu_gr_config_get_gpc_tpc_count_base(gr->config) != NULL) && if ((nvgpu_gr_config_get_gpc_tpc_count_base(gr->config) != NULL) &&
(nvgpu_gr_config_get_gpc_tpc_count(gr->config, 0) == 2U)) { (nvgpu_gr_config_get_gpc_tpc_count(gr->config, 0) == 2U)) {
gk20a_debug_output(o, gk20a_debug_output(o,
"NV_PGRAPH_PRI_GPC0_TPC1_TPCCS_TPC_ACTIVITY0: 0x%x\n", "NV_PGRAPH_PRI_GPC0_TPC1_TPCCS_TPC_ACTIVITY0: 0x%x",
gk20a_readl(g, gk20a_readl(g,
(gr_pri_gpc0_tpc0_tpccs_tpc_activity_0_r() + (gr_pri_gpc0_tpc0_tpccs_tpc_activity_0_r() +
nvgpu_get_litter_value(g, GPU_LIT_TPC_IN_GPC_STRIDE)))); nvgpu_get_litter_value(g, GPU_LIT_TPC_IN_GPC_STRIDE))));
} }
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY0: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY0: 0x%x",
gk20a_readl(g, gr_pri_gpcs_gpccs_gpc_activity_0_r())); gk20a_readl(g, gr_pri_gpcs_gpccs_gpc_activity_0_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY1: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY1: 0x%x",
gk20a_readl(g, gr_pri_gpcs_gpccs_gpc_activity_1_r())); gk20a_readl(g, gr_pri_gpcs_gpccs_gpc_activity_1_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY2: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY2: 0x%x",
gk20a_readl(g, gr_pri_gpcs_gpccs_gpc_activity_2_r())); gk20a_readl(g, gr_pri_gpcs_gpccs_gpc_activity_2_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY3: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY3: 0x%x",
gk20a_readl(g, gr_pri_gpcs_gpccs_gpc_activity_3_r())); gk20a_readl(g, gr_pri_gpcs_gpccs_gpc_activity_3_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_TPCS_TPCCS_TPC_ACTIVITY0: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_TPCS_TPCCS_TPC_ACTIVITY0: 0x%x",
gk20a_readl(g, gr_pri_gpcs_tpcs_tpccs_tpc_activity_0_r())); gk20a_readl(g, gr_pri_gpcs_tpcs_tpccs_tpc_activity_0_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_BECS_BE_ACTIVITY0: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_BECS_BE_ACTIVITY0: 0x%x",
gk20a_readl(g, gr_pri_be0_becs_be_activity0_r())); gk20a_readl(g, gr_pri_be0_becs_be_activity0_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BE1_BECS_BE_ACTIVITY0: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_BE1_BECS_BE_ACTIVITY0: 0x%x",
gk20a_readl(g, (gr_pri_be0_becs_be_activity0_r() + gk20a_readl(g, (gr_pri_be0_becs_be_activity0_r() +
nvgpu_get_litter_value(g, GPU_LIT_ROP_STRIDE)))); nvgpu_get_litter_value(g, GPU_LIT_ROP_STRIDE))));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BES_BECS_BE_ACTIVITY0: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_BES_BECS_BE_ACTIVITY0: 0x%x",
gk20a_readl(g, gr_pri_bes_becs_be_activity0_r())); gk20a_readl(g, gr_pri_bes_becs_be_activity0_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_DS_MPIPE_STATUS: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_DS_MPIPE_STATUS: 0x%x",
gk20a_readl(g, gr_pri_ds_mpipe_status_r())); gk20a_readl(g, gr_pri_ds_mpipe_status_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FE_GO_IDLE_TIMEOUT : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_FE_GO_IDLE_TIMEOUT : 0x%x",
gk20a_readl(g, gr_fe_go_idle_timeout_r())); gk20a_readl(g, gr_fe_go_idle_timeout_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FE_GO_IDLE_INFO : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_FE_GO_IDLE_INFO : 0x%x",
gk20a_readl(g, gr_pri_fe_go_idle_info_r())); gk20a_readl(g, gr_pri_fe_go_idle_info_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_TPC0_TEX_M_TEX_SUBUNITS_STATUS: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_TPC0_TEX_M_TEX_SUBUNITS_STATUS: 0x%x",
gk20a_readl(g, gr_pri_gpc0_tpc0_tex_m_tex_subunits_status_r())); gk20a_readl(g, gr_pri_gpc0_tpc0_tex_m_tex_subunits_status_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_CWD_FS: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_CWD_FS: 0x%x",
gk20a_readl(g, gr_cwd_fs_r())); gk20a_readl(g, gr_cwd_fs_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FE_TPC_FS: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_FE_TPC_FS: 0x%x",
gk20a_readl(g, gr_fe_tpc_fs_r())); gk20a_readl(g, gr_fe_tpc_fs_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_CWD_GPC_TPC_ID(0): 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_CWD_GPC_TPC_ID(0): 0x%x",
gk20a_readl(g, gr_cwd_gpc_tpc_id_r(0))); gk20a_readl(g, gr_cwd_gpc_tpc_id_r(0)));
gk20a_debug_output(o, "NV_PGRAPH_PRI_CWD_SM_ID(0): 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_CWD_SM_ID(0): 0x%x",
gk20a_readl(g, gr_cwd_sm_id_r(0))); gk20a_readl(g, gr_cwd_sm_id_r(0)));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_CTXSW_STATUS_FE_0: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_CTXSW_STATUS_FE_0: 0x%x",
g->ops.gr.falcon.read_fecs_ctxsw_status0(g)); g->ops.gr.falcon.read_fecs_ctxsw_status0(g));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_CTXSW_STATUS_1: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_CTXSW_STATUS_1: 0x%x",
g->ops.gr.falcon.read_fecs_ctxsw_status1(g)); g->ops.gr.falcon.read_fecs_ctxsw_status1(g));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_STATUS_GPC_0: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_STATUS_GPC_0: 0x%x",
gk20a_readl(g, gr_gpc0_gpccs_ctxsw_status_gpc_0_r())); gk20a_readl(g, gr_gpc0_gpccs_ctxsw_status_gpc_0_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_STATUS_1: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_STATUS_1: 0x%x",
gk20a_readl(g, gr_gpc0_gpccs_ctxsw_status_1_r())); gk20a_readl(g, gr_gpc0_gpccs_ctxsw_status_1_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_CTXSW_IDLESTATE : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_CTXSW_IDLESTATE : 0x%x",
gk20a_readl(g, gr_fecs_ctxsw_idlestate_r())); gk20a_readl(g, gr_fecs_ctxsw_idlestate_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_IDLESTATE : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_IDLESTATE : 0x%x",
gk20a_readl(g, gr_gpc0_gpccs_ctxsw_idlestate_r())); gk20a_readl(g, gr_gpc0_gpccs_ctxsw_idlestate_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_CURRENT_CTX : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_CURRENT_CTX : 0x%x",
g->ops.gr.falcon.get_current_ctx(g)); g->ops.gr.falcon.get_current_ctx(g));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_NEW_CTX : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_NEW_CTX : 0x%x",
gk20a_readl(g, gr_fecs_new_ctx_r())); gk20a_readl(g, gr_fecs_new_ctx_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_CROP_STATUS1 : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_CROP_STATUS1 : 0x%x",
gk20a_readl(g, gr_pri_be0_crop_status1_r())); gk20a_readl(g, gr_pri_be0_crop_status1_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BES_CROP_STATUS1 : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_BES_CROP_STATUS1 : 0x%x",
gk20a_readl(g, gr_pri_bes_crop_status1_r())); gk20a_readl(g, gr_pri_bes_crop_status1_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_ZROP_STATUS : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_ZROP_STATUS : 0x%x",
gk20a_readl(g, gr_pri_be0_zrop_status_r())); gk20a_readl(g, gr_pri_be0_zrop_status_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_ZROP_STATUS2 : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_ZROP_STATUS2 : 0x%x",
gk20a_readl(g, gr_pri_be0_zrop_status2_r())); gk20a_readl(g, gr_pri_be0_zrop_status2_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BES_ZROP_STATUS : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_BES_ZROP_STATUS : 0x%x",
gk20a_readl(g, gr_pri_bes_zrop_status_r())); gk20a_readl(g, gr_pri_bes_zrop_status_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BES_ZROP_STATUS2 : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_BES_ZROP_STATUS2 : 0x%x",
gk20a_readl(g, gr_pri_bes_zrop_status2_r())); gk20a_readl(g, gr_pri_bes_zrop_status2_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_BECS_BE_EXCEPTION: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_BECS_BE_EXCEPTION: 0x%x",
gk20a_readl(g, gr_pri_be0_becs_be_exception_r())); gk20a_readl(g, gr_pri_be0_becs_be_exception_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_BECS_BE_EXCEPTION_EN: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_BECS_BE_EXCEPTION_EN: 0x%x",
gk20a_readl(g, gr_pri_be0_becs_be_exception_en_r())); gk20a_readl(g, gr_pri_be0_becs_be_exception_en_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_EXCEPTION: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_EXCEPTION: 0x%x",
gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_exception_r())); gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_exception_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_EXCEPTION_EN: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_EXCEPTION_EN: 0x%x",
gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_exception_en_r())); gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_exception_en_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_EXCEPTION: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_EXCEPTION: 0x%x",
gk20a_readl(g, gr_pri_gpc0_tpc0_tpccs_tpc_exception_r())); gk20a_readl(g, gr_pri_gpc0_tpc0_tpccs_tpc_exception_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_EXCEPTION_EN: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_EXCEPTION_EN: 0x%x",
gk20a_readl(g, gr_pri_gpc0_tpc0_tpccs_tpc_exception_en_r())); gk20a_readl(g, gr_pri_gpc0_tpc0_tpccs_tpc_exception_en_r()));
return 0; return 0;
} }
@@ -507,7 +507,7 @@ int gr_gp10b_pre_process_sm_exception(struct gk20a *g,
NVGPU_PREEMPTION_MODE_COMPUTE_CILP); NVGPU_PREEMPTION_MODE_COMPUTE_CILP);
} }
nvgpu_log(g, gpu_dbg_fn | gpu_dbg_gpu_dbg, "SM Exception received on gpc %d tpc %d = %u\n", nvgpu_log(g, gpu_dbg_fn | gpu_dbg_gpu_dbg, "SM Exception received on gpc %d tpc %d = %u",
gpc, tpc, global_esr); gpc, tpc, global_esr);
if (cilp_enabled && sm_debugger_attached) { if (cilp_enabled && sm_debugger_attached) {
@@ -538,19 +538,19 @@ int gr_gp10b_pre_process_sm_exception(struct gk20a *g,
*ignore_debugger = true; *ignore_debugger = true;
nvgpu_log(g, gpu_dbg_fn | gpu_dbg_gpu_dbg, nvgpu_log(g, gpu_dbg_fn | gpu_dbg_gpu_dbg,
"CILP: starting wait for LOCKED_DOWN on gpc %d tpc %d\n", "CILP: starting wait for LOCKED_DOWN on gpc %d tpc %d",
gpc, tpc); gpc, tpc);
if (nvgpu_dbg_gpu_broadcast_stop_trigger(fault_ch)) { if (nvgpu_dbg_gpu_broadcast_stop_trigger(fault_ch)) {
nvgpu_log(g, gpu_dbg_fn | gpu_dbg_gpu_dbg, nvgpu_log(g, gpu_dbg_fn | gpu_dbg_gpu_dbg,
"CILP: Broadcasting STOP_TRIGGER from gpc %d tpc %d\n", "CILP: Broadcasting STOP_TRIGGER from gpc %d tpc %d",
gpc, tpc); gpc, tpc);
g->ops.gr.suspend_all_sms(g, global_mask, false); g->ops.gr.suspend_all_sms(g, global_mask, false);
nvgpu_dbg_gpu_clear_broadcast_stop_trigger(fault_ch); nvgpu_dbg_gpu_clear_broadcast_stop_trigger(fault_ch);
} else { } else {
nvgpu_log(g, gpu_dbg_fn | gpu_dbg_gpu_dbg, nvgpu_log(g, gpu_dbg_fn | gpu_dbg_gpu_dbg,
"CILP: STOP_TRIGGER from gpc %d tpc %d\n", "CILP: STOP_TRIGGER from gpc %d tpc %d",
gpc, tpc); gpc, tpc);
g->ops.gr.suspend_single_sm(g, gpc, tpc, sm, global_mask, true); g->ops.gr.suspend_single_sm(g, gpc, tpc, sm, global_mask, true);
} }
@@ -561,10 +561,10 @@ int gr_gp10b_pre_process_sm_exception(struct gk20a *g,
g->ops.gr.intr.clear_sm_hww(g, g->ops.gr.intr.clear_sm_hww(g,
gpc, tpc, sm, global_esr_copy); gpc, tpc, sm, global_esr_copy);
nvgpu_log(g, gpu_dbg_fn | gpu_dbg_gpu_dbg, nvgpu_log(g, gpu_dbg_fn | gpu_dbg_gpu_dbg,
"CILP: HWWs cleared for gpc %d tpc %d\n", "CILP: HWWs cleared for gpc %d tpc %d",
gpc, tpc); gpc, tpc);
nvgpu_log(g, gpu_dbg_fn | gpu_dbg_gpu_dbg, "CILP: Setting CILP preempt pending\n"); nvgpu_log(g, gpu_dbg_fn | gpu_dbg_gpu_dbg, "CILP: Setting CILP preempt pending");
ret = gr_gp10b_set_cilp_preempt_pending(g, fault_ch); ret = gr_gp10b_set_cilp_preempt_pending(g, fault_ch);
if (ret != 0) { if (ret != 0) {
nvgpu_err(g, "CILP: error while setting CILP preempt pending!"); nvgpu_err(g, "CILP: error while setting CILP preempt pending!");
@@ -574,7 +574,7 @@ int gr_gp10b_pre_process_sm_exception(struct gk20a *g,
dbgr_control0 = gk20a_readl(g, gr_gpc0_tpc0_sm_dbgr_control0_r() + offset); dbgr_control0 = gk20a_readl(g, gr_gpc0_tpc0_sm_dbgr_control0_r() + offset);
if ((dbgr_control0 & gr_gpcs_tpcs_sm_dbgr_control0_single_step_mode_enable_f()) != 0U) { if ((dbgr_control0 & gr_gpcs_tpcs_sm_dbgr_control0_single_step_mode_enable_f()) != 0U) {
nvgpu_log(g, gpu_dbg_fn | gpu_dbg_gpu_dbg, nvgpu_log(g, gpu_dbg_fn | gpu_dbg_gpu_dbg,
"CILP: clearing SINGLE_STEP_MODE before resume for gpc %d tpc %d\n", "CILP: clearing SINGLE_STEP_MODE before resume for gpc %d tpc %d",
gpc, tpc); gpc, tpc);
dbgr_control0 = set_field(dbgr_control0, dbgr_control0 = set_field(dbgr_control0,
gr_gpcs_tpcs_sm_dbgr_control0_single_step_mode_m(), gr_gpcs_tpcs_sm_dbgr_control0_single_step_mode_m(),
@@ -583,12 +583,12 @@ int gr_gp10b_pre_process_sm_exception(struct gk20a *g,
} }
nvgpu_log(g, gpu_dbg_fn | gpu_dbg_gpu_dbg, nvgpu_log(g, gpu_dbg_fn | gpu_dbg_gpu_dbg,
"CILP: resume for gpc %d tpc %d\n", "CILP: resume for gpc %d tpc %d",
gpc, tpc); gpc, tpc);
g->ops.gr.resume_single_sm(g, gpc, tpc, sm); g->ops.gr.resume_single_sm(g, gpc, tpc, sm);
*ignore_debugger = true; *ignore_debugger = true;
nvgpu_log(g, gpu_dbg_fn | gpu_dbg_gpu_dbg, "CILP: All done on gpc %d, tpc %d\n", gpc, tpc); nvgpu_log(g, gpu_dbg_fn | gpu_dbg_gpu_dbg, "CILP: All done on gpc %d, tpc %d", gpc, tpc);
} }
*early_exit = true; *early_exit = true;
@@ -817,4 +817,3 @@ out:
return err; return err;
} }
#endif #endif

164
drivers/gpu/nvgpu/hal/gr/gr/gr_gv11b.c
View File

@@ -192,32 +192,32 @@ static void gr_gv11b_dump_gr_per_sm_regs(struct gk20a *g,
{ {
gk20a_debug_output(o, gk20a_debug_output(o,
"NV_PGRAPH_PRI_GPC%d_TPC%d_SM%d_HWW_WARP_ESR: 0x%x\n", "NV_PGRAPH_PRI_GPC%d_TPC%d_SM%d_HWW_WARP_ESR: 0x%x",
gpc, tpc, sm, gk20a_readl(g, gpc, tpc, sm, gk20a_readl(g,
gr_gpc0_tpc0_sm0_hww_warp_esr_r() + offset)); gr_gpc0_tpc0_sm0_hww_warp_esr_r() + offset));
gk20a_debug_output(o, gk20a_debug_output(o,
"NV_PGRAPH_PRI_GPC%d_TPC%d_SM%d_HWW_WARP_ESR_REPORT_MASK: 0x%x\n", "NV_PGRAPH_PRI_GPC%d_TPC%d_SM%d_HWW_WARP_ESR_REPORT_MASK: 0x%x",
gpc, tpc, sm, gk20a_readl(g, gpc, tpc, sm, gk20a_readl(g,
gr_gpc0_tpc0_sm0_hww_warp_esr_report_mask_r() + offset)); gr_gpc0_tpc0_sm0_hww_warp_esr_report_mask_r() + offset));
gk20a_debug_output(o, gk20a_debug_output(o,
"NV_PGRAPH_PRI_GPC%d_TPC%d_SM%d_HWW_GLOBAL_ESR: 0x%x\n", "NV_PGRAPH_PRI_GPC%d_TPC%d_SM%d_HWW_GLOBAL_ESR: 0x%x",
gpc, tpc, sm, gk20a_readl(g, gpc, tpc, sm, gk20a_readl(g,
gr_gpc0_tpc0_sm0_hww_global_esr_r() + offset)); gr_gpc0_tpc0_sm0_hww_global_esr_r() + offset));
gk20a_debug_output(o, gk20a_debug_output(o,
"NV_PGRAPH_PRI_GPC%d_TPC%d_SM%d_HWW_GLOBAL_ESR_REPORT_MASK: 0x%x\n", "NV_PGRAPH_PRI_GPC%d_TPC%d_SM%d_HWW_GLOBAL_ESR_REPORT_MASK: 0x%x",
gpc, tpc, sm, gk20a_readl(g, gpc, tpc, sm, gk20a_readl(g,
gr_gpc0_tpc0_sm0_hww_global_esr_report_mask_r() + offset)); gr_gpc0_tpc0_sm0_hww_global_esr_report_mask_r() + offset));
gk20a_debug_output(o, gk20a_debug_output(o,
"NV_PGRAPH_PRI_GPC%d_TPC%d_SM%d_DBGR_CONTROL0: 0x%x\n", "NV_PGRAPH_PRI_GPC%d_TPC%d_SM%d_DBGR_CONTROL0: 0x%x",
gpc, tpc, sm, gk20a_readl(g, gpc, tpc, sm, gk20a_readl(g,
gr_gpc0_tpc0_sm0_dbgr_control0_r() + offset)); gr_gpc0_tpc0_sm0_dbgr_control0_r() + offset));
gk20a_debug_output(o, gk20a_debug_output(o,
"NV_PGRAPH_PRI_GPC%d_TPC%d_SM%d_DBGR_STATUS0: 0x%x\n", "NV_PGRAPH_PRI_GPC%d_TPC%d_SM%d_DBGR_STATUS0: 0x%x",
gpc, tpc, sm, gk20a_readl(g, gpc, tpc, sm, gk20a_readl(g,
gr_gpc0_tpc0_sm0_dbgr_status0_r() + offset)); gr_gpc0_tpc0_sm0_dbgr_status0_r() + offset));
} }
@@ -229,26 +229,26 @@ static void gr_gv11b_dump_gr_sm_regs(struct gk20a *g,
u32 gpc_offset, tpc_offset, offset; u32 gpc_offset, tpc_offset, offset;
gk20a_debug_output(o, gk20a_debug_output(o,
"NV_PGRAPH_PRI_GPCS_TPCS_SMS_HWW_GLOBAL_ESR_REPORT_MASK: 0x%x\n", "NV_PGRAPH_PRI_GPCS_TPCS_SMS_HWW_GLOBAL_ESR_REPORT_MASK: 0x%x",
gk20a_readl(g, gk20a_readl(g,
gr_gpcs_tpcs_sms_hww_global_esr_report_mask_r())); gr_gpcs_tpcs_sms_hww_global_esr_report_mask_r()));
gk20a_debug_output(o, gk20a_debug_output(o,
"NV_PGRAPH_PRI_GPCS_TPCS_SMS_HWW_WARP_ESR_REPORT_MASK: 0x%x\n", "NV_PGRAPH_PRI_GPCS_TPCS_SMS_HWW_WARP_ESR_REPORT_MASK: 0x%x",
gk20a_readl(g, gr_gpcs_tpcs_sms_hww_warp_esr_report_mask_r())); gk20a_readl(g, gr_gpcs_tpcs_sms_hww_warp_esr_report_mask_r()));
gk20a_debug_output(o, gk20a_debug_output(o,
"NV_PGRAPH_PRI_GPCS_TPCS_SMS_HWW_GLOBAL_ESR: 0x%x\n", "NV_PGRAPH_PRI_GPCS_TPCS_SMS_HWW_GLOBAL_ESR: 0x%x",
gk20a_readl(g, gr_gpcs_tpcs_sms_hww_global_esr_r())); gk20a_readl(g, gr_gpcs_tpcs_sms_hww_global_esr_r()));
gk20a_debug_output(o, gk20a_debug_output(o,
"NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_CONTROL0: 0x%x\n", "NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_CONTROL0: 0x%x",
gk20a_readl(g, gr_gpcs_tpcs_sms_dbgr_control0_r())); gk20a_readl(g, gr_gpcs_tpcs_sms_dbgr_control0_r()));
gk20a_debug_output(o, gk20a_debug_output(o,
"NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_STATUS0: 0x%x\n", "NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_STATUS0: 0x%x",
gk20a_readl(g, gr_gpcs_tpcs_sms_dbgr_status0_r())); gk20a_readl(g, gr_gpcs_tpcs_sms_dbgr_status0_r()));
gk20a_debug_output(o, gk20a_debug_output(o,
"NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_BPT_PAUSE_MASK_0: 0x%x\n", "NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_BPT_PAUSE_MASK_0: 0x%x",
gk20a_readl(g, gr_gpcs_tpcs_sms_dbgr_bpt_pause_mask_0_r())); gk20a_readl(g, gr_gpcs_tpcs_sms_dbgr_bpt_pause_mask_0_r()));
gk20a_debug_output(o, gk20a_debug_output(o,
"NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_BPT_PAUSE_MASK_1: 0x%x\n", "NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_BPT_PAUSE_MASK_1: 0x%x",
gk20a_readl(g, gr_gpcs_tpcs_sms_dbgr_bpt_pause_mask_1_r())); gk20a_readl(g, gr_gpcs_tpcs_sms_dbgr_bpt_pause_mask_1_r()));
sm_per_tpc = nvgpu_get_litter_value(g, GPU_LIT_NUM_SM_PER_TPC); sm_per_tpc = nvgpu_get_litter_value(g, GPU_LIT_NUM_SM_PER_TPC);
@@ -280,132 +280,132 @@ int gr_gv11b_dump_gr_status_regs(struct gk20a *g,
gr_engine_id = nvgpu_engine_get_gr_id(g); gr_engine_id = nvgpu_engine_get_gr_id(g);
gk20a_debug_output(o, "NV_PGRAPH_STATUS: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_STATUS: 0x%x",
gk20a_readl(g, gr_status_r())); gk20a_readl(g, gr_status_r()));
gk20a_debug_output(o, "NV_PGRAPH_STATUS1: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_STATUS1: 0x%x",
gk20a_readl(g, gr_status_1_r())); gk20a_readl(g, gr_status_1_r()));
gk20a_debug_output(o, "NV_PGRAPH_STATUS2: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_STATUS2: 0x%x",
gk20a_readl(g, gr_status_2_r())); gk20a_readl(g, gr_status_2_r()));
gk20a_debug_output(o, "NV_PGRAPH_ENGINE_STATUS: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_ENGINE_STATUS: 0x%x",
gk20a_readl(g, gr_engine_status_r())); gk20a_readl(g, gr_engine_status_r()));
gk20a_debug_output(o, "NV_PGRAPH_GRFIFO_STATUS : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_GRFIFO_STATUS : 0x%x",
gk20a_readl(g, gr_gpfifo_status_r())); gk20a_readl(g, gr_gpfifo_status_r()));
gk20a_debug_output(o, "NV_PGRAPH_GRFIFO_CONTROL : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_GRFIFO_CONTROL : 0x%x",
gk20a_readl(g, gr_gpfifo_ctl_r())); gk20a_readl(g, gr_gpfifo_ctl_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_HOST_INT_STATUS : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_HOST_INT_STATUS : 0x%x",
gk20a_readl(g, gr_fecs_host_int_status_r())); gk20a_readl(g, gr_fecs_host_int_status_r()));
gk20a_debug_output(o, "NV_PGRAPH_EXCEPTION : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_EXCEPTION : 0x%x",
gk20a_readl(g, gr_exception_r())); gk20a_readl(g, gr_exception_r()));
gk20a_debug_output(o, "NV_PGRAPH_FECS_INTR : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_FECS_INTR : 0x%x",
gk20a_readl(g, gr_fecs_intr_r())); gk20a_readl(g, gr_fecs_intr_r()));
g->ops.engine_status.read_engine_status_info(g, gr_engine_id, g->ops.engine_status.read_engine_status_info(g, gr_engine_id,
&engine_status); &engine_status);
gk20a_debug_output(o, "NV_PFIFO_ENGINE_STATUS(GR) : 0x%x\n", gk20a_debug_output(o, "NV_PFIFO_ENGINE_STATUS(GR) : 0x%x",
engine_status.reg_data); engine_status.reg_data);
gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY0: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY0: 0x%x",
gk20a_readl(g, gr_activity_0_r())); gk20a_readl(g, gr_activity_0_r()));
gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY1: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY1: 0x%x",
gk20a_readl(g, gr_activity_1_r())); gk20a_readl(g, gr_activity_1_r()));
gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY2: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY2: 0x%x",
gk20a_readl(g, gr_activity_2_r())); gk20a_readl(g, gr_activity_2_r()));
gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY4: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY4: 0x%x",
gk20a_readl(g, gr_activity_4_r())); gk20a_readl(g, gr_activity_4_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_SKED_ACTIVITY: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_SKED_ACTIVITY: 0x%x",
gk20a_readl(g, gr_pri_sked_activity_r())); gk20a_readl(g, gr_pri_sked_activity_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY0: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY0: 0x%x",
gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_activity0_r())); gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_activity0_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY1: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY1: 0x%x",
gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_activity1_r())); gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_activity1_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY2: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY2: 0x%x",
gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_activity2_r())); gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_activity2_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY3: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY3: 0x%x",
gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_activity3_r())); gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_activity3_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_ACTIVITY0: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_ACTIVITY0: 0x%x",
gk20a_readl(g, gr_pri_gpc0_tpc0_tpccs_tpc_activity_0_r())); gk20a_readl(g, gr_pri_gpc0_tpc0_tpccs_tpc_activity_0_r()));
if ((nvgpu_gr_config_get_gpc_tpc_count_base(gr->config) != NULL) && if ((nvgpu_gr_config_get_gpc_tpc_count_base(gr->config) != NULL) &&
(nvgpu_gr_config_get_gpc_tpc_count(gr->config, 0) == 2U)) { (nvgpu_gr_config_get_gpc_tpc_count(gr->config, 0) == 2U)) {
gk20a_debug_output(o, gk20a_debug_output(o,
"NV_PGRAPH_PRI_GPC0_TPC1_TPCCS_TPC_ACTIVITY0: 0x%x\n", "NV_PGRAPH_PRI_GPC0_TPC1_TPCCS_TPC_ACTIVITY0: 0x%x",
gk20a_readl(g, gk20a_readl(g,
(gr_pri_gpc0_tpc0_tpccs_tpc_activity_0_r() + (gr_pri_gpc0_tpc0_tpccs_tpc_activity_0_r() +
nvgpu_get_litter_value(g, GPU_LIT_TPC_IN_GPC_STRIDE)))); nvgpu_get_litter_value(g, GPU_LIT_TPC_IN_GPC_STRIDE))));
} }
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY0: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY0: 0x%x",
gk20a_readl(g, gr_pri_gpcs_gpccs_gpc_activity_0_r())); gk20a_readl(g, gr_pri_gpcs_gpccs_gpc_activity_0_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY1: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY1: 0x%x",
gk20a_readl(g, gr_pri_gpcs_gpccs_gpc_activity_1_r())); gk20a_readl(g, gr_pri_gpcs_gpccs_gpc_activity_1_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY2: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY2: 0x%x",
gk20a_readl(g, gr_pri_gpcs_gpccs_gpc_activity_2_r())); gk20a_readl(g, gr_pri_gpcs_gpccs_gpc_activity_2_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY3: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY3: 0x%x",
gk20a_readl(g, gr_pri_gpcs_gpccs_gpc_activity_3_r())); gk20a_readl(g, gr_pri_gpcs_gpccs_gpc_activity_3_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_TPCS_TPCCS_TPC_ACTIVITY0: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_TPCS_TPCCS_TPC_ACTIVITY0: 0x%x",
gk20a_readl(g, gr_pri_gpcs_tpcs_tpccs_tpc_activity_0_r())); gk20a_readl(g, gr_pri_gpcs_tpcs_tpccs_tpc_activity_0_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_BECS_BE_ACTIVITY0: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_BECS_BE_ACTIVITY0: 0x%x",
gk20a_readl(g, gr_pri_be0_becs_be_activity0_r())); gk20a_readl(g, gr_pri_be0_becs_be_activity0_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BE1_BECS_BE_ACTIVITY0: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_BE1_BECS_BE_ACTIVITY0: 0x%x",
gk20a_readl(g, (gr_pri_be0_becs_be_activity0_r() + gk20a_readl(g, (gr_pri_be0_becs_be_activity0_r() +
nvgpu_get_litter_value(g, GPU_LIT_ROP_STRIDE)))); nvgpu_get_litter_value(g, GPU_LIT_ROP_STRIDE))));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BES_BECS_BE_ACTIVITY0: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_BES_BECS_BE_ACTIVITY0: 0x%x",
gk20a_readl(g, gr_pri_bes_becs_be_activity0_r())); gk20a_readl(g, gr_pri_bes_becs_be_activity0_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_DS_MPIPE_STATUS: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_DS_MPIPE_STATUS: 0x%x",
gk20a_readl(g, gr_pri_ds_mpipe_status_r())); gk20a_readl(g, gr_pri_ds_mpipe_status_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FE_GO_IDLE_TIMEOUT : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_FE_GO_IDLE_TIMEOUT : 0x%x",
gk20a_readl(g, gr_fe_go_idle_timeout_r())); gk20a_readl(g, gr_fe_go_idle_timeout_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FE_GO_IDLE_INFO : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_FE_GO_IDLE_INFO : 0x%x",
gk20a_readl(g, gr_pri_fe_go_idle_info_r())); gk20a_readl(g, gr_pri_fe_go_idle_info_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_TPC0_TEX_M_TEX_SUBUNITS_STATUS: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_TPC0_TEX_M_TEX_SUBUNITS_STATUS: 0x%x",
gk20a_readl(g, gr_pri_gpc0_tpc0_tex_m_tex_subunits_status_r())); gk20a_readl(g, gr_pri_gpc0_tpc0_tex_m_tex_subunits_status_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_CWD_FS: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_CWD_FS: 0x%x",
gk20a_readl(g, gr_cwd_fs_r())); gk20a_readl(g, gr_cwd_fs_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FE_TPC_FS(0): 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_FE_TPC_FS(0): 0x%x",
gk20a_readl(g, gr_fe_tpc_fs_r(0))); gk20a_readl(g, gr_fe_tpc_fs_r(0)));
gk20a_debug_output(o, "NV_PGRAPH_PRI_CWD_GPC_TPC_ID: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_CWD_GPC_TPC_ID: 0x%x",
gk20a_readl(g, gr_cwd_gpc_tpc_id_r(0))); gk20a_readl(g, gr_cwd_gpc_tpc_id_r(0)));
gk20a_debug_output(o, "NV_PGRAPH_PRI_CWD_SM_ID(0): 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_CWD_SM_ID(0): 0x%x",
gk20a_readl(g, gr_cwd_sm_id_r(0))); gk20a_readl(g, gr_cwd_sm_id_r(0)));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_CTXSW_STATUS_FE_0: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_CTXSW_STATUS_FE_0: 0x%x",
g->ops.gr.falcon.read_fecs_ctxsw_status0(g)); g->ops.gr.falcon.read_fecs_ctxsw_status0(g));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_CTXSW_STATUS_1: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_CTXSW_STATUS_1: 0x%x",
g->ops.gr.falcon.read_fecs_ctxsw_status1(g)); g->ops.gr.falcon.read_fecs_ctxsw_status1(g));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_STATUS_GPC_0: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_STATUS_GPC_0: 0x%x",
gk20a_readl(g, gr_gpc0_gpccs_ctxsw_status_gpc_0_r())); gk20a_readl(g, gr_gpc0_gpccs_ctxsw_status_gpc_0_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_STATUS_1: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_STATUS_1: 0x%x",
gk20a_readl(g, gr_gpc0_gpccs_ctxsw_status_1_r())); gk20a_readl(g, gr_gpc0_gpccs_ctxsw_status_1_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_CTXSW_IDLESTATE : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_CTXSW_IDLESTATE : 0x%x",
gk20a_readl(g, gr_fecs_ctxsw_idlestate_r())); gk20a_readl(g, gr_fecs_ctxsw_idlestate_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_IDLESTATE : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_IDLESTATE : 0x%x",
gk20a_readl(g, gr_gpc0_gpccs_ctxsw_idlestate_r())); gk20a_readl(g, gr_gpc0_gpccs_ctxsw_idlestate_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_CURRENT_CTX : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_CURRENT_CTX : 0x%x",
g->ops.gr.falcon.get_current_ctx(g)); g->ops.gr.falcon.get_current_ctx(g));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_NEW_CTX : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_NEW_CTX : 0x%x",
gk20a_readl(g, gr_fecs_new_ctx_r())); gk20a_readl(g, gr_fecs_new_ctx_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_HOST_INT_ENABLE : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_HOST_INT_ENABLE : 0x%x",
gk20a_readl(g, gr_fecs_host_int_enable_r())); gk20a_readl(g, gr_fecs_host_int_enable_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_HOST_INT_STATUS : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_HOST_INT_STATUS : 0x%x",
gk20a_readl(g, gr_fecs_host_int_status_r())); gk20a_readl(g, gr_fecs_host_int_status_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_CROP_STATUS1 : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_CROP_STATUS1 : 0x%x",
gk20a_readl(g, gr_pri_be0_crop_status1_r())); gk20a_readl(g, gr_pri_be0_crop_status1_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BES_CROP_STATUS1 : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_BES_CROP_STATUS1 : 0x%x",
gk20a_readl(g, gr_pri_bes_crop_status1_r())); gk20a_readl(g, gr_pri_bes_crop_status1_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_ZROP_STATUS : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_ZROP_STATUS : 0x%x",
gk20a_readl(g, gr_pri_be0_zrop_status_r())); gk20a_readl(g, gr_pri_be0_zrop_status_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_ZROP_STATUS2 : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_ZROP_STATUS2 : 0x%x",
gk20a_readl(g, gr_pri_be0_zrop_status2_r())); gk20a_readl(g, gr_pri_be0_zrop_status2_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BES_ZROP_STATUS : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_BES_ZROP_STATUS : 0x%x",
gk20a_readl(g, gr_pri_bes_zrop_status_r())); gk20a_readl(g, gr_pri_bes_zrop_status_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BES_ZROP_STATUS2 : 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_BES_ZROP_STATUS2 : 0x%x",
gk20a_readl(g, gr_pri_bes_zrop_status2_r())); gk20a_readl(g, gr_pri_bes_zrop_status2_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_BECS_BE_EXCEPTION: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_BECS_BE_EXCEPTION: 0x%x",
gk20a_readl(g, gr_pri_be0_becs_be_exception_r())); gk20a_readl(g, gr_pri_be0_becs_be_exception_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_BECS_BE_EXCEPTION_EN: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_BECS_BE_EXCEPTION_EN: 0x%x",
gk20a_readl(g, gr_pri_be0_becs_be_exception_en_r())); gk20a_readl(g, gr_pri_be0_becs_be_exception_en_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_EXCEPTION: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_EXCEPTION: 0x%x",
gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_exception_r())); gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_exception_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_EXCEPTION_EN: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_EXCEPTION_EN: 0x%x",
gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_exception_en_r())); gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_exception_en_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_EXCEPTION: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_EXCEPTION: 0x%x",
gk20a_readl(g, gr_pri_gpc0_tpc0_tpccs_tpc_exception_r())); gk20a_readl(g, gr_pri_gpc0_tpc0_tpccs_tpc_exception_r()));
gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_EXCEPTION_EN: 0x%x\n", gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_EXCEPTION_EN: 0x%x",
gk20a_readl(g, gr_pri_gpc0_tpc0_tpccs_tpc_exception_en_r())); gk20a_readl(g, gr_pri_gpc0_tpc0_tpccs_tpc_exception_en_r()));
gr_gv11b_dump_gr_sm_regs(g, o); gr_gv11b_dump_gr_sm_regs(g, o);
@@ -714,7 +714,7 @@ int gr_gv11b_pre_process_sm_exception(struct gk20a *g,
"gpc %d tpc %d sm %d", "gpc %d tpc %d sm %d",
gpc, tpc, sm); gpc, tpc, sm);
nvgpu_log(g, gpu_dbg_fn | gpu_dbg_gpu_dbg, "CILP: Setting CILP preempt pending\n"); nvgpu_log(g, gpu_dbg_fn | gpu_dbg_gpu_dbg, "CILP: Setting CILP preempt pending");
ret = gr_gp10b_set_cilp_preempt_pending(g, fault_ch); ret = gr_gp10b_set_cilp_preempt_pending(g, fault_ch);
if (ret != 0) { if (ret != 0) {
nvgpu_err(g, "CILP: error while setting CILP preempt pending!"); nvgpu_err(g, "CILP: error while setting CILP preempt pending!");
@@ -827,19 +827,19 @@ void gv11b_gr_bpt_reg_info(struct gk20a *g, struct nvgpu_warpstate *w_state)
/* Only for debug purpose */ /* Only for debug purpose */
for (sm_id = 0; sm_id < no_of_sm; sm_id++) { for (sm_id = 0; sm_id < no_of_sm; sm_id++) {
nvgpu_log_fn(g, "w_state[%d].valid_warps[0]: %llx\n", nvgpu_log_fn(g, "w_state[%d].valid_warps[0]: %llx",
sm_id, w_state[sm_id].valid_warps[0]); sm_id, w_state[sm_id].valid_warps[0]);
nvgpu_log_fn(g, "w_state[%d].valid_warps[1]: %llx\n", nvgpu_log_fn(g, "w_state[%d].valid_warps[1]: %llx",
sm_id, w_state[sm_id].valid_warps[1]); sm_id, w_state[sm_id].valid_warps[1]);
nvgpu_log_fn(g, "w_state[%d].trapped_warps[0]: %llx\n", nvgpu_log_fn(g, "w_state[%d].trapped_warps[0]: %llx",
sm_id, w_state[sm_id].trapped_warps[0]); sm_id, w_state[sm_id].trapped_warps[0]);
nvgpu_log_fn(g, "w_state[%d].trapped_warps[1]: %llx\n", nvgpu_log_fn(g, "w_state[%d].trapped_warps[1]: %llx",
sm_id, w_state[sm_id].trapped_warps[1]); sm_id, w_state[sm_id].trapped_warps[1]);
nvgpu_log_fn(g, "w_state[%d].paused_warps[0]: %llx\n", nvgpu_log_fn(g, "w_state[%d].paused_warps[0]: %llx",
sm_id, w_state[sm_id].paused_warps[0]); sm_id, w_state[sm_id].paused_warps[0]);
nvgpu_log_fn(g, "w_state[%d].paused_warps[1]: %llx\n", nvgpu_log_fn(g, "w_state[%d].paused_warps[1]: %llx",
sm_id, w_state[sm_id].paused_warps[1]); sm_id, w_state[sm_id].paused_warps[1]);
} }
} }
@@ -931,7 +931,7 @@ int gv11b_gr_set_sm_debug_mode(struct gk20a *g,
err = gr_gk20a_exec_ctx_ops(ch, ops, i, i, 0, NULL); err = gr_gk20a_exec_ctx_ops(ch, ops, i, i, 0, NULL);
if (err != 0) { if (err != 0) {
nvgpu_err(g, "Failed to access register\n"); nvgpu_err(g, "Failed to access register");
} }
nvgpu_kfree(g, ops); nvgpu_kfree(g, ops);
return err; return err;
@@ -1224,13 +1224,13 @@ static void gv11b_gr_sm_dump_warp_bpt_pause_trap_mask_regs(struct gk20a *g,
if (timeout) { if (timeout) {
nvgpu_err(g, nvgpu_err(g,
"STATUS0=0x%x CONTROL0=0x%x VALID_MASK=0x%llx " "STATUS0=0x%x CONTROL0=0x%x VALID_MASK=0x%llx "
"PAUSE_MASK=0x%llx TRAP_MASK=0x%llx\n", "PAUSE_MASK=0x%llx TRAP_MASK=0x%llx",
dbgr_status0, dbgr_control0, warps_valid, dbgr_status0, dbgr_control0, warps_valid,
warps_paused, warps_trapped); warps_paused, warps_trapped);
} else { } else {
nvgpu_log(g, gpu_dbg_intr | gpu_dbg_gpu_dbg, nvgpu_log(g, gpu_dbg_intr | gpu_dbg_gpu_dbg,
"STATUS0=0x%x CONTROL0=0x%x VALID_MASK=0x%llx " "STATUS0=0x%x CONTROL0=0x%x VALID_MASK=0x%llx "
"PAUSE_MASK=0x%llx TRAP_MASK=0x%llx\n", "PAUSE_MASK=0x%llx TRAP_MASK=0x%llx",
dbgr_status0, dbgr_control0, warps_valid, dbgr_status0, dbgr_control0, warps_valid,
warps_paused, warps_trapped); warps_paused, warps_trapped);
} }

2
drivers/gpu/nvgpu/include/nvgpu/debug.h
View File

@@ -31,7 +31,7 @@ struct gk20a;
struct gpu_ops; struct gpu_ops;
struct nvgpu_debug_context { struct nvgpu_debug_context {
void (*fn)(void *ctx, const char *str, size_t len); void (*fn)(void *ctx, const char *str);
void *ctx; void *ctx;
char buf[256]; char buf[256];
}; };

13
drivers/gpu/nvgpu/os/linux/debug.c
View File

@@ -39,29 +39,26 @@
unsigned int gk20a_debug_trace_cmdbuf; unsigned int gk20a_debug_trace_cmdbuf;
static inline void gk20a_debug_write_printk(void *ctx, const char *str, static inline void gk20a_debug_write_printk(void *ctx, const char *str)
size_t len)
{ {
struct gk20a *g = ctx; struct gk20a *g = ctx;
nvgpu_err(g, str); nvgpu_err(g, str);
} }
static inline void gk20a_debug_write_to_seqfile(void *ctx, const char *str, static inline void gk20a_debug_write_to_seqfile(void *ctx, const char *str)
size_t len)
{ {
seq_write((struct seq_file *)ctx, str, len); seq_printf((struct seq_file *)ctx, "%s\n", str);
} }
void gk20a_debug_output(struct nvgpu_debug_context *o, const char *fmt, ...) void gk20a_debug_output(struct nvgpu_debug_context *o, const char *fmt, ...)
{ {
va_list args; va_list args;
int len;
va_start(args, fmt); va_start(args, fmt);
len = vsnprintf(o->buf, sizeof(o->buf), fmt, args); vsnprintf(o->buf, sizeof(o->buf), fmt, args);
va_end(args); va_end(args);
o->fn(o->ctx, o->buf, len); o->fn(o->ctx, o->buf);
} }
void gk20a_debug_show_dump(struct gk20a *g, struct nvgpu_debug_context *o) void gk20a_debug_show_dump(struct gk20a *g, struct nvgpu_debug_context *o)