gpu: nvgpu: Maximize DMA segmentation boundary

Linux kernel has a default 32-bit segmentation boundary for
any device that doesn't explicitly configure it. When nvgpu
tries to allocate a larger memory > 4GB, iommu_dma_map_sg()
function in the kernel will take this boundary into account
and add an internal padding to the allocated IOVA space:

|<---IOVA space 1--->|<---padding--->|<---IOVA space 2--->|

When DMA reads/writes the memory using this discountinued
IOVA space, it may end up with accessing the padding part,
instead of the IOVA space 2.

So this patch adds dma_set_seg_boundary() to nvgpu driver,
by maximizing the segmentation boundary up to DMA_BIT_MASK
to ensure a continued IOVA space.

Bug 200558567

Change-Id: I979d56681dddca56f1b02fce83dc81147a6b0d82
Signed-off-by: Nicolin Chen <nicolinc@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2304150
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-by: Puneet Saxena <puneets@nvidia.com>
Reviewed-by: Chris Dragan <kdragan@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Nicolin Chen
2020-02-27 11:57:49 -08:00
committed by Alex Waterman
parent d9c6faa102
commit 5e854efa65
2 changed files with 2 additions and 0 deletions

View File

@@ -99,6 +99,7 @@ static void nvgpu_init_vars(struct gk20a *g)
dma_set_mask(dev, platform->dma_mask); dma_set_mask(dev, platform->dma_mask);
dma_set_coherent_mask(dev, platform->dma_mask); dma_set_coherent_mask(dev, platform->dma_mask);
dma_set_seg_boundary(dev, platform->dma_mask);
nvgpu_init_list_node(&g->profiler_objects); nvgpu_init_list_node(&g->profiler_objects);

View File

@@ -462,6 +462,7 @@ int vgpu_probe(struct platform_device *pdev)
dma_set_mask(dev, platform->dma_mask); dma_set_mask(dev, platform->dma_mask);
dma_set_coherent_mask(dev, platform->dma_mask); dma_set_coherent_mask(dev, platform->dma_mask);
dma_set_seg_boundary(dev, platform->dma_mask);
gk20a->poll_timeout_default = NVGPU_DEFAULT_POLL_TIMEOUT_MS; gk20a->poll_timeout_default = NVGPU_DEFAULT_POLL_TIMEOUT_MS;
gk20a->timeouts_disabled_by_user = false; gk20a->timeouts_disabled_by_user = false;