diff --git a/drivers/gpu/nvgpu/common/falcon/falcon.c b/drivers/gpu/nvgpu/common/falcon/falcon.c
index 8923a0f57..8fa86d366 100644
--- a/drivers/gpu/nvgpu/common/falcon/falcon.c
+++ b/drivers/gpu/nvgpu/common/falcon/falcon.c
@@ -204,7 +204,7 @@ static int falcon_memcpy_params_check(struct nvgpu_falcon *flcn,
 
 	mem_size = g->ops.falcon.get_mem_size(flcn, mem_type);
 
-	if (!(offset < mem_size && (offset + size) <= mem_size)) {
+	if (!((offset < mem_size) && ((offset + size) <= mem_size))) {
 		nvgpu_err(g, "flcn-id 0x%x, copy overflow ",
 			flcn->flcn_id);
 		nvgpu_err(g, "total size 0x%x, offset 0x%x, copy size 0x%x",
diff --git a/drivers/gpu/nvgpu/common/init/nvgpu_init.c b/drivers/gpu/nvgpu/common/init/nvgpu_init.c
index 11ead43d1..bb9659b1a 100644
--- a/drivers/gpu/nvgpu/common/init/nvgpu_init.c
+++ b/drivers/gpu/nvgpu/common/init/nvgpu_init.c
@@ -1,7 +1,7 @@
 /*
  * GK20A Graphics
  *
- * Copyright (c) 2011-2019, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2011-2020, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -163,7 +163,7 @@ void nvgpu_sw_quiesce_remove_support(struct gk20a *g)
 void nvgpu_sw_quiesce(struct gk20a *g)
 {
 #ifndef CONFIG_NVGPU_RECOVERY
-	if (g->is_virtual || g->enabled_flags == NULL ||
+	if (g->is_virtual || (g->enabled_flags == NULL) ||
 		nvgpu_is_enabled(g, NVGPU_DISABLE_SW_QUIESCE)) {
 		goto fail;
 	}
diff --git a/drivers/gpu/nvgpu/common/ltc/ltc.c b/drivers/gpu/nvgpu/common/ltc/ltc.c
index f7f9862df..4cc205b91 100644
--- a/drivers/gpu/nvgpu/common/ltc/ltc.c
+++ b/drivers/gpu/nvgpu/common/ltc/ltc.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2017-2019, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2017-2020, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -63,7 +63,7 @@ int nvgpu_init_ltc_support(struct gk20a *g)
 		g->ops.ltc.init_fs_state(g);
 	}
 
-	if (g->ops.ltc.ecc_init != NULL && !g->ecc.initialized) {
+	if ((g->ops.ltc.ecc_init != NULL) && !g->ecc.initialized) {
 		err = g->ops.ltc.ecc_init(g);
 		if (err != 0) {
 			nvgpu_kfree(g, ltc);
diff --git a/drivers/gpu/nvgpu/common/netlist/netlist.c b/drivers/gpu/nvgpu/common/netlist/netlist.c
index 51dcfbf1b..38aff08b9 100644
--- a/drivers/gpu/nvgpu/common/netlist/netlist.c
+++ b/drivers/gpu/nvgpu/common/netlist/netlist.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2011-2019, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2011-2020, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -450,7 +450,7 @@ clean_up:
 
 static bool nvgpu_netlist_is_valid(int net, u32 major_v, u32 major_v_hw)
 {
-	if (net != NETLIST_FINAL && major_v != major_v_hw) {
+	if ((net != NETLIST_FINAL) && (major_v != major_v_hw)) {
 		return false;
 	}
 	return true;
diff --git a/drivers/gpu/nvgpu/common/pmu/pmu.c b/drivers/gpu/nvgpu/common/pmu/pmu.c
index 2aa296d62..5d117f581 100644
--- a/drivers/gpu/nvgpu/common/pmu/pmu.c
+++ b/drivers/gpu/nvgpu/common/pmu/pmu.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2017-2019, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2017-2020, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -74,7 +74,7 @@ static int pmu_enable_hw(struct nvgpu_pmu *pmu, bool enable)
 
 void nvgpu_pmu_enable_irq(struct gk20a *g, bool enable)
 {
-	if (g->pmu != NULL && g->ops.pmu.pmu_enable_irq != NULL) {
+	if ((g->pmu != NULL) && (g->ops.pmu.pmu_enable_irq != NULL)) {
 		nvgpu_mutex_acquire(&g->pmu->isr_mutex);
 		g->ops.pmu.pmu_enable_irq(g->pmu, enable);
 		g->pmu->isr_enabled = enable;
@@ -180,7 +180,7 @@ int nvgpu_pmu_early_init(struct gk20a *g)
 	pmu->g = g;
 	pmu->flcn = &g->pmu_flcn;
 
-	if (g->ops.pmu.ecc_init != NULL && !g->ecc.initialized) {
+	if ((g->ops.pmu.ecc_init != NULL) && !g->ecc.initialized) {
 		err = g->ops.pmu.ecc_init(g);
 		if (err != 0) {
 			nvgpu_kfree(g, pmu);
diff --git a/drivers/gpu/nvgpu/common/rc/rc.c b/drivers/gpu/nvgpu/common/rc/rc.c
index a4526bfbb..c8a2b8037 100644
--- a/drivers/gpu/nvgpu/common/rc/rc.c
+++ b/drivers/gpu/nvgpu/common/rc/rc.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2011-2019, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2011-2020, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -299,7 +299,7 @@ void nvgpu_rc_mmu_fault(struct gk20a *g, u32 act_eng_bitmask,
 	g->ops.fifo.recover(g, act_eng_bitmask,
 		id, id_type, rc_type, mmufault);
 #else
-	if (id != INVAL_ID && id_type == ID_TYPE_TSG) {
+	if ((id != INVAL_ID) && (id_type == ID_TYPE_TSG)) {
 		struct nvgpu_tsg *tsg = &g->fifo.tsg[id];
 		nvgpu_tsg_set_ctx_mmu_error(g, tsg);
 		nvgpu_tsg_mark_error(g, tsg);
diff --git a/drivers/gpu/nvgpu/common/utils/rbtree.c b/drivers/gpu/nvgpu/common/utils/rbtree.c
index 86979043b..cf881eab2 100644
--- a/drivers/gpu/nvgpu/common/utils/rbtree.c
+++ b/drivers/gpu/nvgpu/common/utils/rbtree.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2017-2019, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2017-2020, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -410,8 +410,8 @@ void nvgpu_rbtree_range_search(u64 key,
 	struct nvgpu_rbtree_node *curr = root;
 
 	while (curr != NULL) {
-		if (key >= curr->key_start &&
-				key < curr->key_end) {
+		if ((key >= curr->key_start) &&
+			(key < curr->key_end)) {
 			*node = curr;
 			return;
 		} else if (key < curr->key_start) {
diff --git a/drivers/gpu/nvgpu/common/utils/string.c b/drivers/gpu/nvgpu/common/utils/string.c
index dec433f94..cd544c077 100644
--- a/drivers/gpu/nvgpu/common/utils/string.c
+++ b/drivers/gpu/nvgpu/common/utils/string.c
@@ -43,7 +43,7 @@ int nvgpu_strnadd_u32(char *dst, const u32 value, size_t size, u32 radix)
 	char *p;
 	u32 digit;
 
-	if (radix < 2U || radix > 16U) {
+	if ((radix < 2U) || (radix > 16U)) {
 		return 0;
 	}
 
@@ -81,7 +81,7 @@ int nvgpu_strnadd_u32(char *dst, const u32 value, size_t size, u32 radix)
 
 bool nvgpu_mem_is_word_aligned(struct gk20a *g, u8 *addr)
 {
-	if ((unsigned long)addr % 4UL != 0UL) {
+	if (((unsigned long)addr % 4UL) != 0UL) {
 		nvgpu_log_info(g, "addr (%p) not 4-byte aligned", addr);
 		return false;
 	}