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gpu: nvgpu: reorganize gpfifo writes in submit
Reduce the number of branches and make the code flow more straightforward by having two complete paths for the gpfifo entry writes: one when job tracking is done and another when not. Although this adds some very minor duplication (of the user gpfifo append call), this way it's easier to read what happens to the job metadata, and when do we even have one. Jira NVGPU-4548 Change-Id: I6be8bc5afaf139e7c49d5e44837e04f642dd5721 Signed-off-by: Konsta Hölttä <kholtta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2321761 (cherry picked from commit 9a3d3c8d556d563b9d67b370636791d6a1dd57ee) Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2324253 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
committed by
Alex Waterman
parent
550d45430f
commit
62955ec7f1
@@ -117,6 +117,7 @@ static int nvgpu_submit_prepare_syncs(struct nvgpu_channel *c,
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}
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if (job->wait_cmd->valid) {
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/* not expired yet */
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*wait_cmd = job->wait_cmd;
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}
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}
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@@ -378,7 +379,6 @@ static int nvgpu_submit_channel_gpfifo(struct nvgpu_channel *c,
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struct gk20a *g = c->g;
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struct priv_cmd_entry *wait_cmd = NULL;
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struct priv_cmd_entry *incr_cmd = NULL;
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struct nvgpu_fence_type *post_fence = NULL;
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struct nvgpu_channel_job *job = NULL;
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/* we might need two extra gpfifo entries - one for pre fence
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* and one for post fence. */
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@@ -555,6 +555,8 @@ static int nvgpu_submit_channel_gpfifo(struct nvgpu_channel *c,
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}
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if (need_job_tracking) {
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struct nvgpu_fence_type *post_fence = NULL;
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err = nvgpu_channel_alloc_job(c, &job);
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if (err != 0) {
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goto clean_up;
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@@ -568,38 +570,48 @@ static int nvgpu_submit_channel_gpfifo(struct nvgpu_channel *c,
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if (err != 0) {
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goto clean_up_job;
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}
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}
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nvgpu_profile_snapshot(profile, PROFILE_JOB_TRACKING);
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nvgpu_profile_snapshot(profile, PROFILE_JOB_TRACKING);
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if (wait_cmd != NULL) {
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nvgpu_submit_append_priv_cmdbuf(c, wait_cmd);
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}
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/*
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* wait_cmd can be unset even if flag_fence_wait exists. See
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* the expiration check in channel_sync_syncpt_gen_wait_cmd.
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*/
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if (wait_cmd != NULL) {
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nvgpu_submit_append_priv_cmdbuf(c, wait_cmd);
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}
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err = nvgpu_submit_append_gpfifo(c, gpfifo, userdata,
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num_entries);
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if (err != 0) {
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goto clean_up_job;
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}
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/*
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* And here's where we add the incr_cmd we generated earlier. It should
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* always run!
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*/
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if (incr_cmd != NULL) {
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nvgpu_submit_append_priv_cmdbuf(c, incr_cmd);
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}
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if (fence_out != NULL) {
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*fence_out = nvgpu_fence_get(post_fence);
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}
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if (need_job_tracking) {
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err = nvgpu_channel_add_job(c, job, skip_buffer_refcounting);
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err = nvgpu_submit_append_gpfifo(c, gpfifo, userdata,
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num_entries);
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if (err != 0) {
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nvgpu_fence_put(post_fence);
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goto clean_up_job;
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}
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nvgpu_submit_append_priv_cmdbuf(c, incr_cmd);
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err = nvgpu_channel_add_job(c, job, skip_buffer_refcounting);
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if (err != 0) {
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nvgpu_fence_put(post_fence);
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goto clean_up_job;
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}
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if (fence_out != NULL) {
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*fence_out = nvgpu_fence_get(post_fence);
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}
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} else {
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nvgpu_profile_snapshot(profile, PROFILE_JOB_TRACKING);
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err = nvgpu_submit_append_gpfifo(c, gpfifo, userdata,
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num_entries);
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if (err != 0) {
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goto clean_up;
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}
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if (fence_out != NULL) {
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*fence_out = NULL;
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}
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}
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nvgpu_profile_snapshot(profile, PROFILE_APPEND);
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g->ops.userd.gp_put(g, c);
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@@ -612,12 +624,16 @@ static int nvgpu_submit_channel_gpfifo(struct nvgpu_channel *c,
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#endif
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#ifdef CONFIG_NVGPU_TRACE
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trace_gk20a_channel_submitted_gpfifo(g->name,
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c->chid,
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num_entries,
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flags,
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post_fence ? post_fence->syncpt_id : 0,
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post_fence ? post_fence->syncpt_value : 0);
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if (fence_out != NULL && *fence_out != NULL) {
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trace_gk20a_channel_submitted_gpfifo(g->name,
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c->chid, num_entries, flags,
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(*fence_out)->syncpt_id,
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(*fence_out)->syncpt_value);
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} else {
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trace_gk20a_channel_submitted_gpfifo(g->name,
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c->chid, num_entries, flags,
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0, 0);
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}
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#endif
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nvgpu_log_info(g, "post-submit put %d, get %d, size %d",
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@@ -632,7 +648,6 @@ clean_up_job:
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nvgpu_channel_free_job(c, job);
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clean_up:
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nvgpu_log_fn(g, "fail");
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nvgpu_fence_put(post_fence);
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#ifdef CONFIG_NVGPU_DETERMINISTIC_CHANNELS
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if (c->deterministic) {
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nvgpu_rwsem_up_read(&g->deterministic_busy);
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