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gpu: nvgpu: add support for nvs control_fifo
Add a device node for management of nvs control fifo buffers for scheduling domains. The current design consists of a master structure struct nvgpu_nvs_domain_sched_ctrl for management of users as well as control queues. Initially all users are added as non-exclusive users. Subsequent changes will add support for IOCTLS to manage opening of Send/Receive and Event buffers, querying characteristics etc. In subsequent changes, a user that tries to open a Send/Receive queue will first try to reserve itself as an exclusive user and only if that succeeds can proceed with creation of both Send/Receive queues. Exclusive users will be reset to non-exclusive users just before they close their device node handle. Jira NVGPU-8128 Change-Id: I15a83f70cd49c685510a9fd5ea4476ebb3544378 Signed-off-by: Debarshi Dutta <ddutta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2691404 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> GVS: Gerrit_Virtual_Submit
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@@ -307,6 +307,8 @@ static struct nvgpu_flags_mapping flags_mapping[] = {
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NVGPU_SUPPORT_BUFFER_METADATA},
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{NVGPU_GPU_FLAGS_SUPPORT_NVS,
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NVGPU_SUPPORT_NVS},
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{NVGPU_GPU_FLAGS_SUPPORT_NVS_SCHED_CTRL_FIFO,
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NVGPU_SUPPORT_NVS_CTRL_FIFO},
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};
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static u64 nvgpu_ctrl_ioctl_gpu_characteristics_flags(struct gk20a *g)
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