gpu: nvgpu: sim: defer sim buffers allocation

Allocate sim buffers only after chip specific
memory properties are enabled.

JIRA NVGPU-5281

Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Change-Id: I7b64b3a51b8cd66dbefd22a09216b2caaeccacbf
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2324083
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Seshendra Gadagottu
2020-04-05 08:32:37 -07:00
committed by Alex Waterman
parent c37c1b5474
commit 62c06723dd
4 changed files with 51 additions and 50 deletions

View File

@@ -213,15 +213,26 @@ static void nvgpu_sim_esc_readl(struct gk20a *g,
} }
} }
static void nvgpu_sim_init_late(struct gk20a *g) static int nvgpu_sim_init_late(struct gk20a *g)
{ {
u64 phys; u64 phys;
int err = -ENOMEM;
if (!g->sim) { if (!g->sim) {
return; return 0;
} }
nvgpu_info(g, "sim init late"); nvgpu_info(g, "sim init late");
/* allocate sim event/msg buffers */
err = nvgpu_alloc_sim_buffer(g, &g->sim->send_bfr);
err = err || nvgpu_alloc_sim_buffer(g, &g->sim->recv_bfr);
err = err || nvgpu_alloc_sim_buffer(g, &g->sim->msg_bfr);
if (err != 0) {
goto fail;
}
/*mark send ring invalid*/ /*mark send ring invalid*/
sim_writel(g->sim, sim_send_ring_r(), sim_send_ring_status_invalid_f()); sim_writel(g->sim, sim_send_ring_r(), sim_send_ring_status_invalid_f());
@@ -256,37 +267,21 @@ static void nvgpu_sim_init_late(struct gk20a *g)
sim_recv_ring_size_4kb_f() | sim_recv_ring_size_4kb_f() |
sim_recv_ring_addr_lo_f(phys >> sim_recv_ring_addr_lo_b())); sim_recv_ring_addr_lo_f(phys >> sim_recv_ring_addr_lo_b()));
return;
}
int nvgpu_init_sim_support(struct gk20a *g)
{
int err = -ENOMEM;
if (!g->sim) {
return 0;
}
/* allocate sim event/msg buffers */
err = nvgpu_alloc_sim_buffer(g, &g->sim->send_bfr);
err = err || nvgpu_alloc_sim_buffer(g, &g->sim->recv_bfr);
err = err || nvgpu_alloc_sim_buffer(g, &g->sim->msg_bfr);
if (err != 0) {
goto fail;
}
g->sim->sim_init_late = nvgpu_sim_init_late;
/*
* Found issues with removing sim support for igpu.
* Remove sim->remove_support until JIRA NVGPU-5281 is fixed.
* g->sim->remove_support = nvgpu_remove_sim_support;
*/
g->sim->remove_support = NULL;
g->sim->esc_readl = nvgpu_sim_esc_readl;
return 0; return 0;
fail: fail:
nvgpu_free_sim_support(g); nvgpu_free_sim_support(g);
return err; return err;
} }
int nvgpu_init_sim_support(struct gk20a *g)
{
if (!g->sim) {
return 0;
}
g->sim->sim_init_late = nvgpu_sim_init_late;
g->sim->remove_support = nvgpu_remove_sim_support;
g->sim->esc_readl = nvgpu_sim_esc_readl;
return 0;
}

View File

@@ -194,15 +194,26 @@ static void nvgpu_sim_esc_readl(struct gk20a *g,
} }
} }
static void nvgpu_sim_init_late(struct gk20a *g) static int nvgpu_sim_init_late(struct gk20a *g)
{ {
u64 phys; u64 phys;
int err = -ENOMEM;
if (!g->sim) {
return;
}
nvgpu_info(g, "sim init late pci"); nvgpu_info(g, "sim init late pci");
if (!g->sim) {
return 0;
}
/* allocate sim event/msg buffers */
err = nvgpu_alloc_sim_buffer(g, &g->sim->send_bfr);
err = err || nvgpu_alloc_sim_buffer(g, &g->sim->recv_bfr);
err = err || nvgpu_alloc_sim_buffer(g, &g->sim->msg_bfr);
if (err != 0) {
goto fail;
}
/* mark send ring invalid */ /* mark send ring invalid */
sim_writel(g->sim, sim_send_ring_r(), sim_send_ring_status_invalid_f()); sim_writel(g->sim, sim_send_ring_r(), sim_send_ring_status_invalid_f());
@@ -236,31 +247,23 @@ static void nvgpu_sim_init_late(struct gk20a *g)
sim_recv_ring_target_phys_pci_coherent_f() | sim_recv_ring_target_phys_pci_coherent_f() |
sim_recv_ring_size_4kb_f() | sim_recv_ring_size_4kb_f() |
sim_recv_ring_addr_lo_f(phys >> sim_recv_ring_addr_lo_b())); sim_recv_ring_addr_lo_f(phys >> sim_recv_ring_addr_lo_b()));
return 0;
fail:
nvgpu_free_sim_support(g);
return err;
} }
int nvgpu_init_sim_support_pci(struct gk20a *g) int nvgpu_init_sim_support_pci(struct gk20a *g)
{ {
int err = -ENOMEM;
if(!g->sim) { if(!g->sim) {
return 0; return 0;
} }
/* allocate sim event/msg buffers */
err = nvgpu_alloc_sim_buffer(g, &g->sim->send_bfr);
err = err || nvgpu_alloc_sim_buffer(g, &g->sim->recv_bfr);
err = err || nvgpu_alloc_sim_buffer(g, &g->sim->msg_bfr);
if (err != 0) {
goto fail;
}
g->sim->sim_init_late = nvgpu_sim_init_late; g->sim->sim_init_late = nvgpu_sim_init_late;
g->sim->remove_support = nvgpu_remove_sim_support; g->sim->remove_support = nvgpu_remove_sim_support;
g->sim->esc_readl = nvgpu_sim_esc_readl; g->sim->esc_readl = nvgpu_sim_esc_readl;
return 0; return 0;
fail:
nvgpu_free_sim_support(g);
return err;
} }

View File

@@ -36,7 +36,7 @@ struct sim_nvgpu {
struct nvgpu_mem send_bfr; struct nvgpu_mem send_bfr;
struct nvgpu_mem recv_bfr; struct nvgpu_mem recv_bfr;
struct nvgpu_mem msg_bfr; struct nvgpu_mem msg_bfr;
void (*sim_init_late)(struct gk20a *g); int (*sim_init_late)(struct gk20a *g);
void (*remove_support)(struct gk20a *g); void (*remove_support)(struct gk20a *g);
void (*esc_readl)( void (*esc_readl)(
struct gk20a *g, const char *path, u32 index, u32 *data); struct gk20a *g, const char *path, u32 index, u32 *data);

View File

@@ -443,7 +443,9 @@ int gk20a_pm_finalize_poweron(struct device *dev)
if (g->sim) { if (g->sim) {
if (g->sim->sim_init_late) if (g->sim->sim_init_late)
g->sim->sim_init_late(g); err = g->sim->sim_init_late(g);
if (err)
goto done;
} }
#ifdef CONFIG_NVGPU_DGPU #ifdef CONFIG_NVGPU_DGPU
@@ -530,6 +532,7 @@ int gk20a_pm_finalize_poweron(struct device *dev)
done: done:
if (err != 0) { if (err != 0) {
nvgpu_disable_irqs(g); nvgpu_disable_irqs(g);
nvgpu_remove_sim_support_linux(g);
} }
nvgpu_mutex_release(&g->power_lock); nvgpu_mutex_release(&g->power_lock);