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gpu: nvgpu: common: Fix MISRA 15.6 violations
This fixes errors due to single statement loop bodies without braces, which is part of Rule 15.6 of MISRA. This patch covers in gpu/nvgpu/common/ JIRA NVGPU-989 Change-Id: Ic6a98a1cd04e4524dabf650e2f6e73c6b5a1db9d Signed-off-by: Srirangan <smadhavan@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1786207 Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com> Reviewed-by: Adeel Raza <araza@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -77,8 +77,9 @@ static int __nvgpu_semaphore_sea_grow(struct nvgpu_semaphore_sea *sea)
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* integer range. This way any buggy comparisons would start to fail
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* sooner rather than later.
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*/
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for (i = 0; i < PAGE_SIZE * SEMAPHORE_POOL_COUNT; i += 4)
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for (i = 0; i < PAGE_SIZE * SEMAPHORE_POOL_COUNT; i += 4) {
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nvgpu_mem_wr(gk20a, &sea->sea_mem, i, 0xfffffff0);
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}
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out:
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__unlock_sema_sea(sea);
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