gpu: nvgpu: move mapped regs to gk20a

- moved reg fields to gk20a
- added os abstract register accessor in nvgpu/io.h
- defined linux register access abstract implementation
- hook up with posix. posix implementation of the register accessor uses
  the high 4 bit of address to identify register apertures then call the
  according callbacks.

It helps to unify code across OSes.

Bug 2999617

Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Change-Id: Ifcb737e4b4d5b1d8bae310ae50b1ce0aa04f750c
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2497937
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Richard Zhao
2021-03-11 20:54:38 -08:00
committed by mobile promotions
parent 0a25376965
commit 643eb158a3
18 changed files with 302 additions and 244 deletions

View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2017-2021, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -12,125 +12,20 @@
*/
#include <nvgpu/io.h>
#include <nvgpu/types.h>
#include <nvgpu/gk20a.h>
#include <nvgpu/nvgpu_init.h>
#include "os_linux.h"
static void nvgpu_warn_on_no_regs(void)
u32 nvgpu_os_readl(uintptr_t addr)
{
WARN_ONCE(true, "Attempted access to GPU regs after unmapping!");
return readl((void __iomem *)addr);
}
void nvgpu_writel(struct gk20a *g, u32 r, u32 v)
void nvgpu_os_writel(u32 v, uintptr_t addr)
{
struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g);
if (unlikely(!l->regs)) {
nvgpu_warn_on_no_regs();
nvgpu_log(g, gpu_dbg_reg, "r=0x%x v=0x%x (failed)", r, v);
} else {
writel_relaxed(v, l->regs + r);
nvgpu_wmb();
nvgpu_log(g, gpu_dbg_reg, "r=0x%x v=0x%x", r, v);
}
writel(v, (void __iomem *)addr);
}
void nvgpu_writel_relaxed(struct gk20a *g, u32 r, u32 v)
void nvgpu_os_writel_relaxed(u32 v, uintptr_t addr)
{
struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g);
if (unlikely(!l->regs)) {
nvgpu_warn_on_no_regs();
nvgpu_log(g, gpu_dbg_reg, "r=0x%x v=0x%x (failed)", r, v);
} else {
writel_relaxed(v, l->regs + r);
}
}
u32 nvgpu_readl(struct gk20a *g, u32 r)
{
u32 v = nvgpu_readl_impl(g, r);
if (v == 0xffffffff)
nvgpu_check_gpu_state(g);
return v;
}
u32 nvgpu_readl_impl(struct gk20a *g, u32 r)
{
struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g);
u32 v = 0xffffffff;
if (unlikely(!l->regs)) {
nvgpu_warn_on_no_regs();
nvgpu_log(g, gpu_dbg_reg, "r=0x%x v=0x%x (failed)", r, v);
} else {
v = readl(l->regs + r);
nvgpu_log(g, gpu_dbg_reg, "r=0x%x v=0x%x", r, v);
}
return v;
}
void nvgpu_writel_loop(struct gk20a *g, u32 r, u32 v)
{
struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g);
if (unlikely(!l->regs)) {
nvgpu_warn_on_no_regs();
nvgpu_log(g, gpu_dbg_reg, "r=0x%x v=0x%x (failed)", r, v);
} else {
nvgpu_wmb();
do {
writel_relaxed(v, l->regs + r);
} while (readl(l->regs + r) != v);
nvgpu_log(g, gpu_dbg_reg, "r=0x%x v=0x%x", r, v);
}
}
void nvgpu_bar1_writel(struct gk20a *g, u32 b, u32 v)
{
struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g);
if (unlikely(!l->bar1)) {
nvgpu_warn_on_no_regs();
nvgpu_log(g, gpu_dbg_reg, "b=0x%x v=0x%x (failed)", b, v);
} else {
nvgpu_wmb();
writel_relaxed(v, l->bar1 + b);
nvgpu_log(g, gpu_dbg_reg, "b=0x%x v=0x%x", b, v);
}
}
u32 nvgpu_bar1_readl(struct gk20a *g, u32 b)
{
struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g);
u32 v = 0xffffffff;
if (unlikely(!l->bar1)) {
nvgpu_warn_on_no_regs();
nvgpu_log(g, gpu_dbg_reg, "b=0x%x v=0x%x (failed)", b, v);
} else {
v = readl(l->bar1 + b);
nvgpu_log(g, gpu_dbg_reg, "b=0x%x v=0x%x", b, v);
}
return v;
}
bool nvgpu_io_exists(struct gk20a *g)
{
struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g);
return l->regs != NULL;
}
bool nvgpu_io_valid_reg(struct gk20a *g, u32 r)
{
struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g);
return r < resource_size(l->regs);
writel_relaxed(v, (void __iomem *)addr);
}