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gpu: nvgpu: move mapped regs to gk20a
- moved reg fields to gk20a - added os abstract register accessor in nvgpu/io.h - defined linux register access abstract implementation - hook up with posix. posix implementation of the register accessor uses the high 4 bit of address to identify register apertures then call the according callbacks. It helps to unify code across OSes. Bug 2999617 Signed-off-by: Richard Zhao <rizhao@nvidia.com> Change-Id: Ifcb737e4b4d5b1d8bae310ae50b1ce0aa04f750c Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2497937 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -229,10 +229,8 @@ void gk20a_idle(struct gk20a *g)
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*/
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static int gk20a_restore_registers(struct gk20a *g)
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{
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struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g);
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l->regs = l->regs_saved;
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l->bar1 = l->bar1_saved;
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g->regs = g->regs_saved;
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g->bar1 = g->bar1_saved;
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nvgpu_restore_usermode_registers(g);
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@@ -547,10 +545,8 @@ done:
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*/
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static int gk20a_lockout_registers(struct gk20a *g)
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{
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struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g);
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l->regs = NULL;
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l->bar1 = NULL;
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g->regs = 0U;
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g->bar1 = 0U;
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nvgpu_lockout_usermode_registers(g);
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@@ -1014,37 +1010,41 @@ static int gk20a_init_support(struct platform_device *pdev)
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struct device *dev = &pdev->dev;
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struct gk20a *g = get_gk20a(dev);
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struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g);
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void __iomem *addr;
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int err = -ENOMEM;
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#ifdef CONFIG_NVGPU_VPR
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tegra_register_idle_unidle(gk20a_do_idle, gk20a_do_unidle, g);
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#endif
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l->regs = nvgpu_devm_ioremap_resource(pdev,
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addr = nvgpu_devm_ioremap_resource(pdev,
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GK20A_BAR0_IORESOURCE_MEM,
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&l->reg_mem);
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if (IS_ERR(l->regs)) {
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if (IS_ERR(addr)) {
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nvgpu_err(g, "failed to remap gk20a registers");
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err = PTR_ERR(l->regs);
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err = PTR_ERR(addr);
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goto fail;
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}
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g->regs = (uintptr_t)addr;
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g->regs_size = resource_size(l->reg_mem);
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l->regs_bus_addr = nvgpu_resource_addr(pdev,
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g->regs_bus_addr = nvgpu_resource_addr(pdev,
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GK20A_BAR0_IORESOURCE_MEM);
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if (!l->regs_bus_addr) {
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if (!g->regs_bus_addr) {
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nvgpu_err(g, "failed to read register bus offset");
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err = -ENODEV;
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goto fail;
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}
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l->bar1 = nvgpu_devm_ioremap_resource(pdev,
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addr = nvgpu_devm_ioremap_resource(pdev,
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GK20A_BAR1_IORESOURCE_MEM,
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&l->bar1_mem);
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if (IS_ERR(l->bar1)) {
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if (IS_ERR(addr)) {
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nvgpu_err(g, "failed to remap gk20a bar1");
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err = PTR_ERR(l->bar1);
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err = PTR_ERR(addr);
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goto fail;
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}
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g->bar1 = (uintptr_t)addr;
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err = nvgpu_init_sim_support_linux(g, pdev);
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if (err)
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@@ -1059,11 +1059,11 @@ static int gk20a_init_support(struct platform_device *pdev)
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fail_sim:
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nvgpu_remove_sim_support_linux(g);
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fail:
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if (l->regs)
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l->regs = NULL;
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if (g->regs)
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g->regs = 0U;
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if (l->bar1)
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l->bar1 = NULL;
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if (g->bar1)
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g->bar1 = 0U;
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return err;
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}
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