diff --git a/drivers/gpu/nvgpu/hal/init/hal_tu104.c b/drivers/gpu/nvgpu/hal/init/hal_tu104.c
index e5b0b1143..52401796d 100644
--- a/drivers/gpu/nvgpu/hal/init/hal_tu104.c
+++ b/drivers/gpu/nvgpu/hal/init/hal_tu104.c
@@ -1232,7 +1232,8 @@ static const struct gpu_ops tu104_ops = {
 			.get_big_page_sizes = gm20b_mm_get_big_page_sizes,
 			.get_default_big_page_size =
 				nvgpu_gmmu_default_big_page_size,
-			.get_iommu_bit = gp10b_mm_get_iommu_bit,
+			/* iommu bit is not applicable for dgpu */
+			.get_iommu_bit = NULL,
 			.gpu_phys_addr = gv11b_gpu_phys_addr,
 		}
 	},
diff --git a/drivers/gpu/nvgpu/hal/mm/gmmu/gmmu_gv11b_fusa.c b/drivers/gpu/nvgpu/hal/mm/gmmu/gmmu_gv11b_fusa.c
index c5832ad9b..67f523074 100644
--- a/drivers/gpu/nvgpu/hal/mm/gmmu/gmmu_gv11b_fusa.c
+++ b/drivers/gpu/nvgpu/hal/mm/gmmu/gmmu_gv11b_fusa.c
@@ -27,13 +27,14 @@
 
 /*
  * On Volta the GPU determines whether to do L3 allocation for a mapping by
- * checking bit 36 of the phsyical address. So if a mapping should allocte lines
- * in the L3 this bit must be set.
+ * checking the l3 alloc bit (bit number depends on soc) of the physical address.
+ * So if a mapping should allocate lines in the L3 this bit must be set.
  */
 u64 gv11b_gpu_phys_addr(struct gk20a *g,
 			struct nvgpu_gmmu_attrs *attrs, u64 phys)
 {
-	if ((attrs != NULL) && attrs->l3_alloc) {
+	if ((attrs != NULL) && attrs->l3_alloc &&
+			(g->ops.mm.gmmu.get_iommu_bit != NULL)) {
 		return phys | BIT64(g->ops.mm.gmmu.get_iommu_bit(g));
 	}