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gpu: nvgpu: MISRA 10.x fix

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-- This will MISRA 10.x violations in semaphore_pool.c,
   nvgpu_mem.h, nvgpu_mem.c and posix-nvgpu_mem.c.

JIRA NVGPU-3177

Change-Id: I1db234a47c7097da28fdfd3236d9b7c5fe385d79
Signed-off-by: Seeta Rama Raju <srajum@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2119524
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Seeta Rama Raju
2019-05-15 12:34:15 +05:30
committed by mobile promotions
parent 1e95144194
commit 671cc9d785
4 changed files with 5 additions and 5 deletions
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4
drivers/gpu/nvgpu/common/semaphore/semaphore_pool.c
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@@ -134,7 +134,7 @@ int nvgpu_semaphore_pool_map(struct nvgpu_semaphore_pool *p,
*/
err = nvgpu_mem_create_from_mem(vm->mm->g,
&p->rw_mem, &p->sema_sea->sea_mem,
p->page_idx, 1);
p->page_idx, 1UL);
if (err != 0) {
goto fail_unmap;
}
@@ -257,4 +257,4 @@ u64 nvgpu_semaphore_pool_gpu_va(struct nvgpu_semaphore_pool *p, bool global)
u64 nvgpu_semaphore_pool_get_page_idx(struct nvgpu_semaphore_pool *p)
{
return p->page_idx;
}
}