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gpu: nvgpu: channel MISRA fix for Rule 21.2

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Rename
_gk20a_channel_get -> nvgpu_channel_get__func
gk20a_channel_get -> nvgpu_channel_get
_gk20a_channel_put -> nvgpu_channel_put__func
gk20a_channel_put -> nvgpu_channel_put
trace_gk20a_channel_get -> trace_nvgpu_channel_get
trace_gk20a_channel_put -> trace_nvgpu_channel_put

JIRA NVGPU-3388

Change-Id: I4e37adddbb5ce14aa18132722719ca2f73f1ba52
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2114118
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Seema Khowala
2019-05-07 15:11:39 -07:00
committed by mobile promotions
parent 26d13b3b6b
commit 671f1c8a36
24 changed files with 103 additions and 105 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
drivers/gpu/nvgpu/os/linux/debug_fifo.c
View File

@@ -86,7 +86,7 @@ static int gk20a_fifo_sched_debugfs_seq_show(
if (!test_bit(ch->chid, runlist->active_channels))
return ret;
if (gk20a_channel_get(ch)) {
if (nvgpu_channel_get(ch)) {
tsg = tsg_gk20a_from_ch(ch);
if (tsg)
@@ -99,7 +99,7 @@ static int gk20a_fifo_sched_debugfs_seq_show(
tsg->interleave_level,
nvgpu_gr_ctx_get_graphics_preemption_mode(tsg->gr_ctx),
nvgpu_gr_ctx_get_compute_preemption_mode(tsg->gr_ctx));
gk20a_channel_put(ch);
nvgpu_channel_put(ch);
}
return 0;
}

2
drivers/gpu/nvgpu/os/linux/ioctl_as.c
View File

@@ -68,7 +68,7 @@ static int gk20a_as_ioctl_bind_channel(
err = ch->g->ops.mm.vm_bind_channel(as_share->vm, ch);
out:
gk20a_channel_put(ch);
nvgpu_channel_put(ch);
return err;
}

8
drivers/gpu/nvgpu/os/linux/ioctl_channel.c
View File

@@ -372,7 +372,7 @@ static int gk20a_init_error_notifier(struct nvgpu_channel *ch,
/*
* This returns the channel with a reference. The caller must
* gk20a_channel_put() the ref back after use.
* nvgpu_channel_put() the ref back after use.
*
* NULL is returned if the channel was not found.
*/
@@ -391,7 +391,7 @@ struct nvgpu_channel *gk20a_get_channel_from_file(int fd)
}
priv = (struct channel_priv *)f->private_data;
ch = gk20a_channel_get(priv->c);
ch = nvgpu_channel_get(priv->c);
fput(f);
return ch;
}
@@ -1090,7 +1090,7 @@ long gk20a_channel_ioctl(struct file *filp,
}
/* take a ref or return timeout if channel refs can't be taken */
ch = gk20a_channel_get(ch);
ch = nvgpu_channel_get(ch);
if (!ch)
return -ETIMEDOUT;
@@ -1398,7 +1398,7 @@ long gk20a_channel_ioctl(struct file *filp,
nvgpu_mutex_release(&ch->ioctl_lock);
gk20a_channel_put(ch);
nvgpu_channel_put(ch);
nvgpu_log_fn(g, "end");

4
drivers/gpu/nvgpu/os/linux/ioctl_ctrl.c
View File

@@ -681,7 +681,7 @@ static int nvgpu_gpu_ioctl_set_debug_mode(
err = -ENOSYS;
nvgpu_mutex_release(&g->dbg_sessions_lock);
gk20a_channel_put(ch);
nvgpu_channel_put(ch);
return err;
}
@@ -1640,7 +1640,7 @@ static int nvgpu_gpu_set_deterministic_opts(struct gk20a *g,
err = nvgpu_gpu_set_deterministic_ch(ch, args->flags);
gk20a_channel_put(ch);
nvgpu_channel_put(ch);
if (err)
break;

6
drivers/gpu/nvgpu/os/linux/ioctl_dbg.c
View File

@@ -563,14 +563,14 @@ static int dbg_bind_channel_gk20a(struct dbg_session_gk20a *dbg_s,
nvgpu_mutex_release(&ch->dbg_s_lock);
nvgpu_mutex_release(&g->dbg_sessions_lock);
gk20a_channel_put(ch);
nvgpu_channel_put(ch);
return 0;
out_kfree:
nvgpu_kfree(g, ch_data_linux);
out_chput:
gk20a_channel_put(ch);
nvgpu_channel_put(ch);
nvgpu_mutex_release(&ch->dbg_s_lock);
nvgpu_mutex_release(&g->dbg_sessions_lock);
out_fput:
@@ -1815,7 +1815,7 @@ static int dbg_unbind_channel_gk20a(struct dbg_session_gk20a *dbg_s,
nvgpu_mutex_release(&g->dbg_sessions_lock);
out:
gk20a_channel_put(ch);
nvgpu_channel_put(ch);
return err;
}

6
drivers/gpu/nvgpu/os/linux/ioctl_tsg.c
View File

@@ -53,7 +53,7 @@ static int nvgpu_tsg_bind_channel_fd(struct nvgpu_tsg *tsg, int ch_fd)
err = nvgpu_tsg_bind_channel(tsg, ch);
gk20a_channel_put(ch);
nvgpu_channel_put(ch);
return err;
}
@@ -116,7 +116,7 @@ static int gk20a_tsg_ioctl_bind_channel_ex(struct gk20a *g,
err = nvgpu_tsg_bind_channel(tsg, ch);
ch_put:
gk20a_channel_put(ch);
nvgpu_channel_put(ch);
idle:
gk20a_idle(g);
mutex_release:
@@ -148,7 +148,7 @@ static int nvgpu_tsg_unbind_channel_fd(struct nvgpu_tsg *tsg, int ch_fd)
gk20a_channel_set_unserviceable(ch);
out:
gk20a_channel_put(ch);
nvgpu_channel_put(ch);
return err;
}