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gpu: nvgpu: unit: BVEC test for common.class unit

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class_validate_setup is already testing for valid/invalid boundary
values for common.class APIs. Append the valid/invalid list with BVEC
test values.

Fix obsolete gops_class doxygen documentation.

Jira NVGPU-6403

Change-Id: Id713db614919842324f6d655b36dd57043958919
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2539797
(cherry picked from commit 6aed159f9f3eeea553a442af37e3bcc840152154)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2539795
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Shashank Singh <shashsingh@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Deepak Nibade
2021-06-04 16:10:12 +05:30
committed by mobile promotions
parent 9ac7550f35
commit 67399a1892
3 changed files with 30 additions and 22 deletions
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20
drivers/gpu/nvgpu/include/nvgpu/gops/class.h
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@@ -44,20 +44,14 @@ struct gops_class {
* *
* List of valid class numbers: * List of valid class numbers:
*~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ *~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
* 1. Graphics classes: (Fix: Lot of qnx safety tests are still using * 1. Compute class:
* graphics 3d class. Until these tests get fixed,
* allowing 3d graphics class as valid class for
* safety build.)
* a. VOLTA_A --> 0xC397U
* 2. Compute classes:
* a. VOLTA_COMPUTE_A --> 0xC3C0U * a. VOLTA_COMPUTE_A --> 0xC3C0U
* 3. DMA copy * 2. DMA copy class:
* a. KEPLER_DMA_COPY_A --> 0xA0B5U * a. VOLTA_DMA_COPY_A --> 0xC3B5U
* b. MAXWELL_DMA_COPY_A --> 0xB0B5U * 3. Channel Gpfifo class:
* c. PASCAL_DMA_COPY_A --> 0xC0B5U * a. VOLTA_CHANNEL_GPFIFO_A --> 0xC36FU
* d. VOLTA_DMA_COPY_A --> 0xC3B5U * 4. Graphics class:
* 4. Inline to memory * a. VOLTA_A --> 0xC397U
* a. KEPLER_INLINE_TO_MEMORY_B --> 0xA140U
*~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ *~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
* *
* @param class_num [in] Class number to be checked. * @param class_num [in] Class number to be checked.

28
userspace/units/class/nvgpu-class.c
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@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a * Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"), * copy of this software and associated documentation files (the "Software"),
@@ -51,15 +51,19 @@ u32 invalid_compute_classes[] = {
0x902DU, /* FERMI_TWOD_A */ 0x902DU, /* FERMI_TWOD_A */
0x1234U, /* random value */ 0x1234U, /* random value */
0x76543210U, /* random value */ 0x76543210U, /* random value */
0x0000U, /* random value */ 0x0000U, /* BVEC test value */
0xC000U, /* random value */ 0xB000U, /* BVEC test value */
0xC3BFU, /* BVEC test value */
0xC3C1U, /* BVEC test value */
0xD000U, /* BVEC test value */
0xFFFFFFFFU, /* BVEC test value */
}; };
u32 valid_classes[] = { u32 valid_classes[] = {
0xC3C0U, /* VOLTA_COMPUTE_A */
0xC3B5U, /* VOLTA_DMA_COPY_A */
0xC36FU, /* VOLTA_CHANNEL_GPFIFO_A */ 0xC36FU, /* VOLTA_CHANNEL_GPFIFO_A */
0xC397U, /* VOLTA_A */ 0xC397U, /* VOLTA_A */
0xC3B5U, /* VOLTA_DMA_COPY_A */
0xC3C0U, /* VOLTA_COMPUTE_A */
}; };
u32 invalid_classes[] = { u32 invalid_classes[] = {
@@ -76,8 +80,18 @@ u32 invalid_classes[] = {
0xA140U, /* KEPLER_INLINE_TO_MEMORY_B */ 0xA140U, /* KEPLER_INLINE_TO_MEMORY_B */
0xA0B5U, /* KEPLER_DMA_COPY_A */ 0xA0B5U, /* KEPLER_DMA_COPY_A */
0x76543210U, /* random value */ 0x76543210U, /* random value */
0x0000U, /* random value */ 0x0000U, /* BVEC test value */
0xC000U, /* random value */ 0xB000U, /* BVEC test value */
0xC36EU, /* BVEC test value */
0xC370U, /* BVEC test value */
0xC396U, /* BVEC test value */
0xC398U, /* BVEC test value */
0xC3B4U, /* BVEC test value */
0xC3B6U, /* BVEC test value */
0xC3BFU, /* BVEC test value */
0xC3C1U, /* BVEC test value */
0xD000U, /* BVEC test value */
0xFFFFFFFFU, /* BVEC test value */
}; };
int class_validate_setup(struct unit_module *m, struct gk20a *g, void *args) int class_validate_setup(struct unit_module *m, struct gk20a *g, void *args)

4
userspace/units/class/nvgpu-class.h
View File

@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a * Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"), * copy of this software and associated documentation files (the "Software"),
@@ -37,7 +37,7 @@ struct unit_module;
* *
* Description: Validate common.class unit API. * Description: Validate common.class unit API.
* *
* Test Type: Feature * Test Type: Feature, Boundary Values
* *
* Targets: gops_class.is_valid_compute, gv11b_class_is_valid_compute, * Targets: gops_class.is_valid_compute, gv11b_class_is_valid_compute,
* gops_class.is_valid, gv11b_class_is_valid * gops_class.is_valid, gv11b_class_is_valid