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gpu: nvgpu: add mm gops to get default va size

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Currently, default va aperture size, user size and kernel size are
defined as fixed macros. However, max va bits can be chip specific.
Add below mm gops API to obtain default aperture, user and/or kernel
virtual memory size.
void (*get_default_va_sizes)(u64 *aperture_size,
		u64 *user_size, u64 *kernel_size);

JIRA NVGPU-5302

Change-Id: Ie0c60ca08ecff6613ce44184153bda066803d7d9
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2414840
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Vedashree Vidwans
2020-09-16 14:02:02 -07:00
committed by Alex Waterman
parent 6be1d64a59
commit 673cd507a8
24 changed files with 124 additions and 53 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
userspace/units/mm/dma/dma.c
View File

@@ -188,9 +188,8 @@ static int init_mm(struct unit_module *m, struct gk20a *g)
low_hole = SZ_4K * 16UL;
aperture_size = GK20A_PMU_VA_SIZE;
mm->pmu.aperture_size = GK20A_PMU_VA_SIZE;
mm->channel.user_size = NV_MM_DEFAULT_USER_SIZE;
mm->channel.kernel_size = NV_MM_DEFAULT_KERNEL_SIZE;
g->ops.mm.get_default_va_sizes(NULL, &mm->channel.user_size,
&mm->channel.kernel_size);
mm->pmu.vm = nvgpu_vm_init(g,
g->ops.mm.gmmu.get_default_big_page_size(),

5
userspace/units/mm/gmmu/page_table/page_table.c
View File

@@ -347,9 +347,8 @@ static int init_mm(struct unit_module *m, struct gk20a *g)
low_hole = SZ_4K * 16UL;
aperture_size = GK20A_PMU_VA_SIZE;
mm->pmu.aperture_size = GK20A_PMU_VA_SIZE;
mm->channel.user_size = NV_MM_DEFAULT_USER_SIZE;
mm->channel.kernel_size = NV_MM_DEFAULT_KERNEL_SIZE;
g->ops.mm.get_default_va_sizes(NULL, &mm->channel.user_size,
&mm->channel.kernel_size);
mm->pmu.vm = nvgpu_vm_init(g,
g->ops.mm.gmmu.get_default_big_page_size(),

6
userspace/units/mm/vm/vm.c
View File

@@ -39,6 +39,7 @@
#include <hal/mm/cache/flush_gv11b.h>
#include <hal/mm/gmmu/gmmu_gp10b.h>
#include <hal/mm/gmmu/gmmu_gv11b.h>
#include <hal/mm/mm_gp10b.h>
#include <hal/fb/fb_gp10b.h>
#include <hal/fb/fb_gm20b.h>
@@ -192,6 +193,7 @@ static int init_test_env(struct unit_module *m, struct gk20a *g)
g->ops.mm.gmmu.gpu_phys_addr = gv11b_gpu_phys_addr;
g->ops.mm.cache.l2_flush = gv11b_mm_l2_flush;
g->ops.mm.cache.fb_flush = gk20a_mm_fb_flush;
g->ops.mm.get_default_va_sizes = gp10b_mm_get_default_va_sizes,
g->ops.mm.init_inst_block = hal_mm_init_inst_block;
g->ops.mm.vm_as_free_share = hal_vm_as_free_share;
g->ops.mm.vm_bind_channel = nvgpu_vm_bind_channel;
@@ -899,6 +901,7 @@ int test_init_error_paths(struct unit_module *m, struct gk20a *g, void *__args)
bool big_pages = true;
struct nvgpu_posix_fault_inj *kmem_fi =
nvgpu_kmem_get_fault_injection();
u64 default_aperture_size;
/* Initialize test environment */
ret = init_test_env(m, g);
@@ -907,6 +910,7 @@ int test_init_error_paths(struct unit_module *m, struct gk20a *g, void *__args)
}
/* Set VM parameters */
g->ops.mm.get_default_va_sizes(&default_aperture_size, NULL, NULL);
big_pages = true;
low_hole = SZ_1M * 64;
aperture_size = 128 * SZ_1G;
@@ -940,7 +944,7 @@ int test_init_error_paths(struct unit_module *m, struct gk20a *g, void *__args)
g->ops.mm.gmmu.get_default_big_page_size(),
low_hole,
user_vma,
NV_MM_DEFAULT_APERTURE_SIZE, /* invalid aperture size */
default_aperture_size, /* invalid aperture size */
big_pages,
false,
true,