diff --git a/drivers/gpu/nvgpu/libnvgpu-drv_safe.export b/drivers/gpu/nvgpu/libnvgpu-drv_safe.export index dd6525e63..7429041ff 100644 --- a/drivers/gpu/nvgpu/libnvgpu-drv_safe.export +++ b/drivers/gpu/nvgpu/libnvgpu-drv_safe.export @@ -68,6 +68,7 @@ gm20b_pbdma_read_data gm20b_pbdma_restartable_0_intr_descs gm20b_ramin_set_big_page_size gm20b_read_engine_status_info +gm20b_read_pbdma_status_info gm20b_top_get_max_gpc_count gm20b_top_get_max_tpc_per_gpc_count gm20b_top_get_max_fbps_count diff --git a/userspace/SWUTS.sources b/userspace/SWUTS.sources index df42368c4..3834d7516 100644 --- a/userspace/SWUTS.sources +++ b/userspace/SWUTS.sources @@ -27,6 +27,7 @@ INPUT += ../../../userspace/units/fifo/fifo/gv11b/nvgpu-fifo-gv11b.h INPUT += ../../../userspace/units/fifo/fifo/gv11b/nvgpu-fifo-intr-gv11b.h INPUT += ../../../userspace/units/fifo/pbdma/nvgpu-pbdma.h INPUT += ../../../userspace/units/fifo/pbdma/gm20b/nvgpu-pbdma-gm20b.h +INPUT += ../../../userspace/units/fifo/pbdma/gm20b/nvgpu-pbdma-status-gm20b.h INPUT += ../../../userspace/units/fifo/pbdma/gp10b/nvgpu-pbdma-gp10b.h INPUT += ../../../userspace/units/fifo/pbdma/gv11b/nvgpu-pbdma-gv11b.h INPUT += ../../../userspace/units/fifo/preempt/nvgpu-preempt.h diff --git a/userspace/required_tests.json b/userspace/required_tests.json index b5c2fa4b1..0cebaff36 100644 --- a/userspace/required_tests.json +++ b/userspace/required_tests.json @@ -2969,6 +2969,12 @@ "unit": "nvgpu_pbdma_gm20b", "test_level": 0 }, + { + "test": "test_gm20b_read_pbdma_status_info", + "case": "read_pbdma_status_info", + "unit": "nvgpu_pbdma_gm20b", + "test_level": 0 + }, { "test": "test_fifo_remove_support", "case": "remove_support", diff --git a/userspace/units/fifo/pbdma/gm20b/Makefile b/userspace/units/fifo/pbdma/gm20b/Makefile index 525ac186b..677723bbc 100644 --- a/userspace/units/fifo/pbdma/gm20b/Makefile +++ b/userspace/units/fifo/pbdma/gm20b/Makefile @@ -1,4 +1,4 @@ -# Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved. # # Permission is hereby granted, free of charge, to any person obtaining a # copy of this software and associated documentation files (the "Software"), @@ -20,7 +20,7 @@ .SUFFIXES: -OBJS = nvgpu-pbdma-gm20b.o +OBJS = nvgpu-pbdma-gm20b.o nvgpu-pbdma-status-gm20b.o MODULE = nvgpu-pbdma-gm20b LIB_PATHS += -lnvgpu-fifo-common diff --git a/userspace/units/fifo/pbdma/gm20b/Makefile.tmk b/userspace/units/fifo/pbdma/gm20b/Makefile.tmk index a177649f6..e3f31512f 100644 --- a/userspace/units/fifo/pbdma/gm20b/Makefile.tmk +++ b/userspace/units/fifo/pbdma/gm20b/Makefile.tmk @@ -1,6 +1,6 @@ ################################### tell Emacs this is a -*- makefile-gmake -*- # -# Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved. # # Permission is hereby granted, free of charge, to any person obtaining a # copy of this software and associated documentation files (the "Software"), @@ -25,7 +25,7 @@ ############################################################################### NVGPU_UNIT_NAME = nvgpu-pbdma-gm20b -NVGPU_UNIT_SRCS = nvgpu-pbdma-gm20b.c +NVGPU_UNIT_SRCS = nvgpu-pbdma-gm20b.c nvgpu-pbdma-status-gm20b.c NVGPU_UNIT_INTERFACE_DIRS := \ $(NV_SOURCE)/kernel/nvgpu/userspace/units/fifo \ diff --git a/userspace/units/fifo/pbdma/gm20b/nvgpu-pbdma-gm20b.c b/userspace/units/fifo/pbdma/gm20b/nvgpu-pbdma-gm20b.c index f2ab332f4..81f00c792 100644 --- a/userspace/units/fifo/pbdma/gm20b/nvgpu-pbdma-gm20b.c +++ b/userspace/units/fifo/pbdma/gm20b/nvgpu-pbdma-gm20b.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -43,6 +43,7 @@ #include "../../nvgpu-fifo-common.h" #include "../../nvgpu-fifo-gv11b.h" #include "nvgpu-pbdma-gm20b.h" +#include "nvgpu-pbdma-status-gm20b.h" #ifdef PBDMA_GM20B_UNIT_DEBUG #undef unit_verbose @@ -547,6 +548,9 @@ struct unit_module_test nvgpu_pbdma_gm20b_tests[] = { UNIT_TEST(pbdma_get_fc_subdevice, test_gm20b_pbdma_get_fc_subdevice, NULL, 0), UNIT_TEST(pbdma_get_ctrl_hce_priv_mode_yes, test_gm20b_pbdma_get_ctrl_hce_priv_mode_yes, NULL, 0), UNIT_TEST(pbdma_get_userd, test_gm20b_pbdma_get_userd, NULL, 0), + + /* pbdma status */ + UNIT_TEST(read_pbdma_status_info, test_gm20b_read_pbdma_status_info, NULL, 0), UNIT_TEST(remove_support, test_fifo_remove_support, NULL, 0), }; diff --git a/userspace/units/fifo/pbdma/gm20b/nvgpu-pbdma-status-gm20b.c b/userspace/units/fifo/pbdma/gm20b/nvgpu-pbdma-status-gm20b.c new file mode 100644 index 000000000..6cea6ed04 --- /dev/null +++ b/userspace/units/fifo/pbdma/gm20b/nvgpu-pbdma-status-gm20b.c @@ -0,0 +1,169 @@ +/* + * Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#include +#include +#include + +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "hal/fifo/pbdma_status_gm20b.h" + +#include + +#include "../../nvgpu-fifo-common.h" +#include "../../nvgpu-fifo-gv11b.h" +#include "nvgpu-pbdma-status-gm20b.h" + +#ifdef PBDMA_STATUS_GM20B_UNIT_DEBUG +#undef unit_verbose +#define unit_verbose unit_info +#else +#define unit_verbose(unit, msg, ...) \ + do { \ + if (0) { \ + unit_info(unit, msg, ##__VA_ARGS__); \ + } \ + } while (0) +#endif + +#define F_PBDMA_INFO_CTX_IS_TSG BIT(0) +#define F_PBDMA_INFO_NEXT_CTX_IS_TSG BIT(1) +#define F_PBDMA_INFO_LAST BIT(2) + +#define NUM_PBDMA_STATUS_CHAN 5 + +int test_gm20b_read_pbdma_status_info(struct unit_module *m, + struct gk20a *g, void *args) +{ + int ret = UNIT_FAIL; + const int pbdma_id = 0; + u32 pbdma_reg_status = 0; + u32 id = 1; + u32 next_id = 5; + u32 id_type; + u32 next_id_type; + struct nvgpu_pbdma_status_info status; + u32 i; + u32 branches = 0; + + int pbdma_status_chan[NUM_PBDMA_STATUS_CHAN] = { + fifo_pbdma_status_chan_status_valid_v(), + fifo_pbdma_status_chan_status_chsw_load_v(), + fifo_pbdma_status_chan_status_chsw_save_v(), + fifo_pbdma_status_chan_status_chsw_switch_v(), + 2 /* invalid */ + }; + + u32 expected_chsw_status[NUM_PBDMA_STATUS_CHAN] = { + NVGPU_PBDMA_CHSW_STATUS_VALID, + NVGPU_PBDMA_CHSW_STATUS_LOAD, + NVGPU_PBDMA_CHSW_STATUS_SAVE, + NVGPU_PBDMA_CHSW_STATUS_SWITCH, + NVGPU_PBDMA_CHSW_STATUS_INVALID + }; + + bool id_valid; + bool next_id_valid; + + for (i = 0; i < NUM_PBDMA_STATUS_CHAN; i++) { + id = (id + 1) & 0xfff; + next_id = (next_id + 1) & 0xfff; + + id_valid = + ((pbdma_status_chan[i] == fifo_pbdma_status_chan_status_valid_v()) || + (pbdma_status_chan[i] == fifo_pbdma_status_chan_status_chsw_save_v()) || + (pbdma_status_chan[i] == fifo_pbdma_status_chan_status_chsw_switch_v())); + + next_id_valid = + ((pbdma_status_chan[i] == fifo_pbdma_status_chan_status_chsw_load_v()) || + (pbdma_status_chan[i] == fifo_pbdma_status_chan_status_chsw_switch_v())); + + for (branches = 0; branches < F_PBDMA_INFO_LAST; branches++) { + + id_type = branches & F_PBDMA_INFO_CTX_IS_TSG ? + fifo_pbdma_status_id_type_tsgid_v() : + fifo_pbdma_status_id_type_chid_v(); + + next_id_type = branches & F_PBDMA_INFO_NEXT_CTX_IS_TSG ? + fifo_pbdma_status_next_id_type_tsgid_v() : + fifo_pbdma_status_next_id_type_chid_v(); + + pbdma_reg_status = + (pbdma_status_chan[i] << 13) | + (id << 0) | + (id_type << 12) | + (next_id << 16) | + (next_id_type << 28); + + nvgpu_writel(g, fifo_pbdma_status_r(pbdma_id), + pbdma_reg_status); + + gm20b_read_pbdma_status_info(g, pbdma_id, &status); + + unit_assert(status.pbdma_reg_status == pbdma_reg_status, + goto done); + unit_assert(status.chsw_status == expected_chsw_status[i], + goto done); + + if (id_valid) { + unit_assert(status.id == id, goto done); + unit_assert(status.id_type == id_type, goto done); + } else { + unit_assert(status.id == PBDMA_STATUS_ID_INVALID, + goto done); + unit_assert(status.id_type == + PBDMA_STATUS_ID_TYPE_INVALID, goto done); + } + + if (next_id_valid) { + unit_assert(status.next_id == next_id, goto done); + unit_assert(status.next_id_type == next_id_type, + goto done); + } else { + unit_assert(status.next_id == + PBDMA_STATUS_NEXT_ID_INVALID, goto done); + unit_assert(status.next_id_type == + PBDMA_STATUS_NEXT_ID_TYPE_INVALID, goto done); + } + } + } + + ret = UNIT_SUCCESS; + +done: + if (ret != UNIT_SUCCESS) { + unit_err(m, "%s i=%u branches=%08x\n", __func__, i, branches); + } + + return ret; +} diff --git a/userspace/units/fifo/pbdma/gm20b/nvgpu-pbdma-status-gm20b.h b/userspace/units/fifo/pbdma/gm20b/nvgpu-pbdma-status-gm20b.h new file mode 100644 index 000000000..71e6dca30 --- /dev/null +++ b/userspace/units/fifo/pbdma/gm20b/nvgpu-pbdma-status-gm20b.h @@ -0,0 +1,67 @@ +/* + * Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ +#ifndef UNIT_NVGPU_PBDMA_STATUS_GM20B_H +#define UNIT_NVGPU_PBDMA_STATUS_GM20B_H + +#include + +struct unit_module; +struct gk20a; + +/** @addtogroup SWUTS-fifo-pbdma-status-gm20b + * @{ + * + * Software Unit Test Specification for fifo/pbdma/gm20b + */ + +/** + * Test specification for: test_gm20b_read_pbdma_status_info + * + * Description: Branch coverage for read PBDMA status. + * + * Test Type: Feature, Branch coverage. + * + * Targets: gm20b_read_pbdma_status_info + * + * Input: test_fifo_init_support() run for this GPU + * + * Steps: + * - Set fifo_pbdma_status_r with a combination of: + * - chsw status (valid, load, save, switch and invalid). + * - id and id_type (tsg/ch). + * - next_id and next_id_type (tsg/ch). + * - Call gm20b_read_pbdma_status_info. + * - Check that pbdma_reg_status is set value read from fifo_pbdma_status_r. + * - Check that chsw_status is consistent with register value. + * - Check that id/id_type and next_id/next_id_type are consistent + * (depending on chsw_status). + * + * Output: Returns PASS if all branches gave expected results. FAIL otherwise. + */ +int test_gm20b_read_pbdma_status_info(struct unit_module *m, + struct gk20a *g, void *args); + +/** + * @} + */ + +#endif /* UNIT_NVGPU_PBDMA_STATUS_GM20B_H */