From 682abd7b5cd544f83b8905830cd9b738c458be7f Mon Sep 17 00:00:00 2001
From: Shashank Singh <shashsingh@nvidia.com>
Date: Thu, 12 Oct 2017 10:56:55 +0530
Subject: [PATCH] nvgpu: fix multiple build issues for QNX

- timers and bug header files should be
  included directly. Linux maybe getting
  it via indirect includes. Also, QNX
  requires non-static function to be
  declared explicitly.

Change-Id: I2458654f535d8079347e4a0be744530f56388238
Signed-off-by: Shashank Singh <shashsingh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1577527
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sourab Gupta <sourabg@nvidia.com>
Tested-by: Sourab Gupta <sourabg@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
---
 drivers/gpu/nvgpu/common/pmu/pmu.c         | 2 ++
 drivers/gpu/nvgpu/common/pmu/pmu_ipc.c     | 2 ++
 drivers/gpu/nvgpu/common/pmu/pmu_perfmon.c | 1 +
 drivers/gpu/nvgpu/common/pmu/pmu_pg.c      | 1 +
 drivers/gpu/nvgpu/gk20a/flcn_gk20a.c       | 1 +
 drivers/gpu/nvgpu/gk20a/flcn_gk20a.h       | 1 +
 drivers/gpu/nvgpu/include/nvgpu/falcon.h   | 2 ++
 7 files changed, 10 insertions(+)

diff --git a/drivers/gpu/nvgpu/common/pmu/pmu.c b/drivers/gpu/nvgpu/common/pmu/pmu.c
index f0df6e141..95b57e222 100644
--- a/drivers/gpu/nvgpu/common/pmu/pmu.c
+++ b/drivers/gpu/nvgpu/common/pmu/pmu.c
@@ -26,6 +26,8 @@
 #include <nvgpu/pmuif/nvgpu_gpmu_cmdif.h>
 #include <nvgpu/enabled.h>
 #include <nvgpu/barrier.h>
+#include <nvgpu/timers.h>
+#include <nvgpu/bug.h>
 
 #include "gk20a/gk20a.h"
 
diff --git a/drivers/gpu/nvgpu/common/pmu/pmu_ipc.c b/drivers/gpu/nvgpu/common/pmu/pmu_ipc.c
index 80b41990d..e76ed7df3 100644
--- a/drivers/gpu/nvgpu/common/pmu/pmu_ipc.c
+++ b/drivers/gpu/nvgpu/common/pmu/pmu_ipc.c
@@ -23,6 +23,8 @@
 #include <nvgpu/enabled.h>
 #include <nvgpu/pmu.h>
 #include <nvgpu/log.h>
+#include <nvgpu/timers.h>
+#include <nvgpu/bug.h>
 #include <nvgpu/pmuif/nvgpu_gpmu_cmdif.h>
 
 #include "gk20a/gk20a.h"
diff --git a/drivers/gpu/nvgpu/common/pmu/pmu_perfmon.c b/drivers/gpu/nvgpu/common/pmu/pmu_perfmon.c
index 873f54107..f0307d967 100644
--- a/drivers/gpu/nvgpu/common/pmu/pmu_perfmon.c
+++ b/drivers/gpu/nvgpu/common/pmu/pmu_perfmon.c
@@ -23,6 +23,7 @@
 #include <nvgpu/enabled.h>
 #include <nvgpu/pmu.h>
 #include <nvgpu/log.h>
+#include <nvgpu/bug.h>
 #include <nvgpu/pmuif/nvgpu_gpmu_cmdif.h>
 
 #include "gk20a/gk20a.h"
diff --git a/drivers/gpu/nvgpu/common/pmu/pmu_pg.c b/drivers/gpu/nvgpu/common/pmu/pmu_pg.c
index 499438841..b7f2cee8f 100644
--- a/drivers/gpu/nvgpu/common/pmu/pmu_pg.c
+++ b/drivers/gpu/nvgpu/common/pmu/pmu_pg.c
@@ -24,6 +24,7 @@
 #include <nvgpu/log.h>
 #include <nvgpu/pmuif/nvgpu_gpmu_cmdif.h>
 #include <nvgpu/barrier.h>
+#include <nvgpu/bug.h>
 
 #include "gk20a/gk20a.h"
 
diff --git a/drivers/gpu/nvgpu/gk20a/flcn_gk20a.c b/drivers/gpu/nvgpu/gk20a/flcn_gk20a.c
index f926805dc..b83d2dc04 100644
--- a/drivers/gpu/nvgpu/gk20a/flcn_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/flcn_gk20a.c
@@ -23,6 +23,7 @@
 #include <nvgpu/pmu.h>
 
 #include "gk20a/gk20a.h"
+#include "gk20a/flcn_gk20a.h"
 
 #include <nvgpu/hw/gm20b/hw_falcon_gm20b.h>
 
diff --git a/drivers/gpu/nvgpu/gk20a/flcn_gk20a.h b/drivers/gpu/nvgpu/gk20a/flcn_gk20a.h
index 6af0ef883..95d46251b 100644
--- a/drivers/gpu/nvgpu/gk20a/flcn_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/flcn_gk20a.h
@@ -24,5 +24,6 @@
 
 void gk20a_falcon_ops(struct nvgpu_falcon *flcn);
 void gk20a_falcon_hal_sw_init(struct nvgpu_falcon *flcn);
+void gk20a_falcon_dump_stats(struct nvgpu_falcon *flcn);
 
 #endif /* __FLCN_GK20A_H__ */
diff --git a/drivers/gpu/nvgpu/include/nvgpu/falcon.h b/drivers/gpu/nvgpu/include/nvgpu/falcon.h
index db0dd72ba..72c747848 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/falcon.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/falcon.h
@@ -192,6 +192,8 @@ int nvgpu_flcn_copy_to_dmem(struct nvgpu_falcon *flcn,
 	u32 dst, u8 *src, u32 size, u8 port);
 int nvgpu_flcn_copy_to_imem(struct nvgpu_falcon *flcn,
 	u32 dst, u8 *src, u32 size, u8 port, bool sec, u32 tag);
+int nvgpu_flcn_copy_from_imem(struct nvgpu_falcon *flcn,
+	u32 src, u8 *dst, u32 size, u8 port);
 int nvgpu_flcn_dma_copy(struct nvgpu_falcon *flcn,
 	struct nvgpu_falcon_dma_info *dma_info);
 u32 nvgpu_flcn_mailbox_read(struct nvgpu_falcon *flcn, u32 mailbox_index);