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gpu: nvgpu: add mm.mmu_fault.parse_mmu_fault_info gops

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Add mm.mmu_fault.parse_mmu_fault_info gops. This is required
for nvgpu-next.
Also add mmu_engine_id type in mmu_fault structure. This variable
will be set in parse_mmu_fault_info hal so that
gv11b_mm_mmu_fault_handle_other_fault_notify does not depend
upon any chip specific h/w header. This is needed because
BAR2 mmu engine id has changed in nvgpu-next.

JIRA NVGPU-5032

Change-Id: I0c5e9ef607aff5b105f59582013cbfb31396290a
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2330693
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Lakshmanan M <lm@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: Lakshmanan M <lm@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Seema Khowala
2020-04-17 20:26:35 -07:00
committed by Alex Waterman
parent 91401cc849
commit 68caee196a
8 changed files with 52 additions and 8 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
drivers/gpu/nvgpu/include/nvgpu/gops_mm.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -282,6 +282,16 @@ struct gops_mm {
* Disable the hardware setup of GMMU fault buffer.
*/
void (*disable_hw)(struct gk20a *g);
/**
* @brief HAL to parse mmu fault info read from h/w.
*
* @param mmufault [in] Pointer to memory containing info
* to be parsed.
*
*/
void (*parse_mmu_fault_info)(struct mmu_fault_info *mmufault);
} mmu_fault;
/**

17
drivers/gpu/nvgpu/include/nvgpu/mmu_fault.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2017-2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -52,6 +52,15 @@
/** State which is used for enabling the GMMU fault hardware support. */
#define NVGPU_MMU_FAULT_BUF_ENABLED 1U
/** S/w defined mmu engine id type. */
#define NVGPU_MMU_ENGINE_ID_TYPE_OTHER 0U
/** S/w defined mmu engine id type. */
#define NVGPU_MMU_ENGINE_ID_TYPE_BAR2 1U
/** S/w defined mmu engine id type. */
#define NVGPU_MMU_ENGINE_ID_TYPE_PHYSICAL 2U
/**
* Forward declared opaque placeholder type that does not really exist, but
* helps the compiler about getting types right.
@@ -118,6 +127,12 @@ struct mmu_fault_info {
*/
u32 mmu_engine_id;
/**
* The s/w defined mmu_engine_id type (BAR2, PHYSICAL).
*/
u32 mmu_engine_id_type;
/** GPC id if client type is gpc. For gv11b, NUM_GPCS = 1. */
u32 gpc_id;