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gpu: nvgpu: add mm.mmu_fault.parse_mmu_fault_info gops

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Add mm.mmu_fault.parse_mmu_fault_info gops. This is required
for nvgpu-next.
Also add mmu_engine_id type in mmu_fault structure. This variable
will be set in parse_mmu_fault_info hal so that
gv11b_mm_mmu_fault_handle_other_fault_notify does not depend
upon any chip specific h/w header. This is needed because
BAR2 mmu engine id has changed in nvgpu-next.

JIRA NVGPU-5032

Change-Id: I0c5e9ef607aff5b105f59582013cbfb31396290a
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2330693
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Lakshmanan M <lm@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: Lakshmanan M <lm@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Seema Khowala
2020-04-17 20:26:35 -07:00
committed by Alex Waterman
parent 91401cc849
commit 68caee196a
8 changed files with 52 additions and 8 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
userspace/units/fb/fb_mmu_fault_gv11b_fusa.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -34,6 +34,7 @@
#include "hal/fb/fb_gv11b.h"
#include "hal/fb/fb_mmu_fault_gv11b.h"
#include "hal/fb/intr/fb_intr_gv11b.h"
#include "hal/mm/mmu_fault/mmu_fault_gv11b.h"
#include <nvgpu/hw/gv11b/hw_fb_gv11b.h>
#include "fb_fusa.h"
@@ -102,6 +103,8 @@ int fb_mmu_fault_gv11b_init_test(struct unit_module *m, struct gk20a *g,
g->ops.bus.bar2_bind = hal_bar2_bind_nop;
g->ops.fifo.mmu_fault_id_to_pbdma_id =
hal_fifo_mmu_fault_id_to_pbdma_id;
g->ops.mm.mmu_fault.parse_mmu_fault_info =
gv11b_mm_mmu_fault_parse_mmu_fault_info;
return UNIT_SUCCESS;
}

2
userspace/units/mm/hal/mmu_fault/gv11b_fusa/mmu-fault-gv11b-fusa.c
View File

@@ -150,6 +150,8 @@ static int init_mm(struct unit_module *m, struct gk20a *g)
gp10b_get_max_page_table_levels;
g->ops.mm.mmu_fault.info_mem_destroy =
gv11b_mm_mmu_fault_info_mem_destroy;
g->ops.mm.mmu_fault.parse_mmu_fault_info =
gv11b_mm_mmu_fault_parse_mmu_fault_info;
nvgpu_posix_register_io(g, &mmu_faults_callbacks);
nvgpu_posix_io_init_reg_space(g);