diff --git a/arch/nvgpu-hal-new.yaml b/arch/nvgpu-hal-new.yaml
index c26dad4b1..fae1cf5f0 100644
--- a/arch/nvgpu-hal-new.yaml
+++ b/arch/nvgpu-hal-new.yaml
@@ -1036,11 +1036,6 @@ cic:
              hal/cic/cic_lut_gv11b_fusa.c,
              hal/cic/cic_gv11b.h ]
 
-misc:
-  safe: no
-  owner: Vedashree V
-  sources: [ nvgpu_next_gpuid.h ]
-
 grmgr:
   safe: no
   owner: Lakshmanan M
diff --git a/drivers/gpu/nvgpu/common/acr/acr.c b/drivers/gpu/nvgpu/common/acr/acr.c
index 3038cd312..f269e14bd 100644
--- a/drivers/gpu/nvgpu/common/acr/acr.c
+++ b/drivers/gpu/nvgpu/common/acr/acr.c
@@ -35,9 +35,11 @@
 #ifdef CONFIG_NVGPU_DGPU
 #include "acr_sw_tu104.h"
 #endif
-
-#if defined(CONFIG_NVGPU_NON_FUSA)
-#include "nvgpu_next_gpuid.h"
+#ifdef CONFIG_NVGPU_NON_FUSA
+#include "acr_sw_ga10b.h"
+#ifdef CONFIG_NVGPU_DGPU
+#include "acr_sw_ga100.h"
+#endif
 #endif
 
 /* ACR public API's */
@@ -146,19 +148,19 @@ int nvgpu_acr_init(struct gk20a *g)
 		nvgpu_gv11b_acr_sw_init(g, g->acr);
 		break;
 #if defined(CONFIG_NVGPU_NON_FUSA)
-	case NVGPU_NEXT_GPUID:
+	case NVGPU_GPUID_GA10B:
 		nvgpu_ga10b_acr_sw_init(g, g->acr);
 		break;
-#endif
+#endif /* CONFIG_NVGPU_NON_FUSA */
 #ifdef CONFIG_NVGPU_DGPU
 	case NVGPU_GPUID_TU104:
 		nvgpu_tu104_acr_sw_init(g, g->acr);
 		break;
 #if defined(CONFIG_NVGPU_NON_FUSA)
-	case NVGPU_NEXT_DGPU_GPUID:
+	case NVGPU_GPUID_GA100:
 		nvgpu_ga100_acr_sw_init(g, g->acr);
 		break;
-#endif
+#endif /* CONFIG_NVGPU_NON_FUSA */
 #endif
 	default:
 		nvgpu_kfree(g, g->acr);
diff --git a/drivers/gpu/nvgpu/common/acr/acr_blob_construct.c b/drivers/gpu/nvgpu/common/acr/acr_blob_construct.c
index c62151e58..a7d9fd758 100644
--- a/drivers/gpu/nvgpu/common/acr/acr_blob_construct.c
+++ b/drivers/gpu/nvgpu/common/acr/acr_blob_construct.c
@@ -33,11 +33,6 @@
 #include "acr_wpr.h"
 #include "acr_priv.h"
 
-#if defined(CONFIG_NVGPU_NON_FUSA)
-#include "nvgpu_next_gpuid.h"
-#endif
-
-
 #define APP_IMEM_OFFSET			(0)
 #define APP_IMEM_ENTRY			(0)
 #define APP_DMEM_OFFSET			(0)
@@ -163,7 +158,7 @@ int nvgpu_acr_lsf_fecs_ucode_details(struct gk20a *g, void *lsf_ucode_img)
 	switch (ver) {
 		case NVGPU_GPUID_GV11B:
 #if defined(CONFIG_NVGPU_NON_FUSA)
-		case NVGPU_NEXT_GPUID:
+		case NVGPU_GPUID_GA10B:
 #endif
 			fecs_sig = nvgpu_request_firmware(g, GM20B_FECS_UCODE_SIG,
 				NVGPU_REQUEST_FIRMWARE_NO_WARN);
@@ -175,8 +170,8 @@ int nvgpu_acr_lsf_fecs_ucode_details(struct gk20a *g, void *lsf_ucode_img)
 			break;
 #endif
 #if defined(CONFIG_NVGPU_NON_FUSA)
-		case NVGPU_NEXT_DGPU_GPUID:
-			fecs_sig = nvgpu_request_firmware(g, NEXT_DGPU_FECS_UCODE_SIG,
+		case NVGPU_GPUID_GA100:
+			fecs_sig = nvgpu_request_firmware(g, GA100_FECS_UCODE_SIG,
 				NVGPU_REQUEST_FIRMWARE_NO_SOC);
 			break;
 #endif
@@ -273,7 +268,7 @@ int nvgpu_acr_lsf_gpccs_ucode_details(struct gk20a *g, void *lsf_ucode_img)
 	switch (ver) {
 		case NVGPU_GPUID_GV11B:
 #if defined(CONFIG_NVGPU_NON_FUSA)
-		case NVGPU_NEXT_GPUID:
+		case NVGPU_GPUID_GA10B:
 #endif
 			gpccs_sig = nvgpu_request_firmware(g, T18x_GPCCS_UCODE_SIG,
 					NVGPU_REQUEST_FIRMWARE_NO_WARN);
@@ -285,8 +280,8 @@ int nvgpu_acr_lsf_gpccs_ucode_details(struct gk20a *g, void *lsf_ucode_img)
 			break;
 #endif
 #if defined(CONFIG_NVGPU_NON_FUSA)
-		case NVGPU_NEXT_DGPU_GPUID:
-			gpccs_sig = nvgpu_request_firmware(g, NEXT_DGPU_GPCCS_UCODE_SIG,
+		case NVGPU_GPUID_GA100:
+			gpccs_sig = nvgpu_request_firmware(g, GA100_GPCCS_UCODE_SIG,
 				NVGPU_REQUEST_FIRMWARE_NO_SOC);
 			break;
 #endif
diff --git a/drivers/gpu/nvgpu/common/acr/acr_priv.h b/drivers/gpu/nvgpu/common/acr/acr_priv.h
index 378f85795..0bcb21ea0 100644
--- a/drivers/gpu/nvgpu/common/acr/acr_priv.h
+++ b/drivers/gpu/nvgpu/common/acr/acr_priv.h
@@ -92,6 +92,9 @@ struct wpr_carveout_info;
 #define TU104_FECS_UCODE_SIG "tu104/fecs_sig.bin"
 #define TU104_GPCCS_UCODE_SIG "tu104/gpccs_sig.bin"
 
+#define GA100_FECS_UCODE_SIG	"ga100/fecs_sig.bin"
+#define GA100_GPCCS_UCODE_SIG	"ga100/gpccs_sig.bin"
+
 #define LSF_SEC2_UCODE_IMAGE_BIN "sec2_ucode_image.bin"
 #define LSF_SEC2_UCODE_DESC_BIN "sec2_ucode_desc.bin"
 #define LSF_SEC2_UCODE_SIG_BIN "sec2_sig.bin"
diff --git a/drivers/gpu/nvgpu/common/acr/acr_sw_ga10b.c b/drivers/gpu/nvgpu/common/acr/acr_sw_ga10b.c
index e9e99f4ca..20f1c3d6f 100644
--- a/drivers/gpu/nvgpu/common/acr/acr_sw_ga10b.c
+++ b/drivers/gpu/nvgpu/common/acr/acr_sw_ga10b.c
@@ -312,7 +312,8 @@ static void ga10b_acr_sw_init(struct gk20a *g, struct nvgpu_acr *acr)
 	acr->patch_wpr_info_to_ucode = ga10b_acr_patch_wpr_info_to_ucode;
 }
 
-extern void nvgpu_ga10b_acr_sw_init(struct gk20a *g, struct nvgpu_acr *acr)
+
+void nvgpu_ga10b_acr_sw_init(struct gk20a *g, struct nvgpu_acr *acr)
 {
 	nvgpu_log_fn(g, " ");
 	acr->g = g;
diff --git a/drivers/gpu/nvgpu/common/falcon/falcon.c b/drivers/gpu/nvgpu/common/falcon/falcon.c
index 23f5db8a4..e6c16ee99 100644
--- a/drivers/gpu/nvgpu/common/falcon/falcon.c
+++ b/drivers/gpu/nvgpu/common/falcon/falcon.c
@@ -31,7 +31,7 @@
 #endif
 
 #ifdef CONFIG_NVGPU_NON_FUSA
-#include "nvgpu_next_gpuid.h"
+#include "falcon_sw_ga10b.h"
 #endif /* CONFIG_NVGPU_NON_FUSA */
 
 static bool is_falcon_valid(struct nvgpu_falcon *flcn)
@@ -462,12 +462,12 @@ static int falcon_sw_chip_init(struct gk20a *g, struct nvgpu_falcon *flcn)
 	case NVGPU_GPUID_GP10B:
 		gk20a_falcon_sw_init(flcn);
 		break;
-	case NVGPU_NEXT_GPUID:
+	case NVGPU_GPUID_GA10B:
 		ga10b_falcon_sw_init(flcn);
 		break;
 #ifdef CONFIG_NVGPU_DGPU
 	case NVGPU_GPUID_TU104:
-	case NVGPU_NEXT_DGPU_GPUID:
+	case NVGPU_GPUID_GA100:
 		tu104_falcon_sw_init(flcn);
 		break;
 #endif /* CONFIG_NVGPU_DGPU */
diff --git a/drivers/gpu/nvgpu/common/pmu/lsfm/lsfm.c b/drivers/gpu/nvgpu/common/pmu/lsfm/lsfm.c
index ee1bef892..b38a80794 100644
--- a/drivers/gpu/nvgpu/common/pmu/lsfm/lsfm.c
+++ b/drivers/gpu/nvgpu/common/pmu/lsfm/lsfm.c
@@ -34,10 +34,6 @@
 #include "lsfm_sw_tu104.h"
 #endif
 
-#if defined(CONFIG_NVGPU_NON_FUSA)
-#include "nvgpu_next_gpuid.h"
-#endif
-
 static bool is_lsfm_supported(struct gk20a *g,
 	struct nvgpu_pmu *pmu, struct nvgpu_pmu_lsfm *lsfm)
 {
@@ -169,7 +165,7 @@ int nvgpu_pmu_lsfm_init(struct gk20a *g, struct nvgpu_pmu_lsfm **lsfm)
 		break;
 #endif
 #if defined(CONFIG_NVGPU_NON_FUSA)
-	case NVGPU_NEXT_GPUID:
+	case NVGPU_GPUID_GA10B:
 		nvgpu_gv100_lsfm_sw_init(g, *lsfm);
 		break;
 #endif
diff --git a/drivers/gpu/nvgpu/common/pmu/perfmon/pmu_perfmon.c b/drivers/gpu/nvgpu/common/pmu/perfmon/pmu_perfmon.c
index 3cdaa7ae6..067efecbc 100644
--- a/drivers/gpu/nvgpu/common/pmu/perfmon/pmu_perfmon.c
+++ b/drivers/gpu/nvgpu/common/pmu/perfmon/pmu_perfmon.c
@@ -34,12 +34,11 @@
 #include <nvgpu/pmu/pmuif/nvgpu_cmdif.h>
 #include <nvgpu/kmem.h>
 
-#if defined(CONFIG_NVGPU_NON_FUSA)
-#include "nvgpu_next_gpuid.h"
-#endif
-
 #include "pmu_perfmon_sw_gm20b.h"
 #include "pmu_perfmon_sw_gv11b.h"
+#if defined(CONFIG_NVGPU_NON_FUSA)
+#include "pmu_perfmon_sw_ga10b.h"
+#endif
 
 static u8 get_perfmon_id(struct nvgpu_pmu *pmu)
 {
@@ -56,7 +55,7 @@ static u8 get_perfmon_id(struct nvgpu_pmu *pmu)
 	case NVGPU_GPUID_GP10B:
 	case NVGPU_GPUID_GV11B:
 #if defined(CONFIG_NVGPU_NON_FUSA)
-	case NVGPU_NEXT_GPUID:
+	case NVGPU_GPUID_GA10B:
 #endif
 		unit_id = PMU_UNIT_PERFMON_T18X;
 		break;
@@ -145,7 +144,7 @@ int nvgpu_pmu_initialize_perfmon(struct gk20a *g, struct nvgpu_pmu *pmu,
 		nvgpu_gv11b_perfmon_sw_init(g, *perfmon_ptr);
 		break;
 #if defined(CONFIG_NVGPU_NON_FUSA)
-	case NVGPU_NEXT_GPUID:
+	case NVGPU_GPUID_GA10B:
 		nvgpu_ga10b_perfmon_sw_init(g, *perfmon_ptr);
 		break;
 #endif
diff --git a/drivers/gpu/nvgpu/common/pmu/pg/pmu_pg.c b/drivers/gpu/nvgpu/common/pmu/pg/pmu_pg.c
index 5b25f78d4..d66fde938 100644
--- a/drivers/gpu/nvgpu/common/pmu/pg/pmu_pg.c
+++ b/drivers/gpu/nvgpu/common/pmu/pg/pmu_pg.c
@@ -38,11 +38,10 @@
 #include "pg_sw_gm20b.h"
 #include "pg_sw_gv11b.h"
 #include "pg_sw_gp10b.h"
-#include "pmu_pg.h"
-
 #if defined(CONFIG_NVGPU_NON_FUSA)
-#include "nvgpu_next_gpuid.h"
-#endif
+#include "pg_sw_ga10b.h"
+#endif /* CONFIG_NVGPU_NON_FUSA */
+#include "pmu_pg.h"
 
 static bool is_pg_supported(struct gk20a *g, struct nvgpu_pmu_pg *pg)
 {
@@ -881,10 +880,10 @@ int nvgpu_pmu_pg_init(struct gk20a *g, struct nvgpu_pmu *pmu,
 		break;
 
 #if defined(CONFIG_NVGPU_NON_FUSA)
-	case NVGPU_NEXT_GPUID:
+	case NVGPU_GPUID_GA10B:
 		nvgpu_ga10b_pg_sw_init(g, *pg_p);
 		break;
-#endif
+#endif /* CONFIG_NVGPU_NON_FUSA */
 
 	default:
 		nvgpu_kfree(g, *pg_p);
diff --git a/drivers/gpu/nvgpu/common/profiler/profiler.c b/drivers/gpu/nvgpu/common/profiler/profiler.c
index 210bee226..4bff174f1 100644
--- a/drivers/gpu/nvgpu/common/profiler/profiler.c
+++ b/drivers/gpu/nvgpu/common/profiler/profiler.c
@@ -38,10 +38,6 @@
 #include <nvgpu/gr/gr_instances.h>
 #include <nvgpu/grmgr.h>
 
-#if defined(CONFIG_NVGPU_NON_FUSA)
-#include "nvgpu_next_gpuid.h"
-#endif
-
 static int nvgpu_profiler_build_regops_allowlist(struct nvgpu_profiler_object *prof);
 static void nvgpu_profiler_destroy_regops_allowlist(struct nvgpu_profiler_object *prof);
 
@@ -452,7 +448,7 @@ static int nvgpu_profiler_quiesce_hwpm_streamout_resident(struct gk20a *g,
 	}
 
 #ifdef CONFIG_NVGPU_NON_FUSA
-	NVGPU_NEXT_PROFILER_QUIESCE(g);
+	nvgpu_profiler_hs_stream_quiesce(g);
 #endif
 
 	/* Disable streamout */
@@ -1158,7 +1154,7 @@ bool nvgpu_profiler_validate_regops_allowlist(struct nvgpu_profiler_object *prof
 	return allowlist_offset_search(g, offset_allowlist, count, offset);
 }
 
-#ifdef CONFIG_NVGPU_HAL_NON_FUSA
+#ifdef CONFIG_NVGPU_NON_FUSA
 void nvgpu_profiler_hs_stream_quiesce(struct gk20a *g)
 {
 	if (g->ops.perf.reset_hs_streaming_credits != NULL) {
@@ -1171,4 +1167,4 @@ void nvgpu_profiler_hs_stream_quiesce(struct gk20a *g)
 		g->ops.perf.enable_hs_streaming(g, false);
 	}
 }
-#endif /* CONFIG_NVGPU_HAL_NON_FUSA */
+#endif /* CONFIG_NVGPU_NON_FUSA */
diff --git a/drivers/gpu/nvgpu/common/vbios/bios.c b/drivers/gpu/nvgpu/common/vbios/bios.c
index d70278c67..50a6f3896 100644
--- a/drivers/gpu/nvgpu/common/vbios/bios.c
+++ b/drivers/gpu/nvgpu/common/vbios/bios.c
@@ -31,10 +31,6 @@
 #include "bios_sw_gv100.h"
 #include "bios_sw_tu104.h"
 
-#if defined(CONFIG_NVGPU_NON_FUSA)
-#include "nvgpu_next_gpuid.h"
-#endif
-
 static void nvgpu_bios_parse_bit(struct gk20a *g, u32 offset);
 
 int nvgpu_bios_devinit(struct gk20a *g,
@@ -74,7 +70,7 @@ bool nvgpu_bios_check_dgpu(struct gk20a *g, u32 ver)
 	case NVGPU_GPUID_GV100:
 	case NVGPU_GPUID_TU104:
 #if defined(CONFIG_NVGPU_NON_FUSA)
-	case NVGPU_NEXT_DGPU_GPUID:
+	case NVGPU_GPUID_GA100:
 #endif
 		is_supported = true;
 		break;
@@ -198,7 +194,7 @@ int nvgpu_bios_sw_init(struct gk20a *g)
 		break;
 
 #if defined(CONFIG_NVGPU_NON_FUSA)
-	case NVGPU_NEXT_DGPU_GPUID:
+	case NVGPU_GPUID_GA100:
 		/*
 		 * TODO
 		 * After IFR region removal from bios image this can
diff --git a/drivers/gpu/nvgpu/hal/init/hal_init.c b/drivers/gpu/nvgpu/hal/init/hal_init.c
index 20e0fb2cc..042e8333f 100644
--- a/drivers/gpu/nvgpu/hal/init/hal_init.c
+++ b/drivers/gpu/nvgpu/hal/init/hal_init.c
@@ -37,7 +37,10 @@
 #endif
 
 #if defined(CONFIG_NVGPU_HAL_NON_FUSA)
-#include "nvgpu_next_gpuid.h"
+#include "hal_ga10b.h"
+#if defined(CONFIG_NVGPU_DGPU)
+#include "hal_ga100.h"
+#endif
 #endif
 
 #include "hal/mc/mc_gm20b.h"
@@ -66,13 +69,11 @@ int nvgpu_init_hal(struct gk20a *g)
 			return -ENODEV;
 		}
 		break;
-#if defined(CONFIG_NVGPU_HAL_NON_FUSA)
-	case NVGPU_NEXT_GPUID:
-		if (NVGPU_NEXT_INIT_HAL(g) != 0) {
+	case NVGPU_GPUID_GA10B:
+		if (ga10b_init_hal(g) != 0) {
 			return -ENODEV;
 		}
 		break;
-#endif
 #endif
 
 	case NVGPU_GPUID_GV11B:
@@ -88,8 +89,8 @@ int nvgpu_init_hal(struct gk20a *g)
 		}
 		break;
 #if defined(CONFIG_NVGPU_HAL_NON_FUSA) && defined(CONFIG_NVGPU_DGPU)
-	case NVGPU_NEXT_DGPU_GPUID:
-		if (NVGPU_NEXT_DGPU_INIT_HAL(g) != 0) {
+	case NVGPU_GPUID_GA100:
+		if (ga100_init_hal(g) != 0) {
 			return -ENODEV;
 		}
 		break;
diff --git a/drivers/gpu/nvgpu/hal/netlist/netlist_ga100.c b/drivers/gpu/nvgpu/hal/netlist/netlist_ga100.c
index 127bc67d0..481095317 100644
--- a/drivers/gpu/nvgpu/hal/netlist/netlist_ga100.c
+++ b/drivers/gpu/nvgpu/hal/netlist/netlist_ga100.c
@@ -22,8 +22,6 @@
 
 #include <nvgpu/gk20a.h>
 
-#include "nvgpu_next_gpuid.h"
-
 #include "netlist_ga100.h"
 
 int ga100_netlist_get_name(struct gk20a *g, int index, char *name)
@@ -32,7 +30,7 @@ int ga100_netlist_get_name(struct gk20a *g, int index, char *name)
 	int valid = 0;
 
 	switch (ver) {
-	case NVGPU_NEXT_DGPU_GPUID:
+	case NVGPU_GPUID_GA100:
 		(void) strcpy(name, "ga100/");
 		(void) strcat(name, GA100_NETLIST_IMAGE_FW_NAME);
 		break;
diff --git a/drivers/gpu/nvgpu/hal/pramin/pramin_init.c b/drivers/gpu/nvgpu/hal/pramin/pramin_init.c
index 14a801553..99e4607b9 100644
--- a/drivers/gpu/nvgpu/hal/pramin/pramin_init.c
+++ b/drivers/gpu/nvgpu/hal/pramin/pramin_init.c
@@ -29,10 +29,6 @@
 #include "pramin_tu104.h"
 #endif
 
-#if defined(CONFIG_NVGPU_HAL_NON_FUSA)
-#include "nvgpu_next_gpuid.h"
-#endif
-
 void nvgpu_pramin_ops_init(struct gk20a *g)
 {
 	u32 ver = g->params.gpu_arch + g->params.gpu_impl;
@@ -47,7 +43,7 @@ void nvgpu_pramin_ops_init(struct gk20a *g)
 		break;
 	case NVGPU_GPUID_TU104:
 #ifdef CONFIG_NVGPU_HAL_NON_FUSA
-	case NVGPU_NEXT_DGPU_GPUID:
+	case NVGPU_GPUID_GA100:
 #endif
 		g->ops.pramin.data032_r = tu104_pramin_data032_r;
 		break;
diff --git a/drivers/gpu/nvgpu/hal/vgpu/init/init_hal_vgpu.c b/drivers/gpu/nvgpu/hal/vgpu/init/init_hal_vgpu.c
index 8afb5a7ec..cdf84e35b 100644
--- a/drivers/gpu/nvgpu/hal/vgpu/init/init_hal_vgpu.c
+++ b/drivers/gpu/nvgpu/hal/vgpu/init/init_hal_vgpu.c
@@ -26,12 +26,11 @@
 #include <nvgpu/vgpu/vgpu.h>
 #include <nvgpu/vgpu/os_init_hal_vgpu.h>
 
-#if defined(CONFIG_NVGPU_HAL_NON_FUSA)
-#include "nvgpu_next_gpuid.h"
-#endif
-
 #include "init_hal_vgpu.h"
 #include "vgpu_hal_gv11b.h"
+#ifdef CONFIG_NVGPU_HAL_NON_FUSA
+#include "vgpu_hal_ga10b.h"
+#endif
 
 int vgpu_init_hal(struct gk20a *g)
 {
@@ -43,11 +42,9 @@ int vgpu_init_hal(struct gk20a *g)
 	case NVGPU_GPUID_GV11B:
 		err = vgpu_gv11b_init_hal(g);
 		break;
-#ifdef CONFIG_NVGPU_HAL_NON_FUSA
-	case NVGPU_NEXT_GPUID:
-		err = NVGPU_NEXT_VGPU_INIT_HAL(g);
+	case NVGPU_GPUID_GA10B:
+		err = vgpu_ga10b_init_hal(g);
 		break;
-#endif
 #endif
 	default:
 		nvgpu_err(g, "no support for %x", ver);
diff --git a/drivers/gpu/nvgpu/hal/vgpu/init/vgpu_hal_ga10b.h b/drivers/gpu/nvgpu/hal/vgpu/init/vgpu_hal_ga10b.h
index 330874512..b70237cea 100644
--- a/drivers/gpu/nvgpu/hal/vgpu/init/vgpu_hal_ga10b.h
+++ b/drivers/gpu/nvgpu/hal/vgpu/init/vgpu_hal_ga10b.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2020, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2020-2021, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -20,8 +20,8 @@
  * DEALINGS IN THE SOFTWARE.
  */
 
-#ifndef VGPU_HAL_GV11B_H
-#define VGPU_HAL_GV11B_H
+#ifndef VGPU_HAL_GA10B_H
+#define VGPU_HAL_GA10B_H
 
 struct gk20a;
 
diff --git a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h
index 9b2e0e905..53b85fe2c 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h
@@ -877,6 +877,10 @@ int gk20a_do_unidle(void *_g);
 #define NVGPU_GPUID_GV100   0x00000140U
 /** tu104 HW version */
 #define NVGPU_GPUID_TU104   0x00000164U
+/** ga100 HW Version */
+#define NVGPU_GPUID_GA100   0x00000170U
+/** ga10b HW version */
+#define NVGPU_GPUID_GA10B   0x0000017BU
 
 /**
  * @}
diff --git a/drivers/gpu/nvgpu/include/nvgpu/profiler.h b/drivers/gpu/nvgpu/include/nvgpu/profiler.h
index e8be009c9..623b011dd 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/profiler.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/profiler.h
@@ -184,9 +184,9 @@ void nvgpu_profiler_free_pma_stream(struct nvgpu_profiler_object *prof);
 bool nvgpu_profiler_validate_regops_allowlist(struct nvgpu_profiler_object *prof,
 		u32 offset, enum nvgpu_pm_resource_hwpm_register_type *type);
 
-#ifdef CONFIG_NVGPU_HAL_NON_FUSA
+#ifdef CONFIG_NVGPU_NON_FUSA
 void nvgpu_profiler_hs_stream_quiesce(struct gk20a *g);
-#endif /* CONFIG_NVGPU_HAL_NON_FUSA */
+#endif /* CONFIG_NVGPU_NON_FUSA */
 
 #endif /* CONFIG_NVGPU_PROFILER */
 #endif /* NVGPU_PROFILER_H */
diff --git a/drivers/gpu/nvgpu/nvgpu_next_gpuid.h b/drivers/gpu/nvgpu/nvgpu_next_gpuid.h
deleted file mode 100644
index f18d88dec..000000000
--- a/drivers/gpu/nvgpu/nvgpu_next_gpuid.h
+++ /dev/null
@@ -1,70 +0,0 @@
-/*
- * Copyright (c) 2020-2021, NVIDIA CORPORATION.  All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-
-#include <common/falcon/falcon_sw_ga10b.h>
-#include <common/acr/acr_sw_ga10b.h>
-#include <common/acr/acr_sw_ga100.h>
-
-#ifndef NVGPU_NEXT_GPUID_H
-#define NVGPU_NEXT_GPUID_H
-
-#define NVGPU_NEXT_GPUID	0x0000017b
-
-#define NVGPU_NEXT_FECS_UCODE_SIG "ga10b/fecs_sig.bin"
-#define NVGPU_NEXT_GPCCS_UCODE_SIG "ga10b/gpccs_sig.bin"
-
-#define NVGPU_NEXT_INIT_HAL		ga10b_init_hal
-#define NVGPU_NEXT_INIT_OS_OPS		nvgpu_ga10b_init_os_ops
-#define NVGPU_NEXT_COMPATIBLE		"nvidia,ga10b"
-#define NVGPU_NEXT_PLATFORM		ga10b_tegra_platform
-
-#define NVGPU_NEXT_COMPATIBLE_VGPU "nvidia,ga10b-vgpu"
-#define NVGPU_NEXT_VGPU_INIT_HAL vgpu_ga10b_init_hal
-#define NVGPU_NEXT_PLATFORM_VGPU ga10b_vgpu_tegra_platform
-
-#define NVGPU_NEXT_PROFILER_QUIESCE	nvgpu_profiler_hs_stream_quiesce
-#ifdef CONFIG_NVGPU_DGPU
-#define NVGPU_NEXT_DGPU_GPUID		0x00000170
-#define NVGPU_NEXT_DGPU_INIT_HAL	ga100_init_hal
-#define NEXT_DGPU_FECS_UCODE_SIG	"ga100/fecs_sig.bin"
-#define NEXT_DGPU_GPCCS_UCODE_SIG	"ga100/gpccs_sig.bin"
-
-extern int ga100_init_hal(struct gk20a *g);
-#endif
-
-struct nvgpu_os_linux;
-
-extern int ga10b_init_hal(struct gk20a *g);
-
-extern struct gk20a_platform ga10b_tegra_platform;
-
-extern void nvgpu_ga10b_perfmon_sw_init(struct gk20a *g,
-		struct nvgpu_pmu_perfmon *perfmon);
-
-extern void nvgpu_ga10b_pg_sw_init(struct gk20a *g, struct nvgpu_pmu_pg *pg);
-
-int vgpu_ga10b_init_hal(struct gk20a *g);
-extern struct gk20a_platform ga10b_vgpu_tegra_platform;
-
-extern void nvgpu_profiler_hs_stream_quiesce(struct gk20a *g);
-
-#endif
diff --git a/drivers/gpu/nvgpu/os/linux/module.c b/drivers/gpu/nvgpu/os/linux/module.c
index 74d61d6e5..ae0e7fabd 100644
--- a/drivers/gpu/nvgpu/os/linux/module.c
+++ b/drivers/gpu/nvgpu/os/linux/module.c
@@ -86,10 +86,6 @@
 #include "cde.h"
 #endif
 
-#if defined(CONFIG_NVGPU_HAL_NON_FUSA) && defined(CONFIG_NVGPU_NON_FUSA)
-#include "nvgpu_next_gpuid.h"
-#endif
-
 #define GK20A_WAIT_FOR_IDLE_MS	2000
 
 #define CREATE_TRACE_POINTS
@@ -669,11 +665,11 @@ static struct of_device_id tegra_gk20a_of_match[] = {
 		.data = &gv11b_vgpu_tegra_platform},
 #endif
 #if defined(CONFIG_NVGPU_HAL_NON_FUSA) && defined(CONFIG_NVGPU_NON_FUSA)
-	{ .compatible = NVGPU_NEXT_COMPATIBLE,
-		.data = &NVGPU_NEXT_PLATFORM},
+	{ .compatible = "nvidia,ga10b",
+		.data = &ga10b_tegra_platform},
 #ifdef CONFIG_NVGPU_GR_VIRTUALIZATION
-	{ .compatible = NVGPU_NEXT_COMPATIBLE_VGPU,
-		.data = &NVGPU_NEXT_PLATFORM_VGPU},
+	{ .compatible = "nvidia,ga10b-vgpu",
+		.data = &ga10b_vgpu_tegra_platform},
 #endif
 #endif
 #endif
diff --git a/drivers/gpu/nvgpu/os/linux/platform_gk20a.h b/drivers/gpu/nvgpu/os/linux/platform_gk20a.h
index 4b30991e1..87c658bda 100644
--- a/drivers/gpu/nvgpu/os/linux/platform_gk20a.h
+++ b/drivers/gpu/nvgpu/os/linux/platform_gk20a.h
@@ -322,6 +322,13 @@ extern struct gk20a_platform gv11b_tegra_platform;
 #ifdef CONFIG_NVGPU_GR_VIRTUALIZATION
 extern struct gk20a_platform gv11b_vgpu_tegra_platform;
 #endif
+#if defined(CONFIG_NVGPU_HAL_NON_FUSA) && defined(CONFIG_NVGPU_NON_FUSA)
+extern struct gk20a_platform ga10b_tegra_platform;
+#ifdef CONFIG_NVGPU_GR_VIRTUALIZATION
+extern struct gk20a_platform ga10b_vgpu_tegra_platform;
+#endif
+#endif
+
 #endif
 
 int gk20a_tegra_busy(struct device *dev);