gpu: nvgpu: add netlist unit test

Added netlist unit test to cover all netlist APIs.
Also updated netlist SWUT plan.

JIRA NVGPU-2773

Change-Id: I76b3f54c2c40d08377d22c57ae8dfcf59101aab2
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2207477
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

Makefile.umbrella.tmk

@@ -62,6 +62,7 @@ NV_REPOSITORY_COMPONENTS += userspace/units/mm/gmmu/page_table
 NV_REPOSITORY_COMPONENTS += userspace/units/mm/mm
 NV_REPOSITORY_COMPONENTS += userspace/units/mm/page_table_faults
 NV_REPOSITORY_COMPONENTS += userspace/units/mm/vm
+NV_REPOSITORY_COMPONENTS += userspace/units/netlist
 NV_REPOSITORY_COMPONENTS += userspace/units/fifo
 NV_REPOSITORY_COMPONENTS += userspace/units/fifo/channel
 NV_REPOSITORY_COMPONENTS += userspace/units/fifo/runlist

drivers/gpu/nvgpu/libnvgpu-drv_safe.export

@@ -18,6 +18,7 @@ gk20a_ramin_base_shift
 gk20a_vm_release_share
 gm20b_fb_tlb_invalidate
 gm20b_mm_get_big_page_sizes
+gm20b_gr_falcon_get_fecs_ctx_state_store_major_rev_id
 gm20b_ramin_set_big_page_size
 gp10b_mm_get_default_big_page_size
 gp10b_mm_get_iommu_bit
@@ -85,6 +86,7 @@ gv11b_blcg_xbar_gating_prod_size
 gv11b_blcg_xbar_get_gating_prod
 gv11b_blcg_hshub_gating_prod_size
 gv11b_blcg_hshub_get_gating_prod
+gv11b_netlist_is_firmware_defined
 nvgpu_acr_init
 nvgpu_alloc
 nvgpu_alloc_base
@@ -281,6 +283,22 @@ nvgpu_mutex_destroy
 nvgpu_mutex_init
 nvgpu_mutex_release
 nvgpu_mutex_tryacquire
+nvgpu_netlist_deinit_ctx_vars
+nvgpu_netlist_init_ctx_vars
+nvgpu_netlist_get_sw_non_ctx_load_av_list
+nvgpu_netlist_get_sw_ctx_load_aiv_list
+nvgpu_netlist_get_sw_method_init_av_list
+nvgpu_netlist_get_sw_bundle_init_av_list
+nvgpu_netlist_get_sw_veid_bundle_init_av_list
+nvgpu_netlist_get_sw_bundle64_init_av64_list
+nvgpu_netlist_get_fecs_inst_count
+nvgpu_netlist_get_fecs_data_count
+nvgpu_netlist_get_gpccs_inst_count
+nvgpu_netlist_get_gpccs_data_count
+nvgpu_netlist_get_fecs_inst_list
+nvgpu_netlist_get_fecs_data_list
+nvgpu_netlist_get_gpccs_inst_list
+nvgpu_netlist_get_gpccs_data_list
 nvgpu_nvgpu_get_fault_injection
 nvgpu_pd_alloc
 nvgpu_pd_cache_fini

userspace/Makefile.sources

@@ -70,6 +70,7 @@ UNITS :=				\
 	$(UNIT_SRC)/mm/page_table_faults \
 	$(UNIT_SRC)/mm/nvgpu_mem	\
 	$(UNIT_SRC)/mm/vm		\
+	$(UNIT_SRC)/netlist		\
 	$(UNIT_SRC)/fifo		\
 	$(UNIT_SRC)/fifo/channel	\
 	$(UNIT_SRC)/fifo/runlist	\

userspace/SWUTS.h

@@ -35,6 +35,7 @@
  *   - @ref SWUTS-interface-lock
  *   - @ref SWUTS-interface-rbtree
  *   - @ref SWUTS-falcon
+ *   - @ref SWUTS-netlist
  *   - @ref SWUTS-fifo
  *   - @ref SWUTS-fifo-channel
  *   - @ref SWUTS-fifo-runlist

userspace/SWUTS.sources

@@ -5,6 +5,7 @@ INPUT += ../../../userspace/units/interface/bsearch/bsearch.h
 INPUT += ../../../userspace/units/interface/lock/lock.h
 INPUT += ../../../userspace/units/interface/rbtree/rbtree.h
 INPUT += ../../../userspace/units/falcon/falcon_tests/nvgpu-falcon.h
+INPUT += ../../../userspace/units/netlist/nvgpu-netlist.h
 INPUT += ../../../userspace/units/fifo/nvgpu-fifo.h
 INPUT += ../../../userspace/units/fifo/channel/nvgpu-channel.h
 INPUT += ../../../userspace/units/fifo/runlist/nvgpu-runlist.h

userspace/required_tests.json

@@ -1677,5 +1677,25 @@
       "test": "acr_free_falcon_test_env",
       "test_level": 0,
       "unit": "nvgpu-acr"
+    },
+    {
+       "test": "netlist_init_support",
+       "test_level": 0,
+       "unit": "nvgpu-netlist"
+    },
+    {
+      "test": "netlist_query_tests",
+      "test_level": 0,
+      "unit": "nvgpu-netlist"
+    },
+    {
+      "test": "netlist_negative_tests",
+      "test_level": 0,
+      "unit": "nvgpu-netlist"
+    },
+    {
+      "test": "netlist_remove_support",
+      "test_level": 0,
+      "unit": "nvgpu-netlist"
     }
 ]

userspace/units/netlist/Makefile

@@ -0,0 +1,27 @@
+# Copyright (c) 2019, NVIDIA CORPORATION.  All rights reserved.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a
+# copy of this software and associated documentation files (the "Software"),
+# to deal in the Software without restriction, including without limitation
+# the rights to use, copy, modify, merge, publish, distribute, sublicense,
+# and/or sell copies of the Software, and to permit persons to whom the
+# Software is furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+# DEALINGS IN THE SOFTWARE.
+
+.SUFFIXES:
+
+OBJS   = nvgpu-netlist.o
+
+MODULE = nvgpu-netlist
+
+include ../Makefile.units

userspace/units/netlist/Makefile.interface.tmk

@@ -0,0 +1,29 @@
+################################### tell Emacs this is a -*- makefile-gmake -*-
+#
+# Copyright (c) 2019, NVIDIA CORPORATION.  All Rights Reserved.
+#
+# NVIDIA CORPORATION and its licensors retain all intellectual property
+# and proprietary rights in and to this software, related documentation
+# and any modifications thereto.  Any use, reproduction, disclosure or
+# distribution of this software and related documentation without an express
+# license agreement from NVIDIA CORPORATION is strictly prohibited.
+#
+# tmake for SW Mobile component makefile
+#
+# libnvgpu-fifo interface makefile fragment
+#
+###############################################################################
+
+ifdef NV_INTERFACE_FLAG_SHARED_LIBRARY_SECTION
+
+NV_INTERFACE_NAME            := nvgpu-netlist
+
+include $(NV_COMPONENT_DIR)/../Makefile.units.common.interface.tmk
+
+endif
+
+# Local Variables:
+# indent-tabs-mode: t
+# tab-width: 8
+# End:
+# vi: set tabstop=8 noexpandtab:

userspace/units/netlist/Makefile.tmk

@@ -0,0 +1,25 @@
+################################### tell Emacs this is a -*- makefile-gmake -*-
+#
+# Copyright (c) 2019 NVIDIA CORPORATION.  All Rights Reserved.
+#
+# NVIDIA CORPORATION and its licensors retain all intellectual property
+# and proprietary rights in and to this software, related documentation
+# and any modifications thereto.  Any use, reproduction, disclosure or
+# distribution of this software and related documentation without an express
+# license agreement from NVIDIA CORPORATION is strictly prohibited.
+#
+# tmake for SW Mobile component makefile
+#
+# Component makefile for compiling nvgpu-fifo common tests.
+#
+###############################################################################
+
+NVGPU_UNIT_NAME = nvgpu-netlist
+
+include $(NV_COMPONENT_DIR)/../Makefile.units.common.tmk
+
+# Local Variables:
+# indent-tabs-mode: t
+# tab-width: 8
+# End:
+# vi: set tabstop=8 noexpandtab:

userspace/units/netlist/nvgpu-netlist.c

@@ -0,0 +1,260 @@
+/*
+ * Copyright (c) 2019, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+#include <stdlib.h>
+#include <sys/types.h>
+#include <unistd.h>
+
+#include <unit/io.h>
+#include <unit/unit.h>
+
+#include <nvgpu/gk20a.h>
+#include <nvgpu/posix/io.h>
+#include <nvgpu/hal_init.h>
+#include <nvgpu/enabled.h>
+#include <nvgpu/hw/gm20b/hw_mc_gm20b.h>
+#include <nvgpu/netlist.h>
+
+#include "hal/init/hal_gv11b.h"
+#include "hal/netlist/netlist_gv11b.h"
+#include "hal/gr/falcon/gr_falcon_gm20b.h"
+
+#include "nvgpu-netlist.h"
+
+#define NV_PMC_BOOT_0_ARCHITECTURE_GV110	(0x00000015 << \
+					NVGPU_GPU_ARCHITECTURE_SHIFT)
+#define NV_PMC_BOOT_0_IMPLEMENTATION_B		0xB
+
+/*
+ * Mock I/O
+ */
+
+/*
+ * Write callback. Forward the write access to the mock IO framework.
+ */
+static void writel_access_reg_fn(struct gk20a *g,
+					struct nvgpu_reg_access *access)
+{
+	nvgpu_posix_io_writel_reg_space(g, access->addr, access->value);
+}
+
+/*
+ * Read callback. Get the register value from the mock IO framework.
+ */
+static void readl_access_reg_fn(struct gk20a *g,
+					struct nvgpu_reg_access *access)
+{
+	access->value = nvgpu_posix_io_readl_reg_space(g, access->addr);
+}
+
+static struct nvgpu_posix_io_callbacks netlist_test_reg_callbacks = {
+	.writel          = writel_access_reg_fn,
+	.writel_check    = writel_access_reg_fn,
+	.bar1_writel     = writel_access_reg_fn,
+	.usermode_writel = writel_access_reg_fn,
+	.__readl         = readl_access_reg_fn,
+	.readl           = readl_access_reg_fn,
+	.bar1_readl      = readl_access_reg_fn,
+};
+
+static bool test_netlist_fw_not_defined(void)
+{
+	return false;
+}
+
+static u32 test_gr_falcon_get_fecs_ctx_state_store_major_rev_id(struct gk20a *g)
+{
+	return 0xbad;
+}
+
+int test_netlist_init_support(struct unit_module *m,
+						struct gk20a *g, void *args)
+{
+
+	int err = 0;
+
+	nvgpu_posix_io_init_reg_space(g);
+	if (nvgpu_posix_io_add_reg_space(g, mc_boot_0_r(), 0xfff) != 0) {
+		unit_err(m, "%s: failed to create register space\n", __func__);
+		return UNIT_FAIL;
+	}
+
+	(void)nvgpu_posix_register_io(g, &netlist_test_reg_callbacks);
+
+	/*
+	 * HAL init parameters for gv11b
+	*/
+	g->params.gpu_arch = NV_PMC_BOOT_0_ARCHITECTURE_GV110;
+	g->params.gpu_impl = NV_PMC_BOOT_0_IMPLEMENTATION_B;
+
+	/*
+	 * HAL init required for getting
+	 * the falcon ops initialized.
+	 */
+	err = nvgpu_init_hal(g);
+	if (err != 0) {
+		unit_return_fail(m, "nvgpu_init_hal failed\n");
+	}
+
+	err = nvgpu_netlist_init_ctx_vars(g);
+	if (err != 0) {
+		unit_return_fail(m, "nvgpu_netlist_init_ctx_vars_fw failed\n");
+	}
+
+	return UNIT_SUCCESS;
+
+}
+
+int test_netlist_query_tests(struct unit_module *m,
+		struct gk20a *g, void *args)
+{
+	struct netlist_av_list *sw_non_ctx_load =
+		nvgpu_netlist_get_sw_non_ctx_load_av_list(g);
+	struct netlist_aiv_list *sw_ctx_load =
+		nvgpu_netlist_get_sw_ctx_load_aiv_list(g);
+	struct netlist_av_list *sw_method_init =
+			nvgpu_netlist_get_sw_method_init_av_list(g);
+	struct netlist_av_list *sw_bundle_init =
+			nvgpu_netlist_get_sw_bundle_init_av_list(g);
+	struct netlist_av_list *sw_veid_bundle_init =
+		nvgpu_netlist_get_sw_veid_bundle_init_av_list(g);
+	struct netlist_av64_list *sw_bundle64_init =
+		nvgpu_netlist_get_sw_bundle64_init_av64_list(g);
+	u32 count = 0;
+	u32 *list = NULL;
+
+	if (sw_non_ctx_load == NULL) {
+		unit_return_fail(m, "get_sw_non_ctx_load_av_list failed\n");
+	}
+
+	if (sw_ctx_load == NULL) {
+		unit_return_fail(m, "get_sw_ctx_load_aiv_list failed\n");
+	}
+
+	if (sw_method_init == NULL) {
+		unit_return_fail(m, "get_sw_method_init_av_list failed\n");
+	}
+
+	if (sw_bundle_init == NULL) {
+		unit_return_fail(m, "get_sw_bundle_init_av_list failed\n");
+	}
+
+	if (sw_veid_bundle_init == NULL) {
+		unit_return_fail(m, "get_sw_veid_bundle_init_av_list failed\n");
+	}
+
+	if (sw_bundle64_init == NULL) {
+		unit_return_fail(m, "get_sw_bundle64_init_av64_list failed\n");
+	}
+
+	count = nvgpu_netlist_get_fecs_inst_count(g);
+	if (count == 0) {
+		unit_return_fail (m, "get_fecs_inst_count failed\n");
+	}
+
+	count = nvgpu_netlist_get_fecs_data_count(g);
+	if (count == 0) {
+		unit_return_fail(m, "get_fecs_data_count failed\n");
+	}
+
+	count = nvgpu_netlist_get_gpccs_inst_count(g);
+	if (count == 0) {
+		unit_return_fail(m, "get_gpccs_inst_count failed\n");
+	}
+
+	count = nvgpu_netlist_get_gpccs_data_count(g);
+	if (count == 0) {
+		unit_return_fail(m, "get_gpccs_data_count failed\n");
+	}
+
+	list = nvgpu_netlist_get_fecs_inst_list(g);
+	if (list == NULL) {
+		unit_return_fail(m, "get_fecs_inst_list failed\n");
+	}
+
+	list = nvgpu_netlist_get_fecs_data_list(g);
+	if (list == NULL) {
+		unit_return_fail(m, "get_fecs_data_list failed\n");
+	}
+
+	list = nvgpu_netlist_get_gpccs_inst_list(g);
+	if (list == NULL) {
+		unit_return_fail(m, "get_gpccs_inst_list failed\n");
+	}
+
+	list = nvgpu_netlist_get_gpccs_data_list(g);
+	if (list == NULL) {
+		unit_return_fail(m, "get_gpccs_data_list failed\n");
+	}
+
+	return UNIT_SUCCESS;
+}
+
+int test_netlist_negative_tests(struct unit_module *m,
+		struct gk20a *g, void *args)
+{
+	int err = 0;
+
+	err = nvgpu_netlist_init_ctx_vars(g);
+	if (err != 0) {
+		unit_return_fail(m, "nvgpu_netlist_init_ctx_vars_fw failed\n");
+	}
+
+	/* unload netlist info */
+	nvgpu_netlist_deinit_ctx_vars(g);
+	/* Set up HAL for invalid netlist checks */
+	g->ops.netlist.is_fw_defined = test_netlist_fw_not_defined;
+	g->ops.gr.falcon.get_fecs_ctx_state_store_major_rev_id =
+		test_gr_falcon_get_fecs_ctx_state_store_major_rev_id;
+	err = nvgpu_netlist_init_ctx_vars(g);
+	if (err == 0) {
+		unit_return_fail(m, "nvgpu_netlist_init_ctx_vars_fw failed\n");
+	}
+	/* Restore orginal HALs */
+	g->ops.netlist.is_fw_defined = gv11b_netlist_is_firmware_defined;
+	g->ops.gr.falcon.get_fecs_ctx_state_store_major_rev_id =
+			gm20b_gr_falcon_get_fecs_ctx_state_store_major_rev_id;
+	err = nvgpu_netlist_init_ctx_vars(g);
+	if (err != 0) {
+		unit_return_fail(m, "nvgpu_netlist_init_ctx_vars_fw failed\n");
+	}
+
+	return UNIT_SUCCESS;
+}
+
+int test_netlist_remove_support(struct unit_module *m,
+		struct gk20a *g, void *args)
+{
+	nvgpu_netlist_deinit_ctx_vars(g);
+
+	return UNIT_SUCCESS;
+}
+
+struct unit_module_test nvgpu_netlist_tests[] = {
+	UNIT_TEST(netlist_init_support, test_netlist_init_support, NULL, 0),
+	UNIT_TEST(netlist_query_tests, test_netlist_query_tests, NULL, 0),
+	UNIT_TEST(netlist_negative_tests, test_netlist_negative_tests, NULL, 0),
+	UNIT_TEST(netlist_remove_support, test_netlist_remove_support, NULL, 0),
+};
+
+UNIT_MODULE(nvgpu-netlist, nvgpu_netlist_tests, UNIT_PRIO_NVGPU_TEST);
+
+

userspace/units/netlist/nvgpu-netlist.h

@@ -0,0 +1,132 @@
+/*
+ * Copyright (c) 2019, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+#ifndef UNIT_NVGPU_NETLIST_H
+#define UNIT_NVGPU_NETLIST_H
+
+#include <nvgpu/types.h>
+
+/** @addtogroup SWUTS-netlist
+ *  @{
+ *
+ * Software Unit Test Specification for netlist
+ */
+
+/**
+ * Test specification for: test_netlist_init_support
+ *
+ * Description: The netlist unit shall query and populate
+ * all ctxsw region info from ctxsw firmware.
+ *
+ * Test Type: Feature based
+ *
+ * Input: None
+ *
+ * Steps:
+ * - Initialize the test environment for netlist unit testing:
+ *   - Setup gv11b register spaces for hals to read emulated values.
+ *   - Register read/write IO callbacks.
+ *   - Setup init parameters to setup gv11b arch.
+ *   - Initialize hal to setup the hal functions.
+ * - Call nvgpu_netlist_init_ctx_vars to populate ctxsw region info
+ *   from ctxsw firmware.
+ *
+ * Output: Returns PASS if the steps above were executed successfully. FAIL
+ * otherwise.
+ */
+int test_netlist_init_support(struct unit_module *m,
+		struct gk20a *g, void *args);
+
+/**
+ * Test specification for: test_netlist_query_tests
+ *
+ * Description: This test queries data related to different
+ * ctxsw bundels and fecs/gpccs related info.
+ * Checks whether valid data is retured or not.
+ *
+ * Test Type: Feature based
+ *
+ * Input: None
+ *
+ * Steps:
+ * - Call nvgpu_netlist_get_sw_non_ctx_load_av_list
+ * - Call nvgpu_netlist_get_sw_ctx_load_aiv_list
+ * - Call nvgpu_netlist_get_sw_method_init_av_list
+ * - Call nvgpu_netlist_get_sw_bundle_init_av_list
+ * - Call nvgpu_netlist_get_sw_veid_bundle_init_av_list
+ * - Call nvgpu_netlist_get_sw_bundle64_init_av64_list
+ * - Call nvgpu_netlist_get_fecs_inst_count
+ * - Call nvgpu_netlist_get_fecs_data_count
+ * - Call nvgpu_netlist_get_gpccs_inst_count
+ * - Call nvgpu_netlist_get_gpccs_data_count
+ * - Call nvgpu_netlist_get_fecs_inst_list
+ * - Call nvgpu_netlist_get_fecs_data_list
+ * - Call nvgpu_netlist_get_gpccs_inst_list
+ * - Call nvgpu_netlist_get_gpccs_data_list
+ * Checked called functions returns correct data
+ *
+ * Output: Returns PASS if returned data is valid. FAIL otherwise.
+ */
+
+int test_netlist_query_tests(struct unit_module *m,
+		struct gk20a *g, void *args);
+
+/**
+ * Test specification for: test_netlist_negative_tests
+ *
+ * Description: This test covers negative paths in netlist init.
+ *
+ * Test Type: Feature based
+ *
+ * Input: None
+ *
+ * Steps:
+ * - Call nvgpu_netlist_init_ctx_vars after already initilized netlist
+ * - Call nvgpu_netlist_deinit_ctx_vars
+ * - Set HALs with no netlist defined and invalid netlist check
+ * - Call nvgpu_netlist_init_ctx_vars with above test HALs
+ * - Restore orginals HALs
+ * - Call nvgpu_netlist_init_ctx_vars with correct HALs
+ *
+ * Output: Returns PASS if expected result is met, FAIL otherwise.
+ */
+int test_netlist_negative_tests(struct unit_module *m,
+		struct gk20a *g, void *args);
+
+/**
+ * Test specification for: test_netlist_remove_support
+ *
+ * Description: The netlist unit removes all populated netlist
+ * region info.
+ *
+ * Test Type: Feature based
+ *
+ * Input: None
+ *
+ * Steps:
+ * - Call nvgpu_netlist_deinit_ctx_vars
+ *
+ * Output: Returns PASS
+ */
+int test_netlist_remove_support(struct unit_module *m,
+		struct gk20a *g, void *args);
+
+#endif /* UNIT_NVGPU_NETLIST_H */