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gpu: nvgpu: don't skip setting same clk in arbiter
In the current setting, clock arbiter skips setting the clock if its already set previously. The value set by the arbiter is stored in "struct nvgpu_clk_arb->actual" whenever the clock is updated via the arbiter. However, DVFS might also update the clock and the updates are not synchronized with the arbiter. Hence, ensure that any clock requests are always updated i.e. the requested rate is set even if the previous rate remains the same. In the devfreq scale() part, scale emc when clk_arb is active and skip setting of clocks. Note that this is cherry-pick from dev-main. Previously merged cherry-pick is not complete. Bug 3666615 Bug 3852824 Change-Id: I480a816434dcd59d18a287954a536fd7061c707c Signed-off-by: Debarshi Dutta <ddutta@nvidia.com> Signed-off-by: Sagar Kamble <skamble@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2822685 Reviewed-by: Ankur Kishore <ankkishore@nvidia.com> GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
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@@ -338,6 +338,8 @@ void gp10b_clk_arb_run_arbiter_cb(struct nvgpu_clk_arb *arb)
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goto exit_arb;
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}
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g->last_freq = rounded_rate;
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actual = ((NV_READ_ONCE(arb->actual)) == &arb->actual_pool[0] ?
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&arb->actual_pool[1] : &arb->actual_pool[0]);
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@@ -100,6 +100,9 @@ static void nvgpu_init_vars(struct gk20a *g)
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/* Init the clock req count to 0 */
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nvgpu_atomic_set(&g->clk_arb_global_nr, 0);
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/* Atomic set doesn't guarantee a barrier */
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nvgpu_smp_wmb();
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nvgpu_mutex_init(&l->ctrl_privs_lock);
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nvgpu_init_list_node(&l->ctrl_privs);
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@@ -163,11 +163,13 @@ static int gk20a_scale_target(struct device *dev, unsigned long *freq,
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struct devfreq *devfreq = l->devfreq;
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#endif
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unsigned long local_freq = *freq;
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unsigned long rounded_rate;
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unsigned long rounded_rate = 0;
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unsigned long min_freq = 0, max_freq = 0;
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if (nvgpu_clk_arb_has_active_req(g))
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return 0;
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if (nvgpu_clk_arb_has_active_req(g)) {
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rounded_rate = g->last_freq;
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goto post_scale;
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}
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/*
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* Calculate floor and cap frequency values
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*
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@@ -222,6 +224,7 @@ static int gk20a_scale_target(struct device *dev, unsigned long *freq,
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g->last_freq = *freq;
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post_scale:
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/* postscale will only scale emc (dram clock) if evaluating
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* gk20a_tegra_get_emc_rate() produces a new or different emc
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* target because the load or_and gpufreq has changed */
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