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gpu: nvgpu: clk: fix MISRA 10.3 issue in clk_prog

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MISRA Rule 10.3 prohibits implicit assignment of an object from a
different size type. This fixes a MISRA 10.3 violation for assigning a
u16 to a u8 in clk_prog.c.

JIRA NVGPU-1008

Change-Id: I565a4aba62dac30943d9c9d012ca0a0d6a256578
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2001227
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Philip Elcan
2019-01-22 13:57:31 -05:00
committed by mobile promotions
parent fea84c09fa
commit 69d975fcbc
1 changed files with 3 additions and 2 deletions
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3
drivers/gpu/nvgpu/common/pmu/clk/clk_prog.c
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@@ -1410,7 +1410,8 @@ static int vfflatten_prog_1x_master(struct gk20a *g,
freq_step_size_mhz =
p1xmaster->super.source_data.pll.freq_step_size_mhz;
step_count = (freq_step_size_mhz == 0U) ? 0U :
(p1xmaster->super.freq_max_mhz - *pfreqmaxlastmhz - 1U) /
(u8)(p1xmaster->super.freq_max_mhz -
*pfreqmaxlastmhz - 1U) /
freq_step_size_mhz;
/* Intentional fall-through.*/