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gpu: nvgpu: Mark read_ptimer() HAL as NON_FUSA

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Remove read_ptimer() API from safety build as GPU_GET_TIME DEVCTL got
removed. This functionality is entirely implemented inside nvrm_gpu.
Remove related unit-tests.

JIRA NVGPU-4922

Change-Id: I3c1d2e16ddf170d4f08d6bf4826ee683ea0d9e19
Signed-off-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2608654
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Tejal Kudav
2021-10-11 11:19:15 +00:00
committed by mobile promotions
parent 69ffeeaa26
commit 6a1fd53b54
15 changed files with 14 additions and 116 deletions
Download Patch File Download Diff File Expand all files Collapse all files

64
userspace/units/ptimer/nvgpu-ptimer.c
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@@ -87,7 +87,6 @@ int test_setup_env(struct unit_module *m,
struct gk20a *g, void *args)
{
/* Setup HAL */
g->ops.ptimer.read_ptimer = gk20a_read_ptimer;
g->ops.ptimer.isr = gk20a_ptimer_isr;
g->ops.cic_mon.init = gv11b_cic_mon_init;
@@ -126,68 +125,6 @@ int test_free_env(struct unit_module *m,
return UNIT_SUCCESS;
}
int test_read_ptimer(struct unit_module *m,
struct gk20a *g, void *args)
{
int ret = UNIT_SUCCESS;
u32 timer0; /* low bits */
u32 timer1; /* high bits */
u64 time;
int err; /* return from API */
/* Standard, successful, easy case where there's no wrap */
timer0 = 1;
timer1 = 2;
nvgpu_posix_io_writel_reg_space(g, timer_time_0_r(), timer0);
timer1_index = 0;
timer1_values[timer1_index] = timer1;
timer1_values[timer1_index + 1] = timer1;
err = g->ops.ptimer.read_ptimer(g, &time);
if ((err != 0) || (time != ((u64)timer1 << 32 | timer0))) {
unit_err(m, "ptimer read_timer failed simple test, err=%d, time=0x%016llx\n",
err, time);
ret = UNIT_FAIL;
}
/* Wrap timer1 once */
timer0 = 1;
nvgpu_posix_io_writel_reg_space(g, timer_time_0_r(), timer0);
timer1 = 3;
timer1_index = 0;
timer1_values[timer1_index] = timer1 + 1;
timer1_values[timer1_index + 1] = timer1;
timer1_values[timer1_index + 2] = timer1;
timer1_values[timer1_index + 3] = timer1 - 1;
err = g->ops.ptimer.read_ptimer(g, &time);
if ((err != 0) || (time != ((u64)timer1 << 32 | timer0))) {
unit_err(m, "ptimer read_timer failed single wrap test, err=%d, time=0x%016llx\n",
err, time);
ret = UNIT_FAIL;
}
/* Wrap timer1 every time to timeout */
timer0 = 1;
nvgpu_posix_io_writel_reg_space(g, timer_time_0_r(), timer0);
timer1_index = 0;
timer1_values[timer1_index] = 4;
timer1_values[timer1_index + 1] = 3;
timer1_values[timer1_index + 2] = 2;
timer1_values[timer1_index + 3] = 1;
err = g->ops.ptimer.read_ptimer(g, &time);
if (err == 0) {
unit_err(m, "ptimer read_timer failed multiple wrap test\n");
ret = UNIT_FAIL;
}
/* branch testing */
err = g->ops.ptimer.read_ptimer(g, NULL);
if (err == 0) {
unit_err(m, "ptimer read_timer failed branch test\n");
ret = UNIT_FAIL;
}
return ret;
}
static u32 received_error_code;
static void mock_decode_error_code(struct gk20a *g, u32 error_code)
@@ -315,7 +252,6 @@ int test_ptimer_scaling(struct unit_module *m,
struct unit_module_test ptimer_tests[] = {
UNIT_TEST(ptimer_setup_env, test_setup_env, NULL, 0),
UNIT_TEST(ptimer_read_ptimer, test_read_ptimer, NULL, 0),
UNIT_TEST(ptimer_isr, test_ptimer_isr, NULL, 0),
UNIT_TEST(ptimer_scaling, test_ptimer_scaling, NULL, 0),
UNIT_TEST(ptimer_free_env, test_free_env, NULL, 0),