gpu: nvgpu: Mark read_ptimer() HAL as NON_FUSA

Remove read_ptimer() API from safety build as GPU_GET_TIME DEVCTL got
removed. This functionality is entirely implemented inside nvrm_gpu.
Remove related unit-tests.

JIRA NVGPU-4922

Change-Id: I3c1d2e16ddf170d4f08d6bf4826ee683ea0d9e19
Signed-off-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2608654
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

drivers/gpu/nvgpu/hal/init/hal_ga100.c

@@ -1528,8 +1528,8 @@ static const struct gops_bus ga100_ops_bus = {
 #ifdef CONFIG_NVGPU_LS_PMU
 static const struct gops_ptimer ga100_ops_ptimer = {
 	.isr = gk20a_ptimer_isr,
-	.read_ptimer = gk20a_read_ptimer,
 #ifdef CONFIG_NVGPU_IOCTL_NON_FUSA
+	.read_ptimer = gk20a_read_ptimer,
 	.get_timestamps_zipper = nvgpu_get_timestamps_zipper,
 #endif
 #ifdef CONFIG_NVGPU_DEBUGGER

drivers/gpu/nvgpu/hal/init/hal_ga10b.c

@@ -1531,8 +1531,8 @@ static const struct gops_bus ga10b_ops_bus = {
 
 static const struct gops_ptimer ga10b_ops_ptimer = {
 	.isr = ga10b_ptimer_isr,
-	.read_ptimer = gk20a_read_ptimer,
 #ifdef CONFIG_NVGPU_IOCTL_NON_FUSA
+	.read_ptimer = gk20a_read_ptimer,
 	.get_timestamps_zipper = nvgpu_get_timestamps_zipper,
 #endif
 #ifdef CONFIG_NVGPU_DEBUGGER

drivers/gpu/nvgpu/hal/init/hal_gm20b.c

@@ -968,8 +968,8 @@ static const struct gops_bus gm20b_ops_bus = {
 
 static const struct gops_ptimer gm20b_ops_ptimer = {
 	.isr = gk20a_ptimer_isr,
-	.read_ptimer = gk20a_read_ptimer,
 #ifdef CONFIG_NVGPU_IOCTL_NON_FUSA
+	.read_ptimer = gk20a_read_ptimer,
 	.get_timestamps_zipper = nvgpu_get_timestamps_zipper,
 #endif
 };

drivers/gpu/nvgpu/hal/init/hal_gp10b.c

@@ -1059,8 +1059,8 @@ static const struct gops_bus gp10b_ops_bus = {
 
 static const struct gops_ptimer gp10b_ops_ptimer = {
 	.isr = gk20a_ptimer_isr,
-	.read_ptimer = gk20a_read_ptimer,
 #ifdef CONFIG_NVGPU_IOCTL_NON_FUSA
+	.read_ptimer = gk20a_read_ptimer,
 	.get_timestamps_zipper = nvgpu_get_timestamps_zipper,
 #endif
 #ifdef CONFIG_NVGPU_DEBUGGER

drivers/gpu/nvgpu/hal/init/hal_gv11b.c

@@ -1337,8 +1337,8 @@ static const struct gops_bus gv11b_ops_bus = {
 
 static const struct gops_ptimer gv11b_ops_ptimer = {
 	.isr = gk20a_ptimer_isr,
-	.read_ptimer = gk20a_read_ptimer,
 #ifdef CONFIG_NVGPU_IOCTL_NON_FUSA
+	.read_ptimer = gk20a_read_ptimer,
 	.get_timestamps_zipper = nvgpu_get_timestamps_zipper,
 #endif
 #ifdef CONFIG_NVGPU_DEBUGGER

drivers/gpu/nvgpu/hal/init/hal_tu104.c

@@ -1413,8 +1413,8 @@ static const struct gops_bus tu104_ops_bus = {
 #ifdef CONFIG_NVGPU_LS_PMU
 static const struct gops_ptimer tu104_ops_ptimer = {
 	.isr = gk20a_ptimer_isr,
-	.read_ptimer = gk20a_read_ptimer,
 #ifdef CONFIG_NVGPU_IOCTL_NON_FUSA
+	.read_ptimer = gk20a_read_ptimer,
 	.get_timestamps_zipper = nvgpu_get_timestamps_zipper,
 #endif
 #ifdef CONFIG_NVGPU_DEBUGGER

drivers/gpu/nvgpu/hal/ptimer/ptimer_gk20a.h

@@ -27,6 +27,8 @@
 struct gk20a;
 
 void gk20a_ptimer_isr(struct gk20a *g);
+#ifdef CONFIG_NVGPU_IOCTL_NON_FUSA
 int gk20a_read_ptimer(struct gk20a *g, u64 *value);
+#endif /* CONFIG_NVGPU_IOCTL_NON_FUSA */
 
 #endif /* PTIMER_GK20A_H */

drivers/gpu/nvgpu/hal/ptimer/ptimer_gk20a_fusa.c

@@ -75,6 +75,7 @@ void gk20a_ptimer_isr(struct gk20a *g)
 		error_addr, fecs_errcode);
 }
 
+#ifdef CONFIG_NVGPU_IOCTL_NON_FUSA
 int gk20a_read_ptimer(struct gk20a *g, u64 *value)
 {
 	const unsigned int max_iterations = 3;
@@ -115,3 +116,4 @@ int gk20a_read_ptimer(struct gk20a *g, u64 *value)
 	nvgpu_err(g, "failed to read ptimer");
 	return -EBUSY;
 }
+#endif

drivers/gpu/nvgpu/include/nvgpu/gops/ptimer.h

@@ -104,15 +104,12 @@ struct gops_ptimer {
 
 	/** @cond DOXYGEN_SHOULD_SKIP_THIS */
 
-	/**
-	 * Private HAL
-	 */
-	int (*read_ptimer)(struct gk20a *g, u64 *value);
-
 	/**
 	 * NON-FUSA HAL
 	 */
 #ifdef CONFIG_NVGPU_IOCTL_NON_FUSA
+	int (*read_ptimer)(struct gk20a *g, u64 *value);
+
 	int (*get_timestamps_zipper)(struct gk20a *g,
 			u32 source_id, u32 count,
 			struct nvgpu_cpu_time_correlation_sample *samples);

drivers/gpu/nvgpu/include/nvgpu/ptimer.h

@@ -32,10 +32,12 @@
 
 struct gk20a;
 
+#ifdef CONFIG_NVGPU_IOCTL_NON_FUSA
 struct nvgpu_cpu_time_correlation_sample {
 	u64 cpu_timestamp;
 	u64 gpu_timestamp;
 };
+#endif
 
 /**
  * @defgroup NVGPU_PTIMER_DEFINES

libs/dgpu/libnvgpu-drv-dgpu_safe.export

@@ -26,7 +26,6 @@ gk20a_mm_l2_invalidate
 gk20a_ptimer_isr
 gk20a_ramin_alloc_size
 gk20a_ramin_base_shift
-gk20a_read_ptimer
 gk20a_runlist_length_max
 gk20a_runlist_hw_submit
 gk20a_runlist_wait_pending

libs/igpu/libnvgpu-drv-igpu_safe.export

@@ -26,7 +26,6 @@ gk20a_mm_l2_invalidate
 gk20a_ptimer_isr
 gk20a_ramin_alloc_size
 gk20a_ramin_base_shift
-gk20a_read_ptimer
 gk20a_runlist_length_max
 gk20a_runlist_hw_submit
 gk20a_runlist_wait_pending

userspace/required_tests.ini

@@ -1004,7 +1004,6 @@ test_set_ppriv_timeout_settings.priv_ring_set_ppriv_timeout_settings=0
 test_free_env.ptimer_free_env=0
 test_ptimer_isr.ptimer_isr=0
 test_ptimer_scaling.ptimer_scaling=0
-test_read_ptimer.ptimer_read_ptimer=0
 test_setup_env.ptimer_setup_env=0
 
 [ramin_gk20a_fusa]

userspace/units/ptimer/nvgpu-ptimer.c

@@ -87,7 +87,6 @@ int test_setup_env(struct unit_module *m,
 			  struct gk20a *g, void *args)
 {
 	/* Setup HAL */
-	g->ops.ptimer.read_ptimer = gk20a_read_ptimer;
 	g->ops.ptimer.isr = gk20a_ptimer_isr;
 
 	g->ops.cic_mon.init = gv11b_cic_mon_init;
@@ -126,68 +125,6 @@ int test_free_env(struct unit_module *m,
 	return UNIT_SUCCESS;
 }
 
-int test_read_ptimer(struct unit_module *m,
-			struct gk20a *g, void *args)
-{
-	int ret = UNIT_SUCCESS;
-	u32 timer0; /* low bits */
-	u32 timer1; /* high bits */
-	u64 time;
-	int err; /* return from API */
-
-	/* Standard, successful, easy case where there's no wrap */
-	timer0 = 1;
-	timer1 = 2;
-	nvgpu_posix_io_writel_reg_space(g, timer_time_0_r(), timer0);
-	timer1_index = 0;
-	timer1_values[timer1_index] = timer1;
-	timer1_values[timer1_index + 1] = timer1;
-	err = g->ops.ptimer.read_ptimer(g, &time);
-	if ((err != 0) || (time != ((u64)timer1 << 32 | timer0))) {
-		unit_err(m, "ptimer read_timer failed simple test, err=%d, time=0x%016llx\n",
-			 err, time);
-		ret = UNIT_FAIL;
-	}
-
-	/* Wrap timer1 once */
-	timer0 = 1;
-	nvgpu_posix_io_writel_reg_space(g, timer_time_0_r(), timer0);
-	timer1 = 3;
-	timer1_index = 0;
-	timer1_values[timer1_index] = timer1 + 1;
-	timer1_values[timer1_index + 1] = timer1;
-	timer1_values[timer1_index + 2] = timer1;
-	timer1_values[timer1_index + 3] = timer1 - 1;
-	err = g->ops.ptimer.read_ptimer(g, &time);
-	if ((err != 0) || (time != ((u64)timer1 << 32 | timer0))) {
-		unit_err(m, "ptimer read_timer failed single wrap test, err=%d, time=0x%016llx\n",
-			 err, time);
-		ret = UNIT_FAIL;
-	}
-
-	/* Wrap timer1 every time to timeout */
-	timer0 = 1;
-	nvgpu_posix_io_writel_reg_space(g, timer_time_0_r(), timer0);
-	timer1_index = 0;
-	timer1_values[timer1_index] = 4;
-	timer1_values[timer1_index + 1] = 3;
-	timer1_values[timer1_index + 2] = 2;
-	timer1_values[timer1_index + 3] = 1;
-	err = g->ops.ptimer.read_ptimer(g, &time);
-	if (err == 0) {
-		unit_err(m, "ptimer read_timer failed multiple wrap test\n");
-		ret = UNIT_FAIL;
-	}
-
-	/* branch testing */
-	err = g->ops.ptimer.read_ptimer(g, NULL);
-	if (err == 0) {
-		unit_err(m, "ptimer read_timer failed branch test\n");
-		ret = UNIT_FAIL;
-	}
-
-	return ret;
-}
 
 static u32 received_error_code;
 static void mock_decode_error_code(struct gk20a *g, u32 error_code)
@@ -315,7 +252,6 @@ int test_ptimer_scaling(struct unit_module *m,
 
 struct unit_module_test ptimer_tests[] = {
 	UNIT_TEST(ptimer_setup_env,	test_setup_env,		NULL, 0),
-	UNIT_TEST(ptimer_read_ptimer,	test_read_ptimer,	NULL, 0),
 	UNIT_TEST(ptimer_isr,		test_ptimer_isr,	NULL, 0),
 	UNIT_TEST(ptimer_scaling,	test_ptimer_scaling,	NULL, 0),
 	UNIT_TEST(ptimer_free_env,	test_free_env,		NULL, 0),

userspace/units/ptimer/nvgpu-ptimer.h

@@ -71,44 +71,6 @@ int test_setup_env(struct unit_module *m,
 int test_free_env(struct unit_module *m,
 			struct gk20a *g, void *args);
 
-/**
- * Test specification for: test_read_ptimer
- *
- * Description: Verify the read_ptimer API.
- *
- * Test Type: Feature Based
- *
- * Targets: gops_ptimer.read_ptimer, gk20a_read_ptimer
- *
- * Input: None
- *
- * Steps:
- * - Test case where the ptimer time values do not wrap.
- *   - Write values to ptimer regs timer_time_0 and timer_time_1 in mockio
- *     register space.
- *   - Call read_timer API.
- *   - Verify the expected value is returned.
- * - Test case where ptimer time values wrap once.
- *   - Configure mockio so that the timer_time_1 register reads a different
- *     value after the 1st read, but is consistent after 2nd read.
- *   - Call read_timer API.
- *   - Verify the expected value is returned.
-  * - Test case where ptimer time values wrap once.
- *   - Configure mockio so that the timer_time_1 register reads a different
- *     value for up to 4 reads.
- *   - Call read_timer API.
- *   - Verify API returns an error.
- * - Test parameter checking of the API
- *   - Call read_timer API with a NULL pointer for the time parameter.
- *   - Verify API returns an error.
- *
- * Output:
- * - UNIT_FAIL if encounters an error creating reg space
- * - UNIT_SUCCESS otherwise
- */
-int test_read_ptimer(struct unit_module *m,
-			struct gk20a *g, void *args);
-
 /**
  * Test specification for: test_ptimer_isr
  *