nv-tegra-mirror/linux-nvgpu
1
0
Fork 0
mirror of git://nv-tegra.nvidia.com/linux-nvgpu.git synced 2025-12-22 17:36:20 +03:00
Code Issues Packages Projects Releases Wiki Activity

gpu: nvgpu: add test case target functions

Browse Source 
Add the target function names for posix unit tests.

Jira NVGPU-4478

Change-Id: I393c3d6ba99c96e54812e29dedc8abfe7afcebab
Signed-off-by: ajesh <akv@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2276656
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
ajesh
2020-01-09 20:10:15 +05:30
committed by Alex Waterman
parent 796781313e
commit 6afd472abe
9 changed files with 158 additions and 10 deletions
Download Patch File Download Diff File Expand all files Collapse all files

54
userspace/units/interface/atomic/atomic.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -39,6 +39,9 @@ struct unit_module;
*
* Test Type: Feature
*
* Targets: nvgpu_atomic_set, nvgpu_atomic64_set,
* nvgpu_atomic_read, nvgpu_atomic64_read
*
* Input: struct atomic_test_args passed via the __args parameter.
*
* Steps:
@@ -59,6 +62,20 @@ int test_atomic_set_and_read(struct unit_module *m,
*
* Test Type: Feature
*
* Targets: nvgpu_atomic_inc, nvgpu_atomic64_inc,
* nvgpu_atomic_inc_return, nvgpu_atomic64_inc_return,
* nvgpu_atomic_inc_and_test, nvgpu_atomic64_inc_and_test,
* nvgpu_atomic_dec, nvgpu_atomic64_dec,
* nvgpu_atomic_dec_return, nvgpu_atomic64_dec_return,
* nvgpu_atomic_dec_and_test, nvgpu_atomic64_dec_and_test,
* nvgpu_atomic_add, nvgpu_atomic64_add,
* nvgpu_atomic_add_return, nvgpu_atomic64_add_return,
* nvgpu_atomic_sub, nvgpu_atomic64_sub,
* nvgpu_atomic_sub_return, nvgpu_atomic64_sub_return,
* nvgpu_atomic_sub_and_test, nvgpu_atomic64_sub_and_test,
* nvgpu_atomic_read, nvgpu_atomic64_read,
* nvgpu_atomic_set, nvgpu_atomic64_set
*
* Input: struct atomic_test_args passed via the __args parameter.
* For *_and_test ops, the args should make sure the loop traverses
* across 0 to test the "test" part.
@@ -82,6 +99,19 @@ int test_atomic_arithmetic(struct unit_module *m,
*
* Test Type: Feature
*
* Targets: nvgpu_atomic_cmpxchg, nvgpu_atomic64_cmpxchg,
* nvgpu_atomic_inc, nvgpu_atomic64_inc,
* nvgpu_atomic_inc_and_test, nvgpu_atomic64_inc_and_test,
* nvgpu_atomic_dec, nvgpu_atomic64_dec,
* nvgpu_atomic_dec_and_test, nvgpu_atomic64_dec_and_test,
* nvgpu_atomic_add, nvgpu_atomic64_add,
* nvgpu_atomic_add_return, nvgpu_atomic64_add_return,
* nvgpu_atomic_sub, nvgpu_atomic64_sub,
* nvgpu_atomic_sub_and_test, nvgpu_atomic64_sub_and_test,
* nvgpu_atomic_read, nvgpu_atomic64_read,
* nvgpu_atomic_set, nvgpu_atomic64_set,
* nvgpu_atomic_add_unless, nvgpu_atomic64_add_unless
*
* Input: struct atomic_test_args passed via the __args parameter.
*
* Steps:
@@ -105,6 +135,12 @@ int test_atomic_arithmetic_threaded(struct unit_module *m,
*
* Test Type: Feature
*
* Targets: nvgpu_atomic_inc_and_test, nvgpu_atomic64_inc_and_test,
* nvgpu_atomic_dec_and_test, nvgpu_atomic64_dec_and_test,
* nvgpu_atomic_sub_and_test, nvgpu_atomic64_sub_and_test,
* nvgpu_atomic_read, nvgpu_atomic64_read,
* nvgpu_atomic_set, nvgpu_atomic64_set
*
* Input: struct atomic_test_args passed via the __args parameter.
*
* Steps:
@@ -129,6 +165,10 @@ int test_atomic_arithmetic_and_test_threaded(struct unit_module *m,
*
* Test Type: Feature
*
* Targets: nvgpu_atomic_xchg, nvgpu_atomic64_xchg,
* nvgpu_atomic_set, nvgpu_atomic64_set,
* nvgpu_atomic_read, nvgpu_atomic64_read
*
* Input: struct atomic_test_args passed via the __args parameter.
*
* Steps:
@@ -148,6 +188,10 @@ int test_atomic_xchg(struct unit_module *m,
*
* Test Type: Feature
*
* Targets: nvgpu_atomic_xchg, nvgpu_atomic64_xchg,
* nvgpu_atomic_set, nvgpu_atomic64_set,
* nvgpu_atomic_read, nvgpu_atomic64_read
*
* Input: struct atomic_test_args passed via the __args parameter.
*
* Steps:
@@ -170,6 +214,10 @@ int test_atomic_xchg_threaded(struct unit_module *m,
*
* Test Type: Feature
*
* Targets: nvgpu_atomic_cmpxchg, nvgpu_atomic64_cmpxchg,
* nvgpu_atomic_set, nvgpu_atomic64_set,
* nvgpu_atomic_read, nvgpu_atomic64_read
*
* Input: struct atomic_test_args passed via the __args parameter.
*
* Steps:
@@ -189,6 +237,8 @@ int test_atomic_cmpxchg(struct unit_module *m,
*
* Test Type: Feature
*
* Targets: nvgpu_atomic_add_unless, nvgpu_atomic64_add_unless
*
* Input: struct atomic_test_args passed via the __args parameter.
*
* Steps:
@@ -202,4 +252,4 @@ int test_atomic_cmpxchg(struct unit_module *m,
int test_atomic_add_unless(struct unit_module *m,
struct gk20a *g, void *__args);
#endif /* UNIT_INTERFACE_ATOMIC_H */
#endif /* UNIT_INTERFACE_ATOMIC_H */

14
userspace/units/interface/lock/lock.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -49,6 +49,8 @@ struct unit_module;
*
* Test Type: Feature
*
* Targets: nvgpu_mutex_init, nvgpu_mutex_destroy
*
* Input: None
*
* Steps:
@@ -67,6 +69,10 @@ int test_mutex_init(struct unit_module *m, struct gk20a *g, void *args);
*
* Test Type: Feature
*
* Targets: nvgpu_mutex_init, nvgpu_mutex_acquire, nvgpu_mutex_tryacquire,
* nvgpu_mutex_release, nvgpu_mutex_destroy,
* nvgpu_posix_lock_try_acquire, nvgpu_posix_lock_release
*
* Input: None
*
* Steps:
@@ -93,6 +99,12 @@ int test_mutex_tryacquire(struct unit_module *m, struct gk20a *g, void *args);
*
* Test Type: Feature
*
* Targets: nvgpu_mutex_init, nvgpu_spinlock_init, nvgpu_raw_spinlock_init,
* nvgpu_mutex_acquire, nvgpu_spinlock_acquire,
* nvgpu_raw_spinlock_acquire, nvgpu_mutex_release,
* nvgpu_spinlock_release, nvgpu_raw_spinlock_release,
* nvgpu_posix_lock_acquire, nvgpu_posix_lock_release
*
* Input: @param args [in] Type of lock as defined by TYPE_* macros.
*
* Steps: