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gpu: nvgpu: add test case target functions

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Add the target function names for posix unit tests.

Jira NVGPU-4478

Change-Id: I393c3d6ba99c96e54812e29dedc8abfe7afcebab
Signed-off-by: ajesh <akv@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2276656
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
ajesh
2020-01-09 20:10:15 +05:30
committed by Alex Waterman
parent 796781313e
commit 6afd472abe
9 changed files with 158 additions and 10 deletions
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54
userspace/units/interface/atomic/atomic.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -39,6 +39,9 @@ struct unit_module;
*
* Test Type: Feature
*
* Targets: nvgpu_atomic_set, nvgpu_atomic64_set,
* nvgpu_atomic_read, nvgpu_atomic64_read
*
* Input: struct atomic_test_args passed via the __args parameter.
*
* Steps:
@@ -59,6 +62,20 @@ int test_atomic_set_and_read(struct unit_module *m,
*
* Test Type: Feature
*
* Targets: nvgpu_atomic_inc, nvgpu_atomic64_inc,
* nvgpu_atomic_inc_return, nvgpu_atomic64_inc_return,
* nvgpu_atomic_inc_and_test, nvgpu_atomic64_inc_and_test,
* nvgpu_atomic_dec, nvgpu_atomic64_dec,
* nvgpu_atomic_dec_return, nvgpu_atomic64_dec_return,
* nvgpu_atomic_dec_and_test, nvgpu_atomic64_dec_and_test,
* nvgpu_atomic_add, nvgpu_atomic64_add,
* nvgpu_atomic_add_return, nvgpu_atomic64_add_return,
* nvgpu_atomic_sub, nvgpu_atomic64_sub,
* nvgpu_atomic_sub_return, nvgpu_atomic64_sub_return,
* nvgpu_atomic_sub_and_test, nvgpu_atomic64_sub_and_test,
* nvgpu_atomic_read, nvgpu_atomic64_read,
* nvgpu_atomic_set, nvgpu_atomic64_set
*
* Input: struct atomic_test_args passed via the __args parameter.
* For *_and_test ops, the args should make sure the loop traverses
* across 0 to test the "test" part.
@@ -82,6 +99,19 @@ int test_atomic_arithmetic(struct unit_module *m,
*
* Test Type: Feature
*
* Targets: nvgpu_atomic_cmpxchg, nvgpu_atomic64_cmpxchg,
* nvgpu_atomic_inc, nvgpu_atomic64_inc,
* nvgpu_atomic_inc_and_test, nvgpu_atomic64_inc_and_test,
* nvgpu_atomic_dec, nvgpu_atomic64_dec,
* nvgpu_atomic_dec_and_test, nvgpu_atomic64_dec_and_test,
* nvgpu_atomic_add, nvgpu_atomic64_add,
* nvgpu_atomic_add_return, nvgpu_atomic64_add_return,
* nvgpu_atomic_sub, nvgpu_atomic64_sub,
* nvgpu_atomic_sub_and_test, nvgpu_atomic64_sub_and_test,
* nvgpu_atomic_read, nvgpu_atomic64_read,
* nvgpu_atomic_set, nvgpu_atomic64_set,
* nvgpu_atomic_add_unless, nvgpu_atomic64_add_unless
*
* Input: struct atomic_test_args passed via the __args parameter.
*
* Steps:
@@ -105,6 +135,12 @@ int test_atomic_arithmetic_threaded(struct unit_module *m,
*
* Test Type: Feature
*
* Targets: nvgpu_atomic_inc_and_test, nvgpu_atomic64_inc_and_test,
* nvgpu_atomic_dec_and_test, nvgpu_atomic64_dec_and_test,
* nvgpu_atomic_sub_and_test, nvgpu_atomic64_sub_and_test,
* nvgpu_atomic_read, nvgpu_atomic64_read,
* nvgpu_atomic_set, nvgpu_atomic64_set
*
* Input: struct atomic_test_args passed via the __args parameter.
*
* Steps:
@@ -129,6 +165,10 @@ int test_atomic_arithmetic_and_test_threaded(struct unit_module *m,
*
* Test Type: Feature
*
* Targets: nvgpu_atomic_xchg, nvgpu_atomic64_xchg,
* nvgpu_atomic_set, nvgpu_atomic64_set,
* nvgpu_atomic_read, nvgpu_atomic64_read
*
* Input: struct atomic_test_args passed via the __args parameter.
*
* Steps:
@@ -148,6 +188,10 @@ int test_atomic_xchg(struct unit_module *m,
*
* Test Type: Feature
*
* Targets: nvgpu_atomic_xchg, nvgpu_atomic64_xchg,
* nvgpu_atomic_set, nvgpu_atomic64_set,
* nvgpu_atomic_read, nvgpu_atomic64_read
*
* Input: struct atomic_test_args passed via the __args parameter.
*
* Steps:
@@ -170,6 +214,10 @@ int test_atomic_xchg_threaded(struct unit_module *m,
*
* Test Type: Feature
*
* Targets: nvgpu_atomic_cmpxchg, nvgpu_atomic64_cmpxchg,
* nvgpu_atomic_set, nvgpu_atomic64_set,
* nvgpu_atomic_read, nvgpu_atomic64_read
*
* Input: struct atomic_test_args passed via the __args parameter.
*
* Steps:
@@ -189,6 +237,8 @@ int test_atomic_cmpxchg(struct unit_module *m,
*
* Test Type: Feature
*
* Targets: nvgpu_atomic_add_unless, nvgpu_atomic64_add_unless
*
* Input: struct atomic_test_args passed via the __args parameter.
*
* Steps:
@@ -202,4 +252,4 @@ int test_atomic_cmpxchg(struct unit_module *m,
int test_atomic_add_unless(struct unit_module *m,
struct gk20a *g, void *__args);
#endif /* UNIT_INTERFACE_ATOMIC_H */
#endif /* UNIT_INTERFACE_ATOMIC_H */

14
userspace/units/interface/lock/lock.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -49,6 +49,8 @@ struct unit_module;
*
* Test Type: Feature
*
* Targets: nvgpu_mutex_init, nvgpu_mutex_destroy
*
* Input: None
*
* Steps:
@@ -67,6 +69,10 @@ int test_mutex_init(struct unit_module *m, struct gk20a *g, void *args);
*
* Test Type: Feature
*
* Targets: nvgpu_mutex_init, nvgpu_mutex_acquire, nvgpu_mutex_tryacquire,
* nvgpu_mutex_release, nvgpu_mutex_destroy,
* nvgpu_posix_lock_try_acquire, nvgpu_posix_lock_release
*
* Input: None
*
* Steps:
@@ -93,6 +99,12 @@ int test_mutex_tryacquire(struct unit_module *m, struct gk20a *g, void *args);
*
* Test Type: Feature
*
* Targets: nvgpu_mutex_init, nvgpu_spinlock_init, nvgpu_raw_spinlock_init,
* nvgpu_mutex_acquire, nvgpu_spinlock_acquire,
* nvgpu_raw_spinlock_acquire, nvgpu_mutex_release,
* nvgpu_spinlock_release, nvgpu_raw_spinlock_release,
* nvgpu_posix_lock_acquire, nvgpu_posix_lock_release
*
* Input: @param args [in] Type of lock as defined by TYPE_* macros.
*
* Steps:

24
userspace/units/posix/bitops/posix-bitops.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -39,6 +39,8 @@ struct unit_module;
*
* Test Type: Other - informational
*
* Targets: None
*
* Input: None
*
* Steps:
@@ -56,6 +58,8 @@ int test_bitmap_info(struct unit_module *m, struct gk20a *g, void *args);
*
* Test Type: Feature, Boundary values
*
* Targets: nvgpu_ffs
*
* Input: None
*
* Steps:
@@ -79,6 +83,8 @@ int test_ffs(struct unit_module *m, struct gk20a *g, void *args);
*
* Test Type: Feature, Boundary values
*
* Targets: nvgpu_fls
*
* Input: None
*
* Steps:
@@ -101,6 +107,8 @@ int test_fls(struct unit_module *m, struct gk20a *g, void *args);
*
* Test Type: Feature, Boundary values
*
* Targets: ffz
*
* Input: None
*
* Steps:
@@ -121,6 +129,8 @@ int test_ffz(struct unit_module *m, struct gk20a *g, void *args);
*
* Test Type: Feature, Boundary values
*
* Targets: find_first_zero_bit, find_first_bit
*
* Input: Pointer to struct test_find_bit_args as function parameter.
* - The parameter test_find_bit_args is used to select between testing of:
* - find_first_zero_bit()
@@ -149,6 +159,8 @@ int test_find_first_bit(struct unit_module *m, struct gk20a *g, void *__args);
*
* Test Type: Feature, Boundary values
*
* Targets: find_next_bit
*
* Input: None.
*
* Steps:
@@ -177,6 +189,8 @@ int test_find_next_bit(struct unit_module *m, struct gk20a *g, void *__args);
*
* Test Type: Feature, Boundary values
*
* Targets: bitmap_find_next_zero_area_off
*
* Input: None.
*
* Steps:
@@ -252,6 +266,8 @@ int test_find_zero_area(struct unit_module *m, struct gk20a *g, void *unused);
*
* Test Type: Feature
*
* Targets: nvgpu_set_bit, nvgpu_clear_bit, nvgpu_test_bit
*
* Input: None.
*
* Steps:
@@ -278,6 +294,8 @@ int test_single_bitops(struct unit_module *m, struct gk20a *g, void *__args);
*
* Test Type: Feature
*
* Targets: nvgpu_set_bit, nvgpu_clear_bit
*
* Input: Pointer to struct test_find_bit_args as function parameter.
* - The parameter test_find_bit_args is used to select between testing of:
* - nvgpu_clear_bit()
@@ -303,6 +321,8 @@ int test_bit_setclear(struct unit_module *m, struct gk20a *g, void *__args);
*
* Test Type: Feature
*
* Targets: nvgpu_test_and_clear_bit, nvgpu_test_and_set_bit
*
* Input: Pointer to struct test_find_bit_args as function parameter.
* - The parameter test_find_bit_args is used to select between testing of:
* - nvgpu_test_and_clear_bit()
@@ -338,6 +358,8 @@ int test_test_and_setclear_bit(struct unit_module *m, struct gk20a *g,
*
* Test Type: Feature
*
* Targets: nvgpu_bitmap_clear, nvgpu_bitmap_set
*
* Input: Pointer to struct test_find_bit_args as function parameter.
* - The parameter test_find_bit_args is used to select between testing of:
* - nvgpu_bitmap_clear()

13
userspace/units/posix/cond/posix-cond.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -37,6 +37,8 @@
*
* Test Type: Feature
*
* Targets: nvgpu_cond_init, nvgpu_cond_destroy
*
* Inputs:
* 1) Global instance of struct nvgpu_cond.
*
@@ -75,6 +77,15 @@ int test_cond_init_destroy(struct unit_module *m,
*
* Test Type: Feature
*
* Targets: nvgpu_cond_signal, nvgpu_cond_signal_locked,
* nvgpu_cond_broadcast, nvgpu_cond_broadcast_locked,
* nvgpu_cond_signal_interruptible,
* nvgpu_cond_broadcast_interruptible,
* nvgpu_cond_lock, nvgpu_cond_unlock, nvgpu_cond_timedwait,
* NVGPU_COND_WAIT, NVGPU_COND_WAIT_LOCKED,
* NVGPU_COND_WAIT_INTERRUPTIBLE,
* NVGPU_COND_WAIT_TIMEOUT_LOCKED
*
* Inputs:
* 1) Global instance of struct nvgpu_cond.
* 2) Global array test_code.

18
userspace/units/posix/kmem/posix-kmem.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -37,6 +37,8 @@
*
* Test Type: Feature
*
* Targets: nvgpu_kmem_cache_create, nvgpu_kmem_cache_destroy
*
* Inputs:
* 1) GPU driver struct g.
* 2) Global define for cache size to alloc.
@@ -68,6 +70,9 @@ int test_kmem_cache_create(struct unit_module *m,
*
* Test Type: Feature
*
* Targets: nvgpu_kmem_cache_create, nvgpu_kmem_cache_alloc,
* nvgpu_kmem_cache_free, nvgpu_kmem_cache_destroy
*
* Inputs:
* 1) GPU driver struct g.
* 2) Global define for cache size to alloc.
@@ -101,6 +106,8 @@ int test_kmem_cache_alloc(struct unit_module *m,
*
* Test Type: Feature
*
* Targets: nvgpu_kmalloc_impl, nvgpu_kfree_impl
*
* Inputs:
* 1) GPU driver struct g.
* 2) Global define for size to alloc.
@@ -126,6 +133,8 @@ int test_kmem_kmalloc(struct unit_module *m,
*
* Test Type: Feature
*
* Targets: nvgpu_kzalloc_impl, nvgpu_kfree_impl
*
* Inputs:
* 1) GPU driver struct g.
* 2) Global define for size to alloc.
@@ -153,6 +162,8 @@ int test_kmem_kzalloc(struct unit_module *m,
*
* Test Type: Feature
*
* Targets: nvgpu_kcalloc_impl, nvgpu_kfree_impl
*
* Inputs:
* 1) GPU driver struct g.
* 2) Global define for size to alloc.
@@ -181,6 +192,9 @@ int test_kmem_kcalloc(struct unit_module *m,
*
* Test Type: Feature
*
* Targets: nvgpu_vmalloc_impl, nvgpu_vfree_impl,
* nvgpu_vzalloc_impl
*
* Inputs:
* 1) GPU driver struct g.
* 2) Global define for cache size to alloc.
@@ -215,6 +229,8 @@ int test_kmem_virtual_alloc(struct unit_module *m,
*
* Test Type: Feature
*
* Targets: nvgpu_big_alloc_impl, nvgpu_big_free
*
* Inputs:
* 1) GPU driver struct g.
* 2) Global define for cache size to alloc.

8
userspace/units/posix/os_sched/posix-ossched.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -39,6 +39,8 @@
*
* Test Type: Feature
*
* Targets: nvgpu_current_pid
*
* Inputs:
*
* Steps:
@@ -61,6 +63,8 @@ int test_current_pid(struct unit_module *m,
*
* Test Type: Feature
*
* Targets: nvgpu_current_tid
*
* Inputs:
*
* Steps:
@@ -83,6 +87,8 @@ int test_current_tid(struct unit_module *m,
*
* Test Type: Feature
*
* Targets: nvgpu_print_current, nvgpu_print_current_impl
*
* Inputs:
*
* Steps:

10
userspace/units/posix/rwsem/posix-rwsem.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -38,6 +38,8 @@
*
* Test Type: Feature
*
* Targets: nvgpu_rwsem_init
*
* Inputs:
* 1) Global nvgpu_rwsem instance.
*
@@ -60,6 +62,9 @@ int test_rwsem_init(struct unit_module *m,
*
* Test Type: Feature
*
* Targets: nvgpu_rwsem_init, nvgpu_rwsem_down_read,
* nvgpu_rwsem_up_read
*
* Inputs:
* 1) Global nvgpu_rwsem instance.
* 2) Global test_data instance.
@@ -111,6 +116,9 @@ int test_rwsem_read(struct unit_module *m,
*
* Test Type: Feature
*
* Targets: nvgpu_rwsem_init, nvgpu_rwsem_down_write,
* nvgpu_rwsem_up_write
*
* Inputs:
* 1) Global nvgpu_rwsem instance.
* 2) Global test_data instance.

6
userspace/units/posix/thread/posix-thread.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -88,6 +88,10 @@ struct unit_test_thread_data test_data;
*
* Test Type: Feature
*
* Targets: nvgpu_thread_create, nvgpu_thread_create_priority,
* nvgpu_thread_is_running, nvgpu_thread_stop,
* nvgpu_thread_stop_graceful, nvgpu_thread_should_stop,
* nvgpu_thread_join
* Inputs:
* 1) Pointer to test_thread_args as function parameter
* 2) Global instance of struct nvgpu_thread

21
userspace/units/posix/timers/posix-timers.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -36,6 +36,8 @@
*
* Test Type: Feature
*
* Targets: nvgpu_timeout_init
*
* Inputs:
* 1) The type of timer to be tested is passed as an argument to the test.
* 2) Global defines for flag and duration values.
@@ -67,6 +69,8 @@ int test_timer_init(struct unit_module *m,
*
* Test Type: Boundary values
*
* Targets: nvgpu_timeout_init
*
* Inputs:
* 1) Global nvgpu_timeout structure instance.
*
@@ -94,6 +98,9 @@ int test_timer_init_err(struct unit_module *m,
*
* Test Type: Feature
*
* Targets: nvgpu_timeout_init, nvgpu_timeout_expired,
* nvgpu_timeout_peek_expired
*
* Input:
* 1) Global nvgpu_timeout structure instance.
* 2) Global defines for flag and duration parameters.
@@ -124,6 +131,9 @@ int test_timer_counter(struct unit_module *m,
*
* Test Type: Feature
*
* Targets: nvgpu_timeout_init, nvgpu_timeout_expired,
* nvgpu_timeout_peek_expired
*
* Input:
* 1) Global nvgpu_timeout structure instance.
* 2) Global defines for flag and duration parameters.
@@ -153,6 +163,9 @@ int test_timer_duration(struct unit_module *m,
*
* Test Type: Feature
*
* Targets: nvgpu_current_time_us, nvgpu_udelay,
* nvgpu_usleep_range
*
* Input: None.
*
* Steps:
@@ -185,6 +198,8 @@ int test_timer_delay(struct unit_module *m,
*
* Test Type: Feature
*
* Targets: nvgpu_current_time_ms, nvgpu_msleep
*
* Input: None.
*
* Steps:
@@ -210,6 +225,8 @@ int test_timer_msleep(struct unit_module *m,
*
* Test Type: Feature
*
* Targets: nvgpu_hr_timestamp
*
* Input: None.
*
* Steps:
@@ -239,6 +256,8 @@ int test_timer_hrtimestamp(struct unit_module *m,
*
* Test Type: Feature
*
* Targets: nvgpu_current_time_ms, nvgpu_current_time_ns
*
* Input: None.
*
* Steps: