From 6b2c080f8f9af987b3dadd3d343f4ebeb226aa21 Mon Sep 17 00:00:00 2001 From: prsethi Date: Tue, 7 Mar 2023 12:19:48 +0000 Subject: [PATCH] gpu:nvgpu: add enable flag for KMD_SCHEDULING_WORKER_THREAD support Currently KMD_SCHEDULING_WORKER_THREAD can be enabled/disabled using compile time flag but this flag does give ability to control the feature based on the chip. GSP is enabled only on ga10b where KMD_SCHEDULING_WORKER_THREAD should be disabled while should be enabled for other chips at the same time to support GVS tests. Change adds enabled flag to control KMD_SCHEDULING_WORKER_THREAD based on the chip. Bug 3935433 Change-Id: I9d2f34cf172d22472bdc4614073d1fb88ea204d7 Signed-off-by: prsethi Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2867023 Tested-by: mobile promotions Reviewed-by: mobile promotions --- drivers/gpu/nvgpu/common/fifo/runlist.c | 38 ++++++++------ drivers/gpu/nvgpu/common/init/nvgpu_init.c | 4 +- drivers/gpu/nvgpu/common/nvs/nvs_sched.c | 38 ++++++++------ drivers/gpu/nvgpu/common/nvs/nvs_sched_ctrl.c | 52 ++++++++++--------- drivers/gpu/nvgpu/hal/init/hal_ga100.c | 6 +++ drivers/gpu/nvgpu/hal/init/hal_ga10b.c | 6 +++ drivers/gpu/nvgpu/hal/init/hal_gm20b.c | 6 +++ drivers/gpu/nvgpu/hal/init/hal_gv11b.c | 6 +++ drivers/gpu/nvgpu/hal/init/hal_tu104.c | 6 +++ drivers/gpu/nvgpu/hal/rc/rc_gv11b.c | 14 ++--- drivers/gpu/nvgpu/include/nvgpu/enabled.h | 2 + 11 files changed, 115 insertions(+), 63 deletions(-) diff --git a/drivers/gpu/nvgpu/common/fifo/runlist.c b/drivers/gpu/nvgpu/common/fifo/runlist.c index 0554d6dd7..369383384 100644 --- a/drivers/gpu/nvgpu/common/fifo/runlist.c +++ b/drivers/gpu/nvgpu/common/fifo/runlist.c @@ -602,11 +602,15 @@ int nvgpu_runlist_reschedule(struct nvgpu_channel *ch, bool preempt_next, * and can be disabled. */ #if defined(CONFIG_KMD_SCHEDULING_WORKER_THREAD) - ret = g->nvs_worker_submit(g, runlist, runlist->domain, wait_preempt); - if (ret == 1) { - ret = 0; - } else if (ret != 0) { - goto done; + if (nvgpu_is_enabled(g, NVGPU_SUPPORT_KMD_SCHEDULING_WORKER_THREAD)) { + ret = g->nvs_worker_submit(g, runlist, runlist->domain, wait_preempt); + if (ret == 1) { + ret = 0; + } else if (ret != 0) { + goto done; + } + } else { + ret = nvgpu_rl_domain_sync_submit(g, runlist, runlist->domain, wait_preempt); } #endif /* CONFIG_KMD_SCHEDULING_WORKER_THREAD */ /* @@ -683,16 +687,20 @@ static int nvgpu_runlist_do_update(struct gk20a *g, struct nvgpu_runlist *rl, * and can be disabled. */ #if defined(CONFIG_KMD_SCHEDULING_WORKER_THREAD) - if ((domain != NULL) && (domain->domain_id != SHADOW_DOMAIN_ID)) { - domain->remove = !add; - rl_dbg(g, "domain-id %llu is_remove %d", - domain->domain_id, domain->remove); - } + if (nvgpu_is_enabled(g, NVGPU_SUPPORT_KMD_SCHEDULING_WORKER_THREAD)) { + if ((domain != NULL) && (domain->domain_id != SHADOW_DOMAIN_ID)) { + domain->remove = !add; + rl_dbg(g, "domain-id %llu is_remove %d", + domain->domain_id, domain->remove); + } - ret = g->nvs_worker_submit(g, rl, domain, wait_for_finish); - /* Deferred Update */ - if (ret == 1) { - ret = 0; + ret = g->nvs_worker_submit(g, rl, domain, wait_for_finish); + /* Deferred Update */ + if (ret == 1) { + ret = 0; + } + } else { + ret = nvgpu_rl_domain_sync_submit(g, rl, domain, wait_for_finish); } #endif /* CONFIG_KMD_SCHEDULING_WORKER_THREAD */ /* @@ -1446,4 +1454,4 @@ u32 nvgpu_runlist_get_num_runlists(struct gk20a *g) struct nvgpu_runlist_domain *nvgpu_runlist_get_shadow_domain(struct gk20a *g) { return g->fifo.active_runlists[0].shadow_rl_domain; -} \ No newline at end of file +} diff --git a/drivers/gpu/nvgpu/common/init/nvgpu_init.c b/drivers/gpu/nvgpu/common/init/nvgpu_init.c index c365b5011..b976d2f5e 100644 --- a/drivers/gpu/nvgpu/common/init/nvgpu_init.c +++ b/drivers/gpu/nvgpu/common/init/nvgpu_init.c @@ -321,7 +321,9 @@ int nvgpu_prepare_poweroff(struct gk20a *g) #ifdef CONFIG_KMD_SCHEDULING_WORKER_THREAD /* Ensure that thread is paused before Engines suspend below */ - nvgpu_nvs_worker_pause(g); + if (nvgpu_is_enabled(g, NVGPU_SUPPORT_KMD_SCHEDULING_WORKER_THREAD)) { + nvgpu_nvs_worker_pause(g); + } #endif #ifdef CONFIG_NVGPU_LS_PMU diff --git a/drivers/gpu/nvgpu/common/nvs/nvs_sched.c b/drivers/gpu/nvgpu/common/nvs/nvs_sched.c index 43d451066..180f2643f 100644 --- a/drivers/gpu/nvgpu/common/nvs/nvs_sched.c +++ b/drivers/gpu/nvgpu/common/nvs/nvs_sched.c @@ -710,7 +710,9 @@ int nvgpu_nvs_open(struct gk20a *g) /* resuming from railgate */ nvgpu_mutex_release(&g->sched_mutex); #ifdef CONFIG_KMD_SCHEDULING_WORKER_THREAD - nvgpu_nvs_worker_resume(g); + if (nvgpu_is_enabled(g, NVGPU_SUPPORT_KMD_SCHEDULING_WORKER_THREAD)) { + nvgpu_nvs_worker_resume(g); + } #endif return err; } @@ -757,23 +759,25 @@ int nvgpu_nvs_open(struct gk20a *g) nvgpu_wmb(); #ifdef CONFIG_KMD_SCHEDULING_WORKER_THREAD - err = nvgpu_nvs_worker_init(g); - if (err != 0) { - nvgpu_nvs_remove_shadow_domain(g); - goto unlock; - } - - g->nvs_worker_submit = nvgpu_nvs_worker_submit; -unlock: - if (err) { - nvs_dbg(g, " Failed! Error code: %d", err); - if (g->scheduler) { - nvgpu_kfree(g, g->scheduler->sched); - nvgpu_kfree(g, g->scheduler); - g->scheduler = NULL; + if (nvgpu_is_enabled(g, NVGPU_SUPPORT_KMD_SCHEDULING_WORKER_THREAD)) { + err = nvgpu_nvs_worker_init(g); + if (err != 0) { + nvgpu_nvs_remove_shadow_domain(g); + goto unlock; + } + + g->nvs_worker_submit = nvgpu_nvs_worker_submit; +unlock: + if (err) { + nvs_dbg(g, " Failed! Error code: %d", err); + if (g->scheduler) { + nvgpu_kfree(g, g->scheduler->sched); + nvgpu_kfree(g, g->scheduler); + g->scheduler = NULL; + } + if (g->sched_ctrl_fifo) + nvgpu_nvs_ctrl_fifo_destroy(g); } - if (g->sched_ctrl_fifo) - nvgpu_nvs_ctrl_fifo_destroy(g); } #endif diff --git a/drivers/gpu/nvgpu/common/nvs/nvs_sched_ctrl.c b/drivers/gpu/nvgpu/common/nvs/nvs_sched_ctrl.c index 24a7847c6..94eadfad9 100644 --- a/drivers/gpu/nvgpu/common/nvs/nvs_sched_ctrl.c +++ b/drivers/gpu/nvgpu/common/nvs/nvs_sched_ctrl.c @@ -540,20 +540,22 @@ int nvgpu_nvs_buffer_alloc(struct nvgpu_nvs_domain_ctrl_fifo *sched_ctrl, } #ifdef CONFIG_KMD_SCHEDULING_WORKER_THREAD - if (mask == NVGPU_NVS_CTRL_FIFO_QUEUE_EXCLUSIVE_CLIENT_WRITE) { - send_queue_receiver = nvs_control_fifo_receiver_initialize(g, - (struct nvs_domain_msg_fifo * const)buf->mem.cpu_va, bytes); - if (send_queue_receiver == NULL) { - goto fail; + if (nvgpu_is_enabled(g, NVGPU_SUPPORT_KMD_SCHEDULING_WORKER_THREAD)) { + if (mask == NVGPU_NVS_CTRL_FIFO_QUEUE_EXCLUSIVE_CLIENT_WRITE) { + send_queue_receiver = nvs_control_fifo_receiver_initialize(g, + (struct nvs_domain_msg_fifo * const)buf->mem.cpu_va, bytes); + if (send_queue_receiver == NULL) { + goto fail; + } + nvgpu_nvs_domain_ctrl_fifo_set_receiver(g, send_queue_receiver); + } else if (mask == NVGPU_NVS_CTRL_FIFO_QUEUE_EXCLUSIVE_CLIENT_READ) { + receiver_queue_sender = nvs_control_fifo_sender_initialize(g, + (struct nvs_domain_msg_fifo *)buf->mem.cpu_va, bytes); + if (receiver_queue_sender == NULL) { + goto fail; + } + nvgpu_nvs_domain_ctrl_fifo_set_sender(g, receiver_queue_sender); } - nvgpu_nvs_domain_ctrl_fifo_set_receiver(g, send_queue_receiver); - } else if (mask == NVGPU_NVS_CTRL_FIFO_QUEUE_EXCLUSIVE_CLIENT_READ) { - receiver_queue_sender = nvs_control_fifo_sender_initialize(g, - (struct nvs_domain_msg_fifo *)buf->mem.cpu_va, bytes); - if (receiver_queue_sender == NULL) { - goto fail; - } - nvgpu_nvs_domain_ctrl_fifo_set_sender(g, receiver_queue_sender); } #endif @@ -592,18 +594,20 @@ void nvgpu_nvs_buffer_free(struct nvgpu_nvs_domain_ctrl_fifo *sched_ctrl, mask = buf->mask; #ifdef CONFIG_KMD_SCHEDULING_WORKER_THREAD - send_queue_receiver = nvgpu_nvs_domain_ctrl_fifo_get_receiver(g); - receiver_queue_sender = nvgpu_nvs_domain_ctrl_fifo_get_sender(g); + if (nvgpu_is_enabled(g, NVGPU_SUPPORT_KMD_SCHEDULING_WORKER_THREAD)) { + send_queue_receiver = nvgpu_nvs_domain_ctrl_fifo_get_receiver(g); + receiver_queue_sender = nvgpu_nvs_domain_ctrl_fifo_get_sender(g); - if (mask == NVGPU_NVS_CTRL_FIFO_QUEUE_EXCLUSIVE_CLIENT_WRITE) { - nvgpu_nvs_domain_ctrl_fifo_set_receiver(g, NULL); - if (send_queue_receiver != NULL) { - nvs_control_fifo_receiver_exit(g, send_queue_receiver); - } - } else if (mask == NVGPU_NVS_CTRL_FIFO_QUEUE_EXCLUSIVE_CLIENT_READ) { - nvgpu_nvs_domain_ctrl_fifo_set_sender(g, NULL); - if (receiver_queue_sender != NULL) { - nvs_control_fifo_sender_exit(g, receiver_queue_sender); + if (mask == NVGPU_NVS_CTRL_FIFO_QUEUE_EXCLUSIVE_CLIENT_WRITE) { + nvgpu_nvs_domain_ctrl_fifo_set_receiver(g, NULL); + if (send_queue_receiver != NULL) { + nvs_control_fifo_receiver_exit(g, send_queue_receiver); + } + } else if (mask == NVGPU_NVS_CTRL_FIFO_QUEUE_EXCLUSIVE_CLIENT_READ) { + nvgpu_nvs_domain_ctrl_fifo_set_sender(g, NULL); + if (receiver_queue_sender != NULL) { + nvs_control_fifo_sender_exit(g, receiver_queue_sender); + } } } #endif diff --git a/drivers/gpu/nvgpu/hal/init/hal_ga100.c b/drivers/gpu/nvgpu/hal/init/hal_ga100.c index 1cbd364fb..890498521 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_ga100.c +++ b/drivers/gpu/nvgpu/hal/init/hal_ga100.c @@ -2021,6 +2021,12 @@ int ga100_init_hal(struct gk20a *g) { nvgpu_set_enabled(g, NVGPU_GR_USE_DMA_FOR_FW_BOOTSTRAP, true); } +#ifdef CONFIG_KMD_SCHEDULING_WORKER_THREAD + /* + * enabled kmd sheduling worker thread + */ + nvgpu_set_enabled(g, NVGPU_SUPPORT_KMD_SCHEDULING_WORKER_THREAD, true); +#endif nvgpu_set_enabled(g, NVGPU_SUPPORT_PES_FS, true); g->name = "ga100"; diff --git a/drivers/gpu/nvgpu/hal/init/hal_ga10b.c b/drivers/gpu/nvgpu/hal/init/hal_ga10b.c index fad88e4d8..bfb08f3df 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_ga10b.c +++ b/drivers/gpu/nvgpu/hal/init/hal_ga10b.c @@ -1976,6 +1976,12 @@ int ga10b_init_hal(struct gk20a *g) nvgpu_set_enabled(g, NVGPU_SUPPORT_GSP_SCHED, true); nvgpu_set_enabled(g, NVGPU_SUPPORT_GSP_STEST, true); #endif +#ifdef CONFIG_KMD_SCHEDULING_WORKER_THREAD + /* + * enabled kmd sheduling worker thread + */ + nvgpu_set_enabled(g, NVGPU_SUPPORT_KMD_SCHEDULING_WORKER_THREAD, true); +#endif /* * enable GSP VM for gsp scheduler firmware diff --git a/drivers/gpu/nvgpu/hal/init/hal_gm20b.c b/drivers/gpu/nvgpu/hal/init/hal_gm20b.c index 096bd4487..573df7728 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_gm20b.c +++ b/drivers/gpu/nvgpu/hal/init/hal_gm20b.c @@ -1258,6 +1258,12 @@ int gm20b_init_hal(struct gk20a *g) nvgpu_set_enabled(g, NVGPU_SUPPORT_PREEMPTION_GFXP, false); #endif nvgpu_set_enabled(g, NVGPU_SUPPORT_SET_CTX_MMU_DEBUG_MODE, true); +#ifdef CONFIG_KMD_SCHEDULING_WORKER_THREAD + /* + * enabled kmd sheduling worker thread + */ + nvgpu_set_enabled(g, NVGPU_SUPPORT_KMD_SCHEDULING_WORKER_THREAD, true); +#endif g->max_sm_diversity_config_count = NVGPU_DEFAULT_SM_DIVERSITY_CONFIG_COUNT; diff --git a/drivers/gpu/nvgpu/hal/init/hal_gv11b.c b/drivers/gpu/nvgpu/hal/init/hal_gv11b.c index c6c11b8e2..1e62660b5 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_gv11b.c +++ b/drivers/gpu/nvgpu/hal/init/hal_gv11b.c @@ -1663,6 +1663,12 @@ int gv11b_init_hal(struct gk20a *g) nvgpu_set_enabled(g, NVGPU_SUPPORT_PLATFORM_ATOMIC, true); nvgpu_set_enabled(g, NVGPU_SUPPORT_SET_CTX_MMU_DEBUG_MODE, true); +#ifdef CONFIG_KMD_SCHEDULING_WORKER_THREAD + /* + * enabled kmd sheduling worker thread + */ + nvgpu_set_enabled(g, NVGPU_SUPPORT_KMD_SCHEDULING_WORKER_THREAD, true); +#endif /* * gv11b bypasses the IOMMU since it uses a special nvlink path to * memory. diff --git a/drivers/gpu/nvgpu/hal/init/hal_tu104.c b/drivers/gpu/nvgpu/hal/init/hal_tu104.c index 72b96ce07..699b714ec 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_tu104.c +++ b/drivers/gpu/nvgpu/hal/init/hal_tu104.c @@ -1926,6 +1926,12 @@ int tu104_init_hal(struct gk20a *g) } #ifdef CONFIG_NVGPU_CLK_ARB nvgpu_set_enabled(g, NVGPU_CLK_ARB_ENABLED, false); +#endif +#ifdef CONFIG_KMD_SCHEDULING_WORKER_THREAD + /* + * enabled kmd sheduling worker thread + */ + nvgpu_set_enabled(g, NVGPU_SUPPORT_KMD_SCHEDULING_WORKER_THREAD, true); #endif nvgpu_set_enabled(g, NVGPU_SUPPORT_PES_FS, true); g->name = "tu10x"; diff --git a/drivers/gpu/nvgpu/hal/rc/rc_gv11b.c b/drivers/gpu/nvgpu/hal/rc/rc_gv11b.c index 96db487f2..882dae021 100644 --- a/drivers/gpu/nvgpu/hal/rc/rc_gv11b.c +++ b/drivers/gpu/nvgpu/hal/rc/rc_gv11b.c @@ -129,12 +129,14 @@ static void gv11b_fifo_locked_abort_runlist_active_tsgs(struct gk20a *g, * and can be disabled. */ #if defined(CONFIG_KMD_SCHEDULING_WORKER_THREAD) - /* Special case. Submit the recovery runlist now */ - err = g->nvs_worker_submit(g, runlist, runlist->domain, false); - if (err == 1) { - err = 0; - } else if (err != 0) { - nvgpu_err(g, "runlist id %d is not cleaned up", runlist->id); + if (nvgpu_is_enabled(g, NVGPU_SUPPORT_KMD_SCHEDULING_WORKER_THREAD)) { + /* Special case. Submit the recovery runlist now */ + err = g->nvs_worker_submit(g, runlist, runlist->domain, false); + if (err == 1) { + err = 0; + } else if (err != 0) { + nvgpu_err(g, "runlist id %d is not cleaned up", runlist->id); + } } #endif /*CONFIG_KMD_SCHEDULING_WORKER_THREAD*/ /* diff --git a/drivers/gpu/nvgpu/include/nvgpu/enabled.h b/drivers/gpu/nvgpu/include/nvgpu/enabled.h index e7d984688..cc2afc31b 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/enabled.h +++ b/drivers/gpu/nvgpu/include/nvgpu/enabled.h @@ -235,6 +235,8 @@ struct gk20a; DEFINE_FLAG(NVGPU_SUPPORT_GSP_SCHED, "To enable gsp sheduler"), \ DEFINE_FLAG(NVGPU_SUPPORT_GSP_STEST, \ "Support GSP stress test"), \ + DEFINE_FLAG(NVGPU_SUPPORT_KMD_SCHEDULING_WORKER_THREAD, \ + "To enable kmd sheduling worker thread"), \ DEFINE_FLAG(NVGPU_SUPPORT_MULTI_PROCESS_TSG_SHARING, \ "Multi process TSG sharing support"), \ DEFINE_FLAG(NVGPU_MAX_ENABLED_BITS, "Marks max number of flags"),