From 6c2c4181ae8eea38bd4632a9d1f1149a930f084a Mon Sep 17 00:00:00 2001 From: Alex Waterman Date: Fri, 26 Apr 2019 16:08:48 -0700 Subject: [PATCH] gpu: nvgpu: Create hal.mm.mm for misc MM HALs There are many miscellaneous HALs for various MM related functionality. This patch aims to migrate all the remaining MM code from the / mm_.[ch] files in HAL files under hal/. Much of this is fairly straightforward copy/paste and updates to the HAL init files. The exception to that is the move of the left over gv11b MMU fault handling code in mm_gv11b.c. Having both a hal/mm/mm/mm_gv11b.c and a gv11b/mm_gv11b.c file causes tmake to choke so the gv11b/mm_gv11b.c file was moved to gv11b/mmu_fault_gv11b.c. This will be cleaned up in a subsequent patch. JIRA NVGPU-2042 Change-Id: I12896de865d890a61afbcb71159cff486119ffb8 Signed-off-by: Alex Waterman Reviewed-on: https://git-master.nvidia.com/r/2109050 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/Makefile | 9 +- drivers/gpu/nvgpu/Makefile.sources | 9 +- .../common/mm/allocators/nvgpu_allocator.c | 1 - drivers/gpu/nvgpu/common/mm/gmmu/page_table.c | 1 - drivers/gpu/nvgpu/common/mm/vidmem.c | 1 - drivers/gpu/nvgpu/common/mm/vm.c | 1 - drivers/gpu/nvgpu/common/mm/vm_area.c | 3 +- .../gpu/nvgpu/common/semaphore/semaphore.c | 1 - drivers/gpu/nvgpu/common/sync/channel_sync.c | 1 - .../common/sync/channel_sync_semaphore.c | 1 - .../nvgpu/common/sync/channel_sync_syncpt.c | 1 - .../nvgpu/common/vgpu/gp10b/vgpu_hal_gp10b.c | 14 +-- .../nvgpu/common/vgpu/gv11b/vgpu_hal_gv11b.c | 14 +-- drivers/gpu/nvgpu/common/vgpu/mm/mm_vgpu.c | 2 - drivers/gpu/nvgpu/gk20a/mm_gk20a.h | 94 ------------------- drivers/gpu/nvgpu/gv11b/mm_gv11b.h | 7 +- .../gv11b/{mm_gv11b.c => mmu_fault_gv11b.c} | 27 ------ drivers/gpu/nvgpu/hal/fb/fb_gv11b.c | 1 - drivers/gpu/nvgpu/hal/fb/fb_mmu_fault_gv11b.c | 2 - drivers/gpu/nvgpu/hal/init/hal_gm20b.c | 6 +- drivers/gpu/nvgpu/hal/init/hal_gp10b.c | 12 +-- drivers/gpu/nvgpu/hal/init/hal_gv100.c | 13 +-- drivers/gpu/nvgpu/hal/init/hal_gv11b.c | 11 +-- drivers/gpu/nvgpu/hal/init/hal_tu104.c | 13 ++- drivers/gpu/nvgpu/hal/mm/gmmu/gmmu_gk20a.c | 5 + drivers/gpu/nvgpu/hal/mm/gmmu/gmmu_gk20a.h | 1 + .../nvgpu/hal/mm/gmmu/gmmu_mmu_fault_gv11b.c | 2 - .../gpu/nvgpu/{gk20a => hal/mm}/mm_gk20a.c | 71 +------------- drivers/gpu/nvgpu/hal/mm/mm_gk20a.h | 35 +++++++ .../gpu/nvgpu/{gm20b => hal/mm}/mm_gm20b.c | 9 +- .../gpu/nvgpu/{gm20b => hal/mm}/mm_gm20b.h | 15 ++- .../gpu/nvgpu/{gp10b => hal/mm}/mm_gp10b.c | 18 +--- .../gpu/nvgpu/{gp10b => hal/mm}/mm_gp10b.h | 13 +-- drivers/gpu/nvgpu/hal/mm/mm_gv11b.c | 52 ++++++++++ drivers/gpu/nvgpu/hal/mm/mm_gv11b.h | 35 +++++++ drivers/gpu/nvgpu/include/nvgpu/as.h | 3 +- drivers/gpu/nvgpu/include/nvgpu/cbc.h | 12 ++- drivers/gpu/nvgpu/include/nvgpu/gk20a.h | 1 + drivers/gpu/nvgpu/include/nvgpu/mm.h | 1 + drivers/gpu/nvgpu/libnvgpu-drv.export | 4 +- drivers/gpu/nvgpu/os/linux/cde.c | 2 - drivers/gpu/nvgpu/os/linux/dmabuf.h | 32 ++++++- drivers/gpu/nvgpu/os/linux/dmabuf_vidmem.c | 3 +- drivers/gpu/nvgpu/os/linux/nvgpu_mem.c | 1 - .../nvgpu/os/linux/os_fence_android_sema.c | 5 +- .../nvgpu/os/linux/os_fence_android_syncpt.c | 4 +- drivers/gpu/nvgpu/os/linux/vm.c | 3 +- userspace/Makefile.sources | 2 - .../units/mm/gmmu/page_table/page_table.c | 3 +- .../mm/page_table_faults/page_table_faults.c | 3 +- userspace/units/mm/vm/vm.c | 2 +- 51 files changed, 257 insertions(+), 325 deletions(-) delete mode 100644 drivers/gpu/nvgpu/gk20a/mm_gk20a.h rename drivers/gpu/nvgpu/gv11b/{mm_gv11b.c => mmu_fault_gv11b.c} (85%) rename drivers/gpu/nvgpu/{gk20a => hal/mm}/mm_gk20a.c (50%) create mode 100644 drivers/gpu/nvgpu/hal/mm/mm_gk20a.h rename drivers/gpu/nvgpu/{gm20b => hal/mm}/mm_gm20b.c (86%) rename drivers/gpu/nvgpu/{gm20b => hal/mm}/mm_gm20b.h (77%) rename drivers/gpu/nvgpu/{gp10b => hal/mm}/mm_gp10b.c (85%) rename drivers/gpu/nvgpu/{gp10b => hal/mm}/mm_gp10b.h (81%) create mode 100644 drivers/gpu/nvgpu/hal/mm/mm_gv11b.c create mode 100644 drivers/gpu/nvgpu/hal/mm/mm_gv11b.h diff --git a/drivers/gpu/nvgpu/Makefile b/drivers/gpu/nvgpu/Makefile index e3cdb285e..cd7f1ae4b 100644 --- a/drivers/gpu/nvgpu/Makefile +++ b/drivers/gpu/nvgpu/Makefile @@ -148,6 +148,10 @@ nvgpu-y += \ common/nvlink/nvlink.o \ common/nvlink/nvlink_gv100.o \ common/nvlink/nvlink_tu104.o \ + hal/mm/mm_gk20a.o \ + hal/mm/mm_gm20b.o \ + hal/mm/mm_gp10b.o \ + hal/mm/mm_gv11b.o \ hal/mm/cache/flush_gk20a.o \ hal/mm/cache/flush_gv11b.o \ hal/mm/gmmu/gmmu_mmu_fault_gv11b.o \ @@ -542,8 +546,6 @@ nvgpu-y += \ common/ce/ce.o \ common/debugger.o \ gk20a/fifo_gk20a.o \ - gk20a/mm_gk20a.o \ - gm20b/mm_gm20b.o nvgpu-$(CONFIG_GK20A_VIDMEM) += \ common/mm/vidmem.o @@ -588,7 +590,6 @@ nvgpu-$(CONFIG_GK20A_CYCLE_STATS) += \ common/cyclestats/cyclestats.o nvgpu-y += \ - gp10b/mm_gp10b.o \ - gv11b/mm_gv11b.o \ + gv11b/mmu_fault_gv11b.o \ gv100/mm_gv100.o \ tu104/mm_tu104.o \ diff --git a/drivers/gpu/nvgpu/Makefile.sources b/drivers/gpu/nvgpu/Makefile.sources index bdd09dc21..6ef8538df 100644 --- a/drivers/gpu/nvgpu/Makefile.sources +++ b/drivers/gpu/nvgpu/Makefile.sources @@ -243,12 +243,13 @@ srcs += common/sim/sim.c \ common/nvlink/nvlink.c \ common/fence/fence.c \ gk20a/fifo_gk20a.c \ - gk20a/mm_gk20a.c \ - gm20b/mm_gm20b.c \ - gp10b/mm_gp10b.c \ - gv11b/mm_gv11b.c \ + gv11b/mmu_fault_gv11b.c \ gv100/mm_gv100.c \ tu104/mm_tu104.c \ + hal/mm/mm_gk20a.c \ + hal/mm/mm_gm20b.c \ + hal/mm/mm_gp10b.c \ + hal/mm/mm_gv11b.c \ hal/mm/cache/flush_gk20a.c \ hal/mm/cache/flush_gv11b.c \ hal/mm/gmmu/gmmu_mmu_fault_gv11b.c \ diff --git a/drivers/gpu/nvgpu/common/mm/allocators/nvgpu_allocator.c b/drivers/gpu/nvgpu/common/mm/allocators/nvgpu_allocator.c index fb5912bf8..1217e02e2 100644 --- a/drivers/gpu/nvgpu/common/mm/allocators/nvgpu_allocator.c +++ b/drivers/gpu/nvgpu/common/mm/allocators/nvgpu_allocator.c @@ -25,7 +25,6 @@ #include #include -#include "gk20a/mm_gk20a.h" u64 nvgpu_alloc_length(struct nvgpu_allocator *a) { diff --git a/drivers/gpu/nvgpu/common/mm/gmmu/page_table.c b/drivers/gpu/nvgpu/common/mm/gmmu/page_table.c index 6b809eb83..5670c8483 100644 --- a/drivers/gpu/nvgpu/common/mm/gmmu/page_table.c +++ b/drivers/gpu/nvgpu/common/mm/gmmu/page_table.c @@ -36,7 +36,6 @@ #include #include -#include "gk20a/mm_gk20a.h" #define __gmmu_dbg(g, attrs, fmt, args...) \ do { \ diff --git a/drivers/gpu/nvgpu/common/mm/vidmem.c b/drivers/gpu/nvgpu/common/mm/vidmem.c index 849fd0fb0..568208d35 100644 --- a/drivers/gpu/nvgpu/common/mm/vidmem.c +++ b/drivers/gpu/nvgpu/common/mm/vidmem.c @@ -32,7 +32,6 @@ #include #include -#include "gk20a/mm_gk20a.h" /* * This is expected to be called from the shutdown path (or the error path in diff --git a/drivers/gpu/nvgpu/common/mm/vm.c b/drivers/gpu/nvgpu/common/mm/vm.c index b578e3b3a..37f098a3b 100644 --- a/drivers/gpu/nvgpu/common/mm/vm.c +++ b/drivers/gpu/nvgpu/common/mm/vm.c @@ -39,7 +39,6 @@ #include #include -#include "gk20a/mm_gk20a.h" struct nvgpu_ctag_buffer_info { u64 size; diff --git a/drivers/gpu/nvgpu/common/mm/vm_area.c b/drivers/gpu/nvgpu/common/mm/vm_area.c index f251e3761..27ef1e12e 100644 --- a/drivers/gpu/nvgpu/common/mm/vm_area.c +++ b/drivers/gpu/nvgpu/common/mm/vm_area.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -25,7 +25,6 @@ #include #include -#include "gk20a/mm_gk20a.h" struct nvgpu_vm_area *nvgpu_vm_area_find(struct vm_gk20a *vm, u64 addr) { diff --git a/drivers/gpu/nvgpu/common/semaphore/semaphore.c b/drivers/gpu/nvgpu/common/semaphore/semaphore.c index b0acc58bb..587c100ee 100644 --- a/drivers/gpu/nvgpu/common/semaphore/semaphore.c +++ b/drivers/gpu/nvgpu/common/semaphore/semaphore.c @@ -33,7 +33,6 @@ #include "semaphore_priv.h" -#include "gk20a/mm_gk20a.h" /* * Allocate a semaphore from the passed pool. diff --git a/drivers/gpu/nvgpu/common/sync/channel_sync.c b/drivers/gpu/nvgpu/common/sync/channel_sync.c index c2139ce3a..f4c4d6560 100644 --- a/drivers/gpu/nvgpu/common/sync/channel_sync.c +++ b/drivers/gpu/nvgpu/common/sync/channel_sync.c @@ -38,7 +38,6 @@ #include #include "channel_sync_priv.h" -#include "gk20a/mm_gk20a.h" struct nvgpu_channel_sync *nvgpu_channel_sync_create(struct channel_gk20a *c, bool user_managed) diff --git a/drivers/gpu/nvgpu/common/sync/channel_sync_semaphore.c b/drivers/gpu/nvgpu/common/sync/channel_sync_semaphore.c index 4790e064a..9c2f68664 100644 --- a/drivers/gpu/nvgpu/common/sync/channel_sync_semaphore.c +++ b/drivers/gpu/nvgpu/common/sync/channel_sync_semaphore.c @@ -38,7 +38,6 @@ #include #include "channel_sync_priv.h" -#include "gk20a/mm_gk20a.h" struct nvgpu_channel_sync_semaphore { struct nvgpu_channel_sync ops; diff --git a/drivers/gpu/nvgpu/common/sync/channel_sync_syncpt.c b/drivers/gpu/nvgpu/common/sync/channel_sync_syncpt.c index 14fa16389..57ebb1646 100644 --- a/drivers/gpu/nvgpu/common/sync/channel_sync_syncpt.c +++ b/drivers/gpu/nvgpu/common/sync/channel_sync_syncpt.c @@ -37,7 +37,6 @@ #include #include "channel_sync_priv.h" -#include "gk20a/mm_gk20a.h" struct nvgpu_channel_sync_syncpt { struct nvgpu_channel_sync ops; diff --git a/drivers/gpu/nvgpu/common/vgpu/gp10b/vgpu_hal_gp10b.c b/drivers/gpu/nvgpu/common/vgpu/gp10b/vgpu_hal_gp10b.c index 77717e5cc..53b67dae0 100644 --- a/drivers/gpu/nvgpu/common/vgpu/gp10b/vgpu_hal_gp10b.c +++ b/drivers/gpu/nvgpu/common/vgpu/gp10b/vgpu_hal_gp10b.c @@ -33,6 +33,10 @@ #include "hal/bus/bus_gk20a.h" #include "hal/bus/bus_gm20b.h" +#include "hal/mm/mm_gk20a.h" +#include "hal/mm/mm_gm20b.h" +#include "hal/mm/mm_gp10b.h" +#include "hal/mm/gmmu/gmmu_gk20a.h" #include "hal/mm/gmmu/gmmu_gm20b.h" #include "hal/mm/gmmu/gmmu_gp10b.h" #include "hal/regops/regops_gp10b.h" @@ -89,10 +93,6 @@ #include "common/vgpu/init/init_vgpu.h" #include "vgpu_hal_gp10b.h" -#include "gp10b/mm_gp10b.h" - -#include "gm20b/mm_gm20b.h" - #include #include @@ -571,9 +571,9 @@ static const struct gpu_ops vgpu_gp10b_ops = { .vm_bind_channel = vgpu_vm_bind_channel, .setup_hw = NULL, .is_bar1_supported = gm20b_mm_is_bar1_supported, - .init_inst_block = gk20a_init_inst_block, - .init_bar2_vm = gp10b_init_bar2_vm, - .remove_bar2_vm = gp10b_remove_bar2_vm, + .init_inst_block = gk20a_mm_init_inst_block, + .init_bar2_vm = gp10b_mm_init_bar2_vm, + .remove_bar2_vm = gp10b_mm_remove_bar2_vm, .bar1_map_userd = vgpu_mm_bar1_map_userd, .vm_as_alloc_share = vgpu_vm_as_alloc_share, .vm_as_free_share = vgpu_vm_as_free_share, diff --git a/drivers/gpu/nvgpu/common/vgpu/gv11b/vgpu_hal_gv11b.c b/drivers/gpu/nvgpu/common/vgpu/gv11b/vgpu_hal_gv11b.c index da496415c..24e39c212 100644 --- a/drivers/gpu/nvgpu/common/vgpu/gv11b/vgpu_hal_gv11b.c +++ b/drivers/gpu/nvgpu/common/vgpu/gv11b/vgpu_hal_gv11b.c @@ -22,6 +22,10 @@ #include "hal/bus/bus_gk20a.h" #include "hal/bus/bus_gm20b.h" +#include "hal/mm/mm_gm20b.h" +#include "hal/mm/mm_gp10b.h" +#include "hal/mm/mm_gv11b.h" +#include "hal/mm/gmmu/gmmu_gk20a.h" #include "hal/mm/gmmu/gmmu_gm20b.h" #include "hal/mm/gmmu/gmmu_gp10b.h" #include "hal/regops/regops_gv11b.h" @@ -102,10 +106,6 @@ #include "common/vgpu/ptimer/ptimer_vgpu.h" #include "vgpu_hal_gv11b.h" -#include - -#include - #include #include @@ -665,9 +665,9 @@ static const struct gpu_ops vgpu_gv11b_ops = { .vm_bind_channel = vgpu_vm_bind_channel, .setup_hw = NULL, .is_bar1_supported = gv11b_mm_is_bar1_supported, - .init_inst_block = gv11b_init_inst_block, - .init_bar2_vm = gp10b_init_bar2_vm, - .remove_bar2_vm = gp10b_remove_bar2_vm, + .init_inst_block = gv11b_mm_init_inst_block, + .init_bar2_vm = gp10b_mm_init_bar2_vm, + .remove_bar2_vm = gp10b_mm_remove_bar2_vm, .fault_info_mem_destroy = gv11b_mm_fault_info_mem_destroy, .bar1_map_userd = vgpu_mm_bar1_map_userd, .vm_as_alloc_share = vgpu_vm_as_alloc_share, diff --git a/drivers/gpu/nvgpu/common/vgpu/mm/mm_vgpu.c b/drivers/gpu/nvgpu/common/vgpu/mm/mm_vgpu.c index 6512f6bea..3b09f0123 100644 --- a/drivers/gpu/nvgpu/common/vgpu/mm/mm_vgpu.c +++ b/drivers/gpu/nvgpu/common/vgpu/mm/mm_vgpu.c @@ -33,8 +33,6 @@ #include #include "mm_vgpu.h" -#include "gk20a/mm_gk20a.h" -#include "gm20b/mm_gm20b.h" #include "common/vgpu/ivc/comm_vgpu.h" static int vgpu_init_mm_setup_sw(struct gk20a *g) diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h deleted file mode 100644 index c301d7663..000000000 --- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h +++ /dev/null @@ -1,94 +0,0 @@ -/* - * Copyright (c) 2011-2019, NVIDIA CORPORATION. All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -#ifndef MM_GK20A_H -#define MM_GK20A_H - -#include -#include -#include -#include -#include -#include - -struct compbit_store_desc { - struct nvgpu_mem mem; - - /* The value that is written to the hardware. This depends on - * on the number of ltcs and is not an address. */ - u64 base_hw; -}; - -struct gk20a_buffer_state { - struct nvgpu_list_node list; - - /* The valid compbits and the fence must be changed atomically. */ - struct nvgpu_mutex lock; - - /* Offset of the surface within the dma-buf whose state is - * described by this struct (one dma-buf can contain multiple - * surfaces with different states). */ - size_t offset; - - /* A bitmask of valid sets of compbits (0 = uncompressed). */ - u32 valid_compbits; - - /* The ZBC color used on this buffer. */ - u32 zbc_color; - - /* This struct reflects the state of the buffer when this - * fence signals. */ - struct nvgpu_fence_type *fence; -}; - -static inline struct gk20a_buffer_state * -gk20a_buffer_state_from_list(struct nvgpu_list_node *node) -{ - return (struct gk20a_buffer_state *) - ((uintptr_t)node - offsetof(struct gk20a_buffer_state, list)); -}; - -struct gk20a; -struct channel_gk20a; - -#define dev_from_vm(vm) dev_from_gk20a(vm->mm->g) - -void gk20a_mm_ltc_isr(struct gk20a *g); - -bool gk20a_mm_mmu_debug_mode_enabled(struct gk20a *g); - -int gk20a_alloc_inst_block(struct gk20a *g, struct nvgpu_mem *inst_block); -void gk20a_init_inst_block(struct nvgpu_mem *inst_block, struct vm_gk20a *vm, - u32 big_page_size); -int gk20a_init_mm_setup_hw(struct gk20a *g); - -/* vm-as interface */ -struct nvgpu_as_alloc_space_args; -struct nvgpu_as_free_space_args; -int gk20a_vm_release_share(struct gk20a_as_share *as_share); - -void pde_range_from_vaddr_range(struct vm_gk20a *vm, - u64 addr_lo, u64 addr_hi, - u32 *pde_lo, u32 *pde_hi); -u32 gk20a_mm_get_iommu_bit(struct gk20a *g); -u64 gk20a_mm_bar1_map_userd(struct gk20a *g, struct nvgpu_mem *mem, u32 offset); -#endif /* MM_GK20A_H */ diff --git a/drivers/gpu/nvgpu/gv11b/mm_gv11b.h b/drivers/gpu/nvgpu/gv11b/mm_gv11b.h index c76fec94b..bd4d768c8 100644 --- a/drivers/gpu/nvgpu/gv11b/mm_gv11b.h +++ b/drivers/gpu/nvgpu/gv11b/mm_gv11b.h @@ -1,6 +1,6 @@ /* * GV11B MM - * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2019, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -25,12 +25,7 @@ #define MM_GV11B_H struct gk20a; -struct nvgpu_mem; -struct vm_gk20a; -bool gv11b_mm_is_bar1_supported(struct gk20a *g); -void gv11b_init_inst_block(struct nvgpu_mem *inst_block, - struct vm_gk20a *vm, u32 big_page_size); void gv11b_mm_fault_info_mem_destroy(struct gk20a *g); void gv11b_mm_mmu_fault_disable_hw(struct gk20a *g); diff --git a/drivers/gpu/nvgpu/gv11b/mm_gv11b.c b/drivers/gpu/nvgpu/gv11b/mmu_fault_gv11b.c similarity index 85% rename from drivers/gpu/nvgpu/gv11b/mm_gv11b.c rename to drivers/gpu/nvgpu/gv11b/mmu_fault_gv11b.c index 690a220e0..6a2c2c598 100644 --- a/drivers/gpu/nvgpu/gv11b/mm_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/mmu_fault_gv11b.c @@ -29,39 +29,12 @@ #include #include -#include "gk20a/mm_gk20a.h" -#include "gp10b/mm_gp10b.h" #include "mm_gv11b.h" #include -bool gv11b_mm_is_bar1_supported(struct gk20a *g) -{ - return false; -} - -void gv11b_init_inst_block(struct nvgpu_mem *inst_block, - struct vm_gk20a *vm, u32 big_page_size) -{ - struct gk20a *g = gk20a_from_vm(vm); - u64 pdb_addr = nvgpu_pd_gpu_addr(g, &vm->pdb); - - nvgpu_log_info(g, "inst block phys = 0x%llx, kv = 0x%p", - nvgpu_inst_block_addr(g, inst_block), inst_block->cpu_va); - - g->ops.ramin.init_pdb(g, inst_block, pdb_addr, vm->pdb.mem); - - if ((big_page_size != 0U) && (g->ops.ramin.set_big_page_size != NULL)) { - g->ops.ramin.set_big_page_size(g, inst_block, big_page_size); - } - - if (g->ops.ramin.init_subctx_pdb != NULL) { - g->ops.ramin.init_subctx_pdb(g, inst_block, vm->pdb.mem, false); - } -} - void gv11b_mm_mmu_fault_disable_hw(struct gk20a *g) { nvgpu_mutex_acquire(&g->mm.hub_isr_mutex); diff --git a/drivers/gpu/nvgpu/hal/fb/fb_gv11b.c b/drivers/gpu/nvgpu/hal/fb/fb_gv11b.c index 2482a6fb3..ee0bb2fb0 100644 --- a/drivers/gpu/nvgpu/hal/fb/fb_gv11b.c +++ b/drivers/gpu/nvgpu/hal/fb/fb_gv11b.c @@ -38,7 +38,6 @@ #include #include -#include "gk20a/mm_gk20a.h" #include "fb_gm20b.h" #include "fb_gp10b.h" diff --git a/drivers/gpu/nvgpu/hal/fb/fb_mmu_fault_gv11b.c b/drivers/gpu/nvgpu/hal/fb/fb_mmu_fault_gv11b.c index 014fc141e..76d6a9db5 100644 --- a/drivers/gpu/nvgpu/hal/fb/fb_mmu_fault_gv11b.c +++ b/drivers/gpu/nvgpu/hal/fb/fb_mmu_fault_gv11b.c @@ -42,8 +42,6 @@ #include "hal/fb/fb_mmu_fault_gv11b.h" #include "hal/mm/gmmu/gmmu_mmu_fault_gv11b.h" -#include "gk20a/mm_gk20a.h" - #include "fb_gm20b.h" #include "fb_gp10b.h" #include "fb_gv11b.h" diff --git a/drivers/gpu/nvgpu/hal/init/hal_gm20b.c b/drivers/gpu/nvgpu/hal/init/hal_gm20b.c index 61ba1f55b..41bcc4c52 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_gm20b.c +++ b/drivers/gpu/nvgpu/hal/init/hal_gm20b.c @@ -41,6 +41,8 @@ #include #include +#include "hal/mm/mm_gk20a.h" +#include "hal/mm/mm_gm20b.h" #include "hal/mm/cache/flush_gk20a.h" #include "hal/mm/gmmu/gmmu_gk20a.h" #include "hal/mm/gmmu/gmmu_gm20b.h" @@ -100,8 +102,6 @@ #include "common/fifo/channel_gm20b.h" #include "common/pmu/pg/pg_sw_gm20b.h" -#include "gm20b/mm_gm20b.h" - #include "hal_gm20b.h" #include @@ -852,7 +852,7 @@ static const struct gpu_ops gm20b_ops = { .vm_bind_channel = nvgpu_vm_bind_channel, .setup_hw = nvgpu_mm_setup_hw, .is_bar1_supported = gm20b_mm_is_bar1_supported, - .init_inst_block = gk20a_init_inst_block, + .init_inst_block = gk20a_mm_init_inst_block, .bar1_map_userd = gk20a_mm_bar1_map_userd, .cache = { .fb_flush = gk20a_mm_fb_flush, diff --git a/drivers/gpu/nvgpu/hal/init/hal_gp10b.c b/drivers/gpu/nvgpu/hal/init/hal_gp10b.c index 1f8131e33..1a3121fcc 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_gp10b.c +++ b/drivers/gpu/nvgpu/hal/init/hal_gp10b.c @@ -41,6 +41,9 @@ #include #include +#include "hal/mm/mm_gk20a.h" +#include "hal/mm/mm_gm20b.h" +#include "hal/mm/mm_gp10b.h" #include "hal/mm/cache/flush_gk20a.h" #include "hal/mm/gmmu/gmmu_gm20b.h" #include "hal/mm/gmmu/gmmu_gp10b.h" @@ -121,9 +124,6 @@ #include "common/fifo/channel_gm20b.h" #include "common/clk_arb/clk_arb_gp10b.h" -#include "gp10b/mm_gp10b.h" -#include "gm20b/mm_gm20b.h" - #include "hal_gp10b.h" #include @@ -929,9 +929,9 @@ static const struct gpu_ops gp10b_ops = { .vm_bind_channel = nvgpu_vm_bind_channel, .setup_hw = nvgpu_mm_setup_hw, .is_bar1_supported = gm20b_mm_is_bar1_supported, - .init_inst_block = gk20a_init_inst_block, - .init_bar2_vm = gp10b_init_bar2_vm, - .remove_bar2_vm = gp10b_remove_bar2_vm, + .init_inst_block = gk20a_mm_init_inst_block, + .init_bar2_vm = gp10b_mm_init_bar2_vm, + .remove_bar2_vm = gp10b_mm_remove_bar2_vm, .bar1_map_userd = gk20a_mm_bar1_map_userd, .cache = { .fb_flush = gk20a_mm_fb_flush, diff --git a/drivers/gpu/nvgpu/hal/init/hal_gv100.c b/drivers/gpu/nvgpu/hal/init/hal_gv100.c index 7b934cf2e..0b24d8173 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_gv100.c +++ b/drivers/gpu/nvgpu/hal/init/hal_gv100.c @@ -22,6 +22,8 @@ * DEALINGS IN THE SOFTWARE. */ +#include "hal/mm/mm_gp10b.h" +#include "hal/mm/mm_gv11b.h" #include "hal/mm/cache/flush_gk20a.h" #include "hal/mm/cache/flush_gv11b.h" #include "hal/mm/gmmu/gmmu_gm20b.h" @@ -149,11 +151,6 @@ #include "common/vbios/bios_sw_gp106.h" #include "common/vbios/bios_sw_gv100.h" - -#include "gm20b/mm_gm20b.h" - -#include "gp10b/mm_gp10b.h" - #include "gv11b/mm_gv11b.h" #include "hal_gv100.h" @@ -1125,9 +1122,9 @@ static const struct gpu_ops gv100_ops = { .vm_bind_channel = nvgpu_vm_bind_channel, .setup_hw = nvgpu_mm_setup_hw, .is_bar1_supported = gv11b_mm_is_bar1_supported, - .init_inst_block = gv11b_init_inst_block, - .init_bar2_vm = gp10b_init_bar2_vm, - .remove_bar2_vm = gp10b_remove_bar2_vm, + .init_inst_block = gv11b_mm_init_inst_block, + .init_bar2_vm = gp10b_mm_init_bar2_vm, + .remove_bar2_vm = gp10b_mm_remove_bar2_vm, .fault_info_mem_destroy = gv11b_mm_fault_info_mem_destroy, .mmu_fault_disable_hw = gv11b_mm_mmu_fault_disable_hw, .get_flush_retries = gv100_mm_get_flush_retries, diff --git a/drivers/gpu/nvgpu/hal/init/hal_gv11b.c b/drivers/gpu/nvgpu/hal/init/hal_gv11b.c index 45eb43508..dcd0d894f 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_gv11b.c +++ b/drivers/gpu/nvgpu/hal/init/hal_gv11b.c @@ -30,6 +30,8 @@ #include #include +#include "hal/mm/mm_gp10b.h" +#include "hal/mm/mm_gv11b.h" #include "hal/mm/cache/flush_gk20a.h" #include "hal/mm/cache/flush_gv11b.h" #include "hal/mm/gmmu/gmmu_gm20b.h" @@ -140,9 +142,6 @@ #include "common/fifo/channel_gv11b.h" #include "common/clk_arb/clk_arb_gp10b.h" -#include "gm20b/mm_gm20b.h" -#include "gp10b/mm_gp10b.h" - #include "hal_gv11b.h" #include "gv11b/mm_gv11b.h" @@ -1095,9 +1094,9 @@ static const struct gpu_ops gv11b_ops = { .vm_bind_channel = nvgpu_vm_bind_channel, .setup_hw = nvgpu_mm_setup_hw, .is_bar1_supported = gv11b_mm_is_bar1_supported, - .init_inst_block = gv11b_init_inst_block, - .init_bar2_vm = gp10b_init_bar2_vm, - .remove_bar2_vm = gp10b_remove_bar2_vm, + .init_inst_block = gv11b_mm_init_inst_block, + .init_bar2_vm = gp10b_mm_init_bar2_vm, + .remove_bar2_vm = gp10b_mm_remove_bar2_vm, .fault_info_mem_destroy = gv11b_mm_fault_info_mem_destroy, .mmu_fault_disable_hw = gv11b_mm_mmu_fault_disable_hw, .bar1_map_userd = NULL, diff --git a/drivers/gpu/nvgpu/hal/init/hal_tu104.c b/drivers/gpu/nvgpu/hal/init/hal_tu104.c index bc591905a..dd9db0799 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_tu104.c +++ b/drivers/gpu/nvgpu/hal/init/hal_tu104.c @@ -22,6 +22,9 @@ * DEALINGS IN THE SOFTWARE. */ +#include "hal/mm/mm_gm20b.h" +#include "hal/mm/mm_gp10b.h" +#include "hal/mm/mm_gv11b.h" #include "hal/mm/cache/flush_gk20a.h" #include "hal/mm/cache/flush_gv11b.h" #include "hal/mm/gmmu/gmmu_gm20b.h" @@ -165,15 +168,11 @@ #include "common/fifo/channel_gv100.h" #include "common/clk_arb/clk_arb_gv100.h" -#include "gm20b/mm_gm20b.h" - #include "hal/clk/clk_gv100.h" #include "common/vbios/bios_sw_gp106.h" #include "common/vbios/bios_sw_tu104.h" -#include "gp10b/mm_gp10b.h" - #include "gv11b/mm_gv11b.h" #include "tu104/mm_tu104.h" @@ -1162,9 +1161,9 @@ static const struct gpu_ops tu104_ops = { .vm_bind_channel = nvgpu_vm_bind_channel, .setup_hw = nvgpu_mm_setup_hw, .is_bar1_supported = gv11b_mm_is_bar1_supported, - .init_inst_block = gv11b_init_inst_block, - .init_bar2_vm = gp10b_init_bar2_vm, - .remove_bar2_vm = gp10b_remove_bar2_vm, + .init_inst_block = gv11b_mm_init_inst_block, + .init_bar2_vm = gp10b_mm_init_bar2_vm, + .remove_bar2_vm = gp10b_mm_remove_bar2_vm, .fault_info_mem_destroy = gv11b_mm_fault_info_mem_destroy, .mmu_fault_disable_hw = gv11b_mm_mmu_fault_disable_hw, .get_flush_retries = tu104_mm_get_flush_retries, diff --git a/drivers/gpu/nvgpu/hal/mm/gmmu/gmmu_gk20a.c b/drivers/gpu/nvgpu/hal/mm/gmmu/gmmu_gk20a.c index eeb9fce05..cab0d282a 100644 --- a/drivers/gpu/nvgpu/hal/mm/gmmu/gmmu_gk20a.c +++ b/drivers/gpu/nvgpu/hal/mm/gmmu/gmmu_gk20a.c @@ -265,3 +265,8 @@ const struct gk20a_mmu_level *gk20a_mm_get_mmu_levels(struct gk20a *g, return (big_page_size == SZ_64K) ? gk20a_mm_levels_64k : gk20a_mm_levels_128k; } + +u32 gk20a_mm_get_iommu_bit(struct gk20a *g) +{ + return 34; +} diff --git a/drivers/gpu/nvgpu/hal/mm/gmmu/gmmu_gk20a.h b/drivers/gpu/nvgpu/hal/mm/gmmu/gmmu_gk20a.h index e3515ca16..c55f04128 100644 --- a/drivers/gpu/nvgpu/hal/mm/gmmu/gmmu_gk20a.h +++ b/drivers/gpu/nvgpu/hal/mm/gmmu/gmmu_gk20a.h @@ -43,5 +43,6 @@ u32 gk20a_get_pde_pgsz(struct gk20a *g, const struct gk20a_mmu_level *l, struct nvgpu_gmmu_pd *pd, u32 pd_idx); u32 gk20a_get_pte_pgsz(struct gk20a *g, const struct gk20a_mmu_level *l, struct nvgpu_gmmu_pd *pd, u32 pd_idx); +u32 gk20a_mm_get_iommu_bit(struct gk20a *g); #endif diff --git a/drivers/gpu/nvgpu/hal/mm/gmmu/gmmu_mmu_fault_gv11b.c b/drivers/gpu/nvgpu/hal/mm/gmmu/gmmu_mmu_fault_gv11b.c index cbf5bc20d..441551545 100644 --- a/drivers/gpu/nvgpu/hal/mm/gmmu/gmmu_mmu_fault_gv11b.c +++ b/drivers/gpu/nvgpu/hal/mm/gmmu/gmmu_mmu_fault_gv11b.c @@ -43,8 +43,6 @@ #include #include -#include "gk20a/mm_gk20a.h" - #include static int gv11b_fb_fix_page_fault(struct gk20a *g, diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c b/drivers/gpu/nvgpu/hal/mm/mm_gk20a.c similarity index 50% rename from drivers/gpu/nvgpu/gk20a/mm_gk20a.c rename to drivers/gpu/nvgpu/hal/mm/mm_gk20a.c index f09b4dbbb..57f055339 100644 --- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c +++ b/drivers/gpu/nvgpu/hal/mm/mm_gk20a.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2011-2019, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -20,70 +20,14 @@ * DEALINGS IN THE SOFTWARE. */ -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include #include -#include -#include -#include +#include +#include #include "mm_gk20a.h" -#include - -/* - * GPU mapping life cycle - * ====================== - * - * Kernel mappings - * --------------- - * - * Kernel mappings are created through vm.map(..., false): - * - * - Mappings to the same allocations are reused and refcounted. - * - This path does not support deferred unmapping (i.e. kernel must wait for - * all hw operations on the buffer to complete before unmapping). - * - References to dmabuf are owned and managed by the (kernel) clients of - * the gk20a_vm layer. - * - * - * User space mappings - * ------------------- - * - * User space mappings are created through as.map_buffer -> vm.map(..., true): - * - * - Mappings to the same allocations are reused and refcounted. - * - This path supports deferred unmapping (i.e. we delay the actual unmapping - * until all hw operations have completed). - * - References to dmabuf are owned and managed by the vm_gk20a - * layer itself. vm.map acquires these refs, and sets - * mapped_buffer->own_mem_ref to record that we must release the refs when we - * actually unmap. - * - */ - -void gk20a_init_inst_block(struct nvgpu_mem *inst_block, struct vm_gk20a *vm, - u32 big_page_size) +void gk20a_mm_init_inst_block(struct nvgpu_mem *inst_block, struct vm_gk20a *vm, + u32 big_page_size) { struct gk20a *g = gk20a_from_vm(vm); u64 pdb_addr = nvgpu_pd_gpu_addr(g, &vm->pdb); @@ -100,11 +44,6 @@ void gk20a_init_inst_block(struct nvgpu_mem *inst_block, struct vm_gk20a *vm, } } -u32 gk20a_mm_get_iommu_bit(struct gk20a *g) -{ - return 34; -} - u64 gk20a_mm_bar1_map_userd(struct gk20a *g, struct nvgpu_mem *mem, u32 offset) { struct fifo_gk20a *f = &g->fifo; diff --git a/drivers/gpu/nvgpu/hal/mm/mm_gk20a.h b/drivers/gpu/nvgpu/hal/mm/mm_gk20a.h new file mode 100644 index 000000000..b74049969 --- /dev/null +++ b/drivers/gpu/nvgpu/hal/mm/mm_gk20a.h @@ -0,0 +1,35 @@ +/* + * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef HAL_MM_MM_GK20A_H +#define HAL_MM_MM_GK20A_H + +#include + +struct nvgpu_mem; +struct vm_gk20a; + +void gk20a_mm_init_inst_block(struct nvgpu_mem *inst_block, struct vm_gk20a *vm, + u32 big_page_size); +u64 gk20a_mm_bar1_map_userd(struct gk20a *g, struct nvgpu_mem *mem, u32 offset); + +#endif diff --git a/drivers/gpu/nvgpu/gm20b/mm_gm20b.c b/drivers/gpu/nvgpu/hal/mm/mm_gm20b.c similarity index 86% rename from drivers/gpu/nvgpu/gm20b/mm_gm20b.c rename to drivers/gpu/nvgpu/hal/mm/mm_gm20b.c index 1621e5379..e06de2dc9 100644 --- a/drivers/gpu/nvgpu/gm20b/mm_gm20b.c +++ b/drivers/gpu/nvgpu/hal/mm/mm_gm20b.c @@ -1,7 +1,5 @@ /* - * GM20B MMU - * - * Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -22,13 +20,8 @@ * DEALINGS IN THE SOFTWARE. */ -#include -#include - #include "mm_gm20b.h" -#include - bool gm20b_mm_is_bar1_supported(struct gk20a *g) { return true; diff --git a/drivers/gpu/nvgpu/gm20b/mm_gm20b.h b/drivers/gpu/nvgpu/hal/mm/mm_gm20b.h similarity index 77% rename from drivers/gpu/nvgpu/gm20b/mm_gm20b.h rename to drivers/gpu/nvgpu/hal/mm/mm_gm20b.h index df0a51a41..aecb3aee2 100644 --- a/drivers/gpu/nvgpu/gm20b/mm_gm20b.h +++ b/drivers/gpu/nvgpu/hal/mm/mm_gm20b.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014-2019, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -20,14 +20,13 @@ * DEALINGS IN THE SOFTWARE. */ -#ifndef NVGPU_GM20B_MM_GM20B_H -#define NVGPU_GM20B_MM_GM20B_H +#ifndef HAL_MM_MM_GM20B_H +#define HAL_MM_MM_GM20B_H + +#include + struct gk20a; -#define PDE_ADDR_START(x, y) ((x) & ~((0x1UL << (y)) - 1)) -#define PDE_ADDR_END(x, y) ((x) | ((0x1UL << (y)) - 1)) - -bool gm20b_mm_support_sparse(struct gk20a *g); bool gm20b_mm_is_bar1_supported(struct gk20a *g); -#endif /* NVGPU_GM20B_MM_GM20B_H */ +#endif diff --git a/drivers/gpu/nvgpu/gp10b/mm_gp10b.c b/drivers/gpu/nvgpu/hal/mm/mm_gp10b.c similarity index 85% rename from drivers/gpu/nvgpu/gp10b/mm_gp10b.c rename to drivers/gpu/nvgpu/hal/mm/mm_gp10b.c index c8bf00a3a..7923b2353 100644 --- a/drivers/gpu/nvgpu/gp10b/mm_gp10b.c +++ b/drivers/gpu/nvgpu/hal/mm/mm_gp10b.c @@ -1,7 +1,5 @@ /* - * GP10B MMU - * - * Copyright (c) 2014-2019, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -22,19 +20,13 @@ * DEALINGS IN THE SOFTWARE. */ -#include -#include -#include -#include -#include -#include #include -#include +#include +#include -#include "gm20b/mm_gm20b.h" #include "mm_gp10b.h" -int gp10b_init_bar2_vm(struct gk20a *g) +int gp10b_mm_init_bar2_vm(struct gk20a *g) { int err; struct mm_gk20a *mm = &g->mm; @@ -68,7 +60,7 @@ clean_up_va: } -void gp10b_remove_bar2_vm(struct gk20a *g) +void gp10b_mm_remove_bar2_vm(struct gk20a *g) { struct mm_gk20a *mm = &g->mm; diff --git a/drivers/gpu/nvgpu/gp10b/mm_gp10b.h b/drivers/gpu/nvgpu/hal/mm/mm_gp10b.h similarity index 81% rename from drivers/gpu/nvgpu/gp10b/mm_gp10b.h rename to drivers/gpu/nvgpu/hal/mm/mm_gp10b.h index b7a37d56b..fe087f97f 100644 --- a/drivers/gpu/nvgpu/gp10b/mm_gp10b.h +++ b/drivers/gpu/nvgpu/hal/mm/mm_gp10b.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014-2019, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -20,15 +20,12 @@ * DEALINGS IN THE SOFTWARE. */ -#ifndef MM_GP10B_H -#define MM_GP10B_H +#ifndef HAL_MM_MM_GP10B_H +#define HAL_MM_MM_GP10B_H struct gk20a; -struct gk20a_mmu_level; -struct nvgpu_mem; -struct vm_gk20a; -int gp10b_init_bar2_vm(struct gk20a *g); -void gp10b_remove_bar2_vm(struct gk20a *g); +int gp10b_mm_init_bar2_vm(struct gk20a *g); +void gp10b_mm_remove_bar2_vm(struct gk20a *g); #endif diff --git a/drivers/gpu/nvgpu/hal/mm/mm_gv11b.c b/drivers/gpu/nvgpu/hal/mm/mm_gv11b.c new file mode 100644 index 000000000..ae987e211 --- /dev/null +++ b/drivers/gpu/nvgpu/hal/mm/mm_gv11b.c @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#include +#include +#include + +#include "mm_gv11b.h" + +void gv11b_mm_init_inst_block(struct nvgpu_mem *inst_block, + struct vm_gk20a *vm, u32 big_page_size) +{ + struct gk20a *g = gk20a_from_vm(vm); + u64 pdb_addr = nvgpu_pd_gpu_addr(g, &vm->pdb); + + nvgpu_log_info(g, "inst block phys = 0x%llx, kv = 0x%p", + nvgpu_inst_block_addr(g, inst_block), inst_block->cpu_va); + + g->ops.ramin.init_pdb(g, inst_block, pdb_addr, vm->pdb.mem); + + if ((big_page_size != 0U) && (g->ops.ramin.set_big_page_size != NULL)) { + g->ops.ramin.set_big_page_size(g, inst_block, big_page_size); + } + + if (g->ops.ramin.init_subctx_pdb != NULL) { + g->ops.ramin.init_subctx_pdb(g, inst_block, vm->pdb.mem, false); + } +} + +bool gv11b_mm_is_bar1_supported(struct gk20a *g) +{ + return false; +} diff --git a/drivers/gpu/nvgpu/hal/mm/mm_gv11b.h b/drivers/gpu/nvgpu/hal/mm/mm_gv11b.h new file mode 100644 index 000000000..d17943e52 --- /dev/null +++ b/drivers/gpu/nvgpu/hal/mm/mm_gv11b.h @@ -0,0 +1,35 @@ +/* + * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef HAL_MM_MM_GV11B_H +#define HAL_MM_MM_GV11B_H + +#include + +struct nvgpu_mem; +struct vm_gk20a; + +void gv11b_mm_init_inst_block(struct nvgpu_mem *inst_block, struct vm_gk20a *vm, + u32 big_page_size); +bool gv11b_mm_is_bar1_supported(struct gk20a *g); + +#endif diff --git a/drivers/gpu/nvgpu/include/nvgpu/as.h b/drivers/gpu/nvgpu/include/nvgpu/as.h index 46256b3d4..f2cc0e702 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/as.h +++ b/drivers/gpu/nvgpu/include/nvgpu/as.h @@ -1,7 +1,7 @@ /* * GK20A Address Spaces * - * Copyright (c) 2011-2018, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2011-2019, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -46,6 +46,7 @@ struct gk20a_as_share { #define NVGPU_AS_ALLOC_UNIFIED_VA BIT32(1) int gk20a_as_release_share(struct gk20a_as_share *as_share); +int gk20a_vm_release_share(struct gk20a_as_share *as_share); /* if big_page_size == 0, the default big page size is used */ int gk20a_as_alloc_share(struct gk20a *g, u32 big_page_size, diff --git a/drivers/gpu/nvgpu/include/nvgpu/cbc.h b/drivers/gpu/nvgpu/include/nvgpu/cbc.h index 0bc298165..e2fd43c3e 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/cbc.h +++ b/drivers/gpu/nvgpu/include/nvgpu/cbc.h @@ -25,8 +25,7 @@ #include #include - -#include "gk20a/mm_gk20a.h" +#include struct gk20a; @@ -36,6 +35,15 @@ enum nvgpu_cbc_op { nvgpu_cbc_op_invalidate, }; +struct compbit_store_desc { + struct nvgpu_mem mem; + + /* + * The value that is written to the hardware. This depends on + * on the number of ltcs and is not an address. + */ + u64 base_hw; +}; struct nvgpu_cbc { u32 compbit_backing_size; diff --git a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h index 989d4f912..aa64516e7 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h +++ b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h @@ -87,6 +87,7 @@ struct nvgpu_fecs_host_intr_status; struct nvgpu_fecs_ecc_status; struct _resmgr_context; struct nvgpu_gpfifo_entry; +struct vm_gk20a_mapping_batch; enum nvgpu_unit; enum nvgpu_flush_op; diff --git a/drivers/gpu/nvgpu/include/nvgpu/mm.h b/drivers/gpu/nvgpu/include/nvgpu/mm.h index ee89cbb96..e323fbd22 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/mm.h +++ b/drivers/gpu/nvgpu/include/nvgpu/mm.h @@ -23,6 +23,7 @@ #ifndef NVGPU_MM_H #define NVGPU_MM_H +#include #include #include #include diff --git a/drivers/gpu/nvgpu/libnvgpu-drv.export b/drivers/gpu/nvgpu/libnvgpu-drv.export index 2f12ac244..3ba57ec50 100644 --- a/drivers/gpu/nvgpu/libnvgpu-drv.export +++ b/drivers/gpu/nvgpu/libnvgpu-drv.export @@ -35,12 +35,10 @@ gm20b_fb_tlb_invalidate gm20b_fuse_status_opt_gpc gm20b_ramin_set_big_page_size gp10b_fb_compression_page_size -gp10b_init_bar2_vm gp10b_mm_get_default_big_page_size gp10b_mm_get_iommu_bit gp10b_mm_get_mmu_levels gp10b_ramin_init_pdb -gp10b_remove_bar2_vm gv11b_channel_count gv11b_fb_intr_enable gv11b_fb_fault_buf_configure_hw @@ -49,9 +47,9 @@ gv11b_fb_init_hw gv11b_fb_is_fault_buf_enabled gv11b_fb_intr_is_mmu_fault_pending gv11b_gpu_phys_addr -gv11b_init_inst_block gv11b_mm_fault_info_mem_destroy gv11b_mm_is_bar1_supported +gv11b_mm_init_inst_block gv11b_mm_l2_flush gv11b_mm_mmu_fault_disable_hw gv11b_mc_is_mmu_fault_pending diff --git a/drivers/gpu/nvgpu/os/linux/cde.c b/drivers/gpu/nvgpu/os/linux/cde.c index b97391b6b..21eff1ae4 100644 --- a/drivers/gpu/nvgpu/os/linux/cde.c +++ b/drivers/gpu/nvgpu/os/linux/cde.c @@ -43,8 +43,6 @@ #include -#include "gk20a/mm_gk20a.h" - #include "cde.h" #include "os_linux.h" #include "dmabuf.h" diff --git a/drivers/gpu/nvgpu/os/linux/dmabuf.h b/drivers/gpu/nvgpu/os/linux/dmabuf.h index 8399eaaf7..34c552d26 100644 --- a/drivers/gpu/nvgpu/os/linux/dmabuf.h +++ b/drivers/gpu/nvgpu/os/linux/dmabuf.h @@ -1,5 +1,5 @@ /* -* Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -28,7 +28,35 @@ struct dma_buf_attachment; struct device; struct gk20a; -struct gk20a_buffer_state; + +struct gk20a_buffer_state { + struct nvgpu_list_node list; + + /* The valid compbits and the fence must be changed atomically. */ + struct nvgpu_mutex lock; + + /* Offset of the surface within the dma-buf whose state is + * described by this struct (one dma-buf can contain multiple + * surfaces with different states). */ + size_t offset; + + /* A bitmask of valid sets of compbits (0 = uncompressed). */ + u32 valid_compbits; + + /* The ZBC color used on this buffer. */ + u32 zbc_color; + + /* This struct reflects the state of the buffer when this + * fence signals. */ + struct nvgpu_fence_type *fence; +}; + +static inline struct gk20a_buffer_state * +gk20a_buffer_state_from_list(struct nvgpu_list_node *node) +{ + return (struct gk20a_buffer_state *) + ((uintptr_t)node - offsetof(struct gk20a_buffer_state, list)); +}; struct gk20a_dmabuf_priv { struct nvgpu_mutex lock; diff --git a/drivers/gpu/nvgpu/os/linux/dmabuf_vidmem.c b/drivers/gpu/nvgpu/os/linux/dmabuf_vidmem.c index bada5dc79..4f33bcd68 100644 --- a/drivers/gpu/nvgpu/os/linux/dmabuf_vidmem.c +++ b/drivers/gpu/nvgpu/os/linux/dmabuf_vidmem.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -32,7 +32,6 @@ #include #include -#include "gk20a/mm_gk20a.h" #include "dmabuf_vidmem.h" bool nvgpu_addr_is_vidmem_page_alloc(u64 addr) diff --git a/drivers/gpu/nvgpu/os/linux/nvgpu_mem.c b/drivers/gpu/nvgpu/os/linux/nvgpu_mem.c index b8a99c68e..c5ff8d041 100644 --- a/drivers/gpu/nvgpu/os/linux/nvgpu_mem.c +++ b/drivers/gpu/nvgpu/os/linux/nvgpu_mem.c @@ -35,7 +35,6 @@ #include "os_linux.h" #include "dmabuf_vidmem.h" -#include "gk20a/mm_gk20a.h" #include "platform_gk20a.h" static u64 __nvgpu_sgl_ipa(struct gk20a *g, struct nvgpu_sgl *sgl) diff --git a/drivers/gpu/nvgpu/os/linux/os_fence_android_sema.c b/drivers/gpu/nvgpu/os/linux/os_fence_android_sema.c index 8ffaf4720..07df716a9 100644 --- a/drivers/gpu/nvgpu/os/linux/os_fence_android_sema.c +++ b/drivers/gpu/nvgpu/os/linux/os_fence_android_sema.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -25,8 +25,6 @@ #include #include -#include "gk20a/mm_gk20a.h" - #include "sync_sema_android.h" #include "../drivers/staging/android/sync.h" @@ -101,4 +99,3 @@ int nvgpu_os_fence_sema_fdget(struct nvgpu_os_fence *fence_out, return 0; } - diff --git a/drivers/gpu/nvgpu/os/linux/os_fence_android_syncpt.c b/drivers/gpu/nvgpu/os/linux/os_fence_android_syncpt.c index f9f274d17..ee31dfc3e 100644 --- a/drivers/gpu/nvgpu/os/linux/os_fence_android_syncpt.c +++ b/drivers/gpu/nvgpu/os/linux/os_fence_android_syncpt.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -27,8 +27,6 @@ #include #include -#include "gk20a/mm_gk20a.h" - #include "../drivers/staging/android/sync.h" static const struct nvgpu_os_fence_ops syncpt_ops = { diff --git a/drivers/gpu/nvgpu/os/linux/vm.c b/drivers/gpu/nvgpu/os/linux/vm.c index c9eea5ffe..a40b70c76 100644 --- a/drivers/gpu/nvgpu/os/linux/vm.c +++ b/drivers/gpu/nvgpu/os/linux/vm.c @@ -31,13 +31,14 @@ #include #include -#include "gk20a/mm_gk20a.h" #include "platform_gk20a.h" #include "os_linux.h" #include "dmabuf.h" #include "dmabuf_vidmem.h" +#define dev_from_vm(vm) dev_from_gk20a(vm->mm->g) + static u32 nvgpu_vm_translate_linux_flags(struct gk20a *g, u32 flags) { u32 core_flags = 0; diff --git a/userspace/Makefile.sources b/userspace/Makefile.sources index 679f92c2d..7d9e1ee66 100644 --- a/userspace/Makefile.sources +++ b/userspace/Makefile.sources @@ -28,8 +28,6 @@ HEADERS := \ $(NVGPU_SRC)/include/nvgpu/*.h \ $(NVGPU_SRC)/include/nvgpu/hw/*/*.h \ $(NVGPU_SRC)/gk20a/*.h \ - $(NVGPU_SRC)/gm20b/*.h \ - $(NVGPU_SRC)/gp10b/*.h \ $(NVGPU_SRC)/gv11b/*.h \ $(NVGPU_SRC)/tu104/*.h diff --git a/userspace/units/mm/gmmu/page_table/page_table.c b/userspace/units/mm/gmmu/page_table/page_table.c index 90794e8b0..ee397c1c7 100644 --- a/userspace/units/mm/gmmu/page_table/page_table.c +++ b/userspace/units/mm/gmmu/page_table/page_table.c @@ -37,6 +37,7 @@ #include +#include #include #include #include @@ -299,7 +300,7 @@ static int init_mm(struct unit_module *m, struct gk20a *g) g->ops.mm.gmmu.get_default_big_page_size = gp10b_mm_get_default_big_page_size; g->ops.mm.gmmu.get_mmu_levels = gp10b_mm_get_mmu_levels; - g->ops.mm.init_inst_block = gv11b_init_inst_block; + g->ops.mm.init_inst_block = gv11b_mm_init_inst_block; g->ops.mm.gmmu.map = nvgpu_gmmu_map_locked; g->ops.mm.gmmu.unmap = nvgpu_gmmu_unmap_locked; g->ops.mm.gmmu.gpu_phys_addr = gv11b_gpu_phys_addr; diff --git a/userspace/units/mm/page_table_faults/page_table_faults.c b/userspace/units/mm/page_table_faults/page_table_faults.c index 5c04ff82d..e652c638e 100644 --- a/userspace/units/mm/page_table_faults/page_table_faults.c +++ b/userspace/units/mm/page_table_faults/page_table_faults.c @@ -38,6 +38,7 @@ #include "gv11b/mm_gv11b.h" #include "common/fifo/channel_gv11b.h" +#include "hal/mm/mm_gv11b.h" #include "hal/mm/cache/flush_gk20a.h" #include "hal/mm/cache/flush_gv11b.h" #include "hal/mm/gmmu/gmmu_gp10b.h" @@ -121,7 +122,7 @@ static int init_mm(struct unit_module *m, struct gk20a *g) g->ops.mm.gmmu.get_default_big_page_size = gp10b_mm_get_default_big_page_size; g->ops.mm.gmmu.get_mmu_levels = gp10b_mm_get_mmu_levels; - g->ops.mm.init_inst_block = gv11b_init_inst_block; + g->ops.mm.init_inst_block = gv11b_mm_init_inst_block; g->ops.mm.gmmu.map = nvgpu_gmmu_map_locked; g->ops.mm.gmmu.unmap = nvgpu_gmmu_unmap_locked; g->ops.mm.gmmu.gpu_phys_addr = gv11b_gpu_phys_addr; diff --git a/userspace/units/mm/vm/vm.c b/userspace/units/mm/vm/vm.c index 7fa7ae9f1..fd5019946 100644 --- a/userspace/units/mm/vm/vm.c +++ b/userspace/units/mm/vm/vm.c @@ -32,7 +32,7 @@ #include #include #include -#include + #include #include #include