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gpu: nvgpu: fix MISRA violation in posix cond unit
MISRA 20.7 rule requires macro paramaters to be wrapped in parantheses when the parameter expands into an expression. Fix the violation of MISRA rule 20.7 in posix cond unit. Jira NVGPU-3139 Change-Id: If1833677b5c6e3d9f3f20ff81fdc4c6dd52451b9 Signed-off-by: ajesh <akv@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2112615 Reviewed-by: Philip Elcan <pelcan@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -77,7 +77,7 @@ void nvgpu_cond_unlock(struct nvgpu_cond *cond);
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NVGPU_COND_WAIT_TIMEOUT_LOCKED((cond), (condition), \
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(cond_wait_ret), \
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(cond_wait_timeout != 0U) ? \
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cond_wait_timeout : (unsigned int)-1); \
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(cond_wait_timeout) : (unsigned int)-1); \
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nvgpu_mutex_release(&(cond)->mutex); \
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cond_wait_ret; \
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})
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@@ -99,9 +99,9 @@ void nvgpu_cond_unlock(struct nvgpu_cond *cond);
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#define NVGPU_COND_WAIT_TIMEOUT_LOCKED(cond, condition, ret, timeout_ms)\
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do { \
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unsigned int cond_wait_timeout_timeout = timeout_ms; \
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unsigned int cond_wait_timeout_timeout = (timeout_ms); \
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ret = 0; \
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while (!(condition) && ret == 0) { \
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while (!(condition) && ((ret) == 0)) { \
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ret = nvgpu_cond_timedwait(cond, \
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&cond_wait_timeout_timeout); \
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} \
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